WO2008004135A9 - Système de rendu graphique parallèle multimode utilisant un profilage de scène automatique en temps réel et une commande de mode - Google Patents
Système de rendu graphique parallèle multimode utilisant un profilage de scène automatique en temps réel et une commande de modeInfo
- Publication number
- WO2008004135A9 WO2008004135A9 PCT/IB2007/003464 IB2007003464W WO2008004135A9 WO 2008004135 A9 WO2008004135 A9 WO 2008004135A9 IB 2007003464 W IB2007003464 W IB 2007003464W WO 2008004135 A9 WO2008004135 A9 WO 2008004135A9
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- graphics
- graphics rendering
- rendering system
- mode parallel
- mode
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T15/00—3D [Three Dimensional] image rendering
- G06T15/005—General purpose rendering architectures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/363—Graphics controllers
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/06—Use of more than one graphics processor to process data before displaying to one or more screens
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Graphics (AREA)
- Computer Hardware Design (AREA)
- Human Computer Interaction (AREA)
- General Engineering & Computer Science (AREA)
- Image Generation (AREA)
- Image Processing (AREA)
Abstract
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002637800A CA2637800A1 (fr) | 2006-01-18 | 2007-01-18 | Systeme de rendu graphique parallele multimode utilisant un profilage de scene automatique en temps reel et une commande de mode |
US12/077,072 US20090027383A1 (en) | 2003-11-19 | 2008-03-14 | Computing system parallelizing the operation of multiple graphics processing pipelines (GPPLs) and supporting depth-less based image recomposition |
US12/231,304 US8284207B2 (en) | 2003-11-19 | 2008-08-29 | Method of generating digital images of objects in 3D scenes while eliminating object overdrawing within the multiple graphics processing pipeline (GPPLS) of a parallel graphics processing system generating partial color-based complementary-type images along the viewing direction using black pixel rendering and subsequent recompositing operations |
US12/231,296 US20090179894A1 (en) | 2003-11-19 | 2008-08-29 | Computing system capable of parallelizing the operation of multiple graphics processing pipelines (GPPLS) |
US12/231,295 US20090128550A1 (en) | 2003-11-19 | 2008-08-29 | Computing system supporting parallel 3D graphics processes based on the division of objects in 3D scenes |
US13/646,710 US20130120410A1 (en) | 2003-11-19 | 2012-10-07 | Multi-pass method of generating an image frame of a 3d scene using an object-division based parallel graphics rendering process |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US75960806P | 2006-01-18 | 2006-01-18 | |
US60/759,608 | 2006-01-18 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/648,160 Continuation-In-Part US8497865B2 (en) | 2003-11-19 | 2006-12-31 | Parallel graphics system employing multiple graphics processing pipelines with multiple graphics processing units (GPUS) and supporting an object division mode of parallel graphics processing using programmable pixel or vertex processing resources provided with the GPUS |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/655,735 Continuation-In-Part US8085273B2 (en) | 2003-11-19 | 2007-01-18 | Multi-mode parallel graphics rendering system employing real-time automatic scene profiling and mode control |
Publications (3)
Publication Number | Publication Date |
---|---|
WO2008004135A2 WO2008004135A2 (fr) | 2008-01-10 |
WO2008004135A9 true WO2008004135A9 (fr) | 2008-03-20 |
WO2008004135A3 WO2008004135A3 (fr) | 2009-04-23 |
Family
ID=38894955
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2007/003464 WO2008004135A2 (fr) | 2003-11-19 | 2007-01-18 | Système de rendu graphique parallèle multimode utilisant un profilage de scène automatique en temps réel et une commande de mode |
Country Status (2)
Country | Link |
---|---|
CA (1) | CA2637800A1 (fr) |
WO (1) | WO2008004135A2 (fr) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20060130674A (ko) * | 2004-03-25 | 2006-12-19 | 소니 가부시끼 가이샤 | 정보 신호 처리 장치, 기능 블록 제어 방법 및 기능 블록 |
US8319782B2 (en) | 2008-07-08 | 2012-11-27 | Dell Products, Lp | Systems and methods for providing scalable parallel graphics rendering capability for information handling systems |
WO2010041215A1 (fr) * | 2008-10-09 | 2010-04-15 | Nxp B.V. | Système graphique d’ombrage de primitives géométriques |
US8471858B2 (en) * | 2009-06-02 | 2013-06-25 | Qualcomm Incorporated | Displaying a visual representation of performance metrics for rendered graphics elements |
WO2014108214A1 (fr) * | 2013-01-14 | 2014-07-17 | Neweb | Système client-serveur pour un magasin de meubles sur internet |
CN107958436B (zh) * | 2017-11-24 | 2021-05-07 | 中国航空工业集团公司西安航空计算技术研究所 | 一种面向OpenGL的图形负载量化检测方法 |
WO2020004695A1 (fr) * | 2018-06-29 | 2020-01-02 | 주식회사 에이펀인터렉티브 | Système de réalisation d'un rendu parallèle en temps réel d'une image de capture de mouvement à l'aide d'une gpu |
CN113971047B (zh) * | 2021-10-22 | 2023-06-23 | 中国联合网络通信集团有限公司 | 分级平行系统的构建方法、应用方法、计算机设备及介质 |
CN114820279B (zh) * | 2022-05-18 | 2023-03-24 | 北京百度网讯科技有限公司 | 基于多gpu的分布式深度学习方法、装置及电子设备 |
CN117830489B (zh) * | 2024-03-05 | 2024-05-03 | 浙江小牛哥科技有限公司 | 智能室内设计图像渲染系统 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100269106B1 (ko) * | 1996-03-21 | 2000-11-01 | 윤종용 | 멀티프로세서 그래픽스 시스템 |
US6292200B1 (en) * | 1998-10-23 | 2001-09-18 | Silicon Graphics, Inc. | Apparatus and method for utilizing multiple rendering pipes for a single 3-D display |
DE19917092A1 (de) * | 1999-04-15 | 2000-10-26 | Sp3D Chip Design Gmbh | Verfahren zur Rasterisierung eines Graphikgrundelements |
US6741243B2 (en) * | 2000-05-01 | 2004-05-25 | Broadcom Corporation | Method and system for reducing overflows in a computer graphics system |
US6864894B1 (en) * | 2000-11-17 | 2005-03-08 | Hewlett-Packard Development Company, L.P. | Single logical screen system and method for rendering graphical data |
US7358974B2 (en) * | 2001-01-29 | 2008-04-15 | Silicon Graphics, Inc. | Method and system for minimizing an amount of data needed to test data against subarea boundaries in spatially composited digital video |
JP2003030641A (ja) * | 2001-07-19 | 2003-01-31 | Nec System Technologies Ltd | 描画装置とその並列描画方法、及び並列描画プログラム |
US6885376B2 (en) * | 2002-12-30 | 2005-04-26 | Silicon Graphics, Inc. | System, method, and computer program product for near-real time load balancing across multiple rendering pipelines |
-
2007
- 2007-01-18 CA CA002637800A patent/CA2637800A1/fr not_active Abandoned
- 2007-01-18 WO PCT/IB2007/003464 patent/WO2008004135A2/fr active Application Filing
Also Published As
Publication number | Publication date |
---|---|
WO2008004135A2 (fr) | 2008-01-10 |
WO2008004135A3 (fr) | 2009-04-23 |
CA2637800A1 (fr) | 2008-01-10 |
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