WO2008001293A2 - RENDEMENT DE PAQUET AMÉLIORÉ POUR DES SIGNAUX, procédés et systèmes DE TRANSMISSION EN BLOC - Google Patents

RENDEMENT DE PAQUET AMÉLIORÉ POUR DES SIGNAUX, procédés et systèmes DE TRANSMISSION EN BLOC Download PDF

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Publication number
WO2008001293A2
WO2008001293A2 PCT/IB2007/052435 IB2007052435W WO2008001293A2 WO 2008001293 A2 WO2008001293 A2 WO 2008001293A2 IB 2007052435 W IB2007052435 W IB 2007052435W WO 2008001293 A2 WO2008001293 A2 WO 2008001293A2
Authority
WO
WIPO (PCT)
Prior art keywords
preamble
block
frequency offset
symbols
channel estimation
Prior art date
Application number
PCT/IB2007/052435
Other languages
English (en)
Other versions
WO2008001293A3 (fr
Inventor
Seyed-Alireza Seyedi-Esfahani
Dagnachew Birru
Original Assignee
Koninklijke Philips Electronics, N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics, N.V. filed Critical Koninklijke Philips Electronics, N.V.
Priority to JP2009517535A priority Critical patent/JP2009543408A/ja
Priority to EP07789787A priority patent/EP2039099A2/fr
Priority to BRPI0713383-9A priority patent/BRPI0713383A2/pt
Priority to CA002656184A priority patent/CA2656184A1/fr
Priority to AU2007263424A priority patent/AU2007263424A1/en
Priority to MX2008015533A priority patent/MX2008015533A/es
Publication of WO2008001293A2 publication Critical patent/WO2008001293A2/fr
Publication of WO2008001293A3 publication Critical patent/WO2008001293A3/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2602—Signal structure
    • H04L27/261—Details of reference signals
    • H04L27/2613—Structure of the reference signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202—Channel estimation
    • H04L25/0224—Channel estimation using sounding signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
    • H04L27/2655—Synchronisation arrangements

Definitions

  • This disclosure pertains to the field of packet-based communication systems.
  • each packet sent and received consists of a data field preceded by a preamble.
  • Each data field will generally include a stream of data bits, a header and some form of data check.
  • Each preamble will include a series of two or three separate portions devoted to: (1) synchronization, (2) frequency offset estimation and (3) channel estimation.
  • the preamble is also typically transmitted in blocks with each block separated by some form of buffer, such as a Zero Padding (ZP) buffer or a Cyclic Prefix (CP) buffer, i.e., a buffer formed from cyclically redundant symbols.
  • ZP Zero Padding
  • CP Cyclic Prefix
  • a communication device configured for the use of transporting a communication signal having a specialized preamble allowing for increased bandwidth efficiency.
  • the communication device includes a first device configured to manipulate a block transmission scheme, such as OFDM or SCBT signal, having a block size equal to N, wherein N is an integer greater than 1 , wherein the block transmission signal has a preamble with a symbol configuration such that a percentage of all symbols of the preamble can each be used for all of frequency offset estimation, clock synchronization and channel estimation.
  • a block transmission scheme such as OFDM or SCBT signal
  • a method for the reception and data extraction of block transmission communication signals includes receiving a block transmission communication signal having a block size equal to N, wherein N is an integer greater than 1 , and performing at least two of frequency offset estimation, clock synchronization and channel estimation using a common set of symbols in the preamble.
  • an electromagnetic wave propagating through a transmission medium includes block transmission signal having a block size equal to N, wherein N is an integer greater than 1, wherein each channel has a preamble that includes a repeating block of symbols, where each symbol is derived from a Complex Quadratic sequence.
  • FIG. 1 is an exemplary communication system according to the present disclosure
  • FIG. 2 is a block diagram of an exemplary receiver
  • FIG. 3 is a block diagram outlining various exemplary operations directed to the reception, processing and data extraction of block transmission packets.
  • FIG. 4 depicts an exemplary communication waveform for use with the various methods and systems of the present disclosure.
  • the time domain sequence of a MB-OFDM UWB communication system has a length equal to 24 OFDM symbols while the respective frequency domain sequence has a length equal to 6 OFDM symbols.
  • the time domain sequence is used for synchronization and frequency offset estimation while the frequency domain sequence is used for channel estimation.
  • these OFDM symbols are separated using a Cyclic Prefix (CP) or Zero Padding (ZP). While this approach follows a simple paradigm, it requires a long preamble, which in turn reduces the bandwidth efficiency of the system.
  • CP Cyclic Prefix
  • ZP Zero Padding
  • FIG. 1 is an exemplary communication system 100 according to the present disclosure.
  • the communication system 100 has a signal source 140 and a signal destination 160 coupled by an intermediate transmission media 150.
  • the intermediate transmission media 150 has an inherent channel response h[t] with inherent delay t T Au and added noise source ⁇ o.
  • the exemplary communication system 100 communicates using a packet -based block transmission method.
  • the exemplary communication system 100 can communicate using packets having a special preamble that lends itself to both increased bandwidth efficiency and parallel processing.
  • FIG. 4 depicts an example of an exemplary block transmission packet 400 for use with the disclosed methods and systems.
  • the block transmission packet 400 includes a preamble 410 and a data field 420.
  • the preamble 410 includes a repeating block 412 of symbols.
  • the data field includes alternating blocks of data 424 and zero or cyclic prefixes 422.
  • each preamble block 412 can consist of a series of symbols a 0 ...a N -i with each symbol a n defined by EQ. 1 below:
  • a first advantage of the complex quadratic sequence is that it is circularly orthogonal. That is, the complex quadratic sequence is orthogonal to any sequence based on a cyclic shift of itself. This property of the complex quadratic sequence makes it a very good choice for correlation-based synchronization for block transmission systems as such sequences eliminate the need for any cyclic prefix or zero padding between blocks. This in itself can substantially reduce preamble overhead.
  • Yet another advantage to using the complex quadratic sequence is that it has constant power in time, i.e.
  • 1. This property of the complex quadratic sequence can allow one to transmit the preamble at higher power without running into power amplifier non-linearity at the receiver side.
  • Still another advantage of the complex quadratic sequence can be found by looking at the Discrete Fourier Transform (DFT) of the complex quadratic sequence, which is shown below in EQ. 2:
  • DFT Discrete Fourier Transform
  • the CQ sequence can be a good choice for the purpose of channel estimation.
  • each preamble block does not need to consist of N symbols, but can alternatively have fewer symbols for more practical applications.
  • the length of the preamble blocks may not be fixed. That is, CQ sequences with different lengths may be used in the same preamble. Good block lengths may be expected to vary from embodiment to embodiment depending on a variety of factors.
  • FIG. 2 is a block diagram of an exemplary receiver 160.
  • the exemplary receiver includes a controller 210, a memory 220, a correlation device 230, a synchronization device 240, a frequency offset estimation device 250, a channel estimation device
  • the various components 210-290 are linked via a control/data bus 202.
  • the exemplary receiver 160 of FIG. 2 uses a bussed architecture
  • any other architecture may be used as may be known to those of ordinary skill in the art.
  • the various components 210-290 can take the form of separate electronic components coupled together via a series of separate busses or a collection of dedicated logic arranged in a highly specialized architecture.
  • a detected/demodulated block transmission packet can be received via the input/output device 290 and stored in the memory 220 under control of the controller 210.
  • the received packet can correlated with a training sequence using the correlation device 230 in order to determine whether a valid packet has arrived.
  • the controller 210 can extract the preamble from the packet and provide identical copies of the preamble to the synchronization device 240, the frequency offset estimator 250 and the channel estimator 260.
  • the receiver 160 perform any parallel processing
  • the preamble of the exemplary packet 400 of FIG. 4 uniquely lends itself to parallel processing. That is, when each channel's preamble consists of the repetition of blocks containing a cyclically orthogonal sequence, different time-domain and frequency- domain sequences do not need to be used for synchronization, frequency offset estimation and channel estimation. Accordingly, frequency offset estimation and correction, as well as channel estimation, can be performed in parallel with synchronization using the identical blocks of symbols. For the present embodiment, it should be appreciated that synchronization can be performed in parallel with one or both of frequency offset estimation and channel estimation. [0033] To perform proper channel estimation, however, frequency offset can first be taken into consideration.
  • the frequency offset estimation device 250 can perform a frequency offset estimation on the preamble. Any frequency offset can be estimated by measuring the phase rotation between similar peaks (generated by the correlation device) in two consecutive blocks. For a more accurate estimate, the estimated value from different pairs of blocks can be averaged. Typically, frequency offset takes only two repeated blocks, but of course performance and performance requirements can vary widely depending on a plethora of circumstances. [0034] Once the frequency offset estimation device 250 has provided the appropriate frequency offset information to the channel estimation device 260, the channel estimation device 260 can correctly estimate a preliminary channel estimate. [0035] Note that when a cyclically orthogonal sequence is used, when in the absence of frequency offset noise, the output of the correlator should represent the communication channel through which the packet traveled.
  • any block of M consecutive samples in the output of the correlator can resemble the exact channel impulse response with an unknown cyclic shift. Accordingly, when no noise is present, the task of the channel estimation device 260 can be made simple.
  • the channel estimation device 260 can derive a better channel estimate can by averaging a number of consecutive blocks (assuming that frequency offset is corrected).
  • the synchronization device 240 independently can perform a synchronization procedure by looking for large peaks during a time correlation. Assuming typical channel models (e.g. with exponential decay), this approach can provide a good estimate. To ensure a higher probability of synchronization success, more than one peak (and typically 3-4 peaks) in the same relative location in sequential repeated blocks can be required. In other words, if the system observes that three consecutive blocks produce a large peak in the same location, it can assume with a high degree of confidence that the location of these peaks is the correct synchronization time.
  • the synchronization device 240 can provide the correct synchronization time to channel estimation device 260.
  • the channel estimation device 260 can cyclically shift the preliminary channel estimate to produce a true channel estimate.
  • the controller 210 can use this channel estimate to extract data from the data portion of the received packet.
  • FIG. 3 is a block diagram outlining various exemplary operations directed to the reception, processing and data extraction of block transmission packets.
  • the process starts in step 302 where a block transmission packet, such as the block transmission packet 400 of FIG. 4, is received.
  • step 304 the received packet is correlated with a predetermined training sequence in order to assure, among other things, that a valid packet has been received.
  • step 306 the preamble is extracted from the received packet, and the first block of the preamble is identified. Control continues to step 310.
  • step 310 the first packet is processed according to a number of intermediate steps
  • control starts with step 312 where a frequency offset estimation procedure can be performed.
  • a frequency offset correction procedure can be conditionally performed assuming that the correct frequency offset can be estimated in step 312.
  • a channel estimation procedure can be performed with the caveat that frequency offset and noise should be accounted for before a proper preliminary channel estimate can be derived. Control continues to step 330.
  • control starts with step 312 where a synchronization procedure is performed. Control continues to step 330.
  • step 330 a determination is made as to whether the synchronization procedure of step 320 was successfully performed. As discussed above, synchronization may be determined when a strong output pulse is found in the output of a correlator for a particular location within a block. However, as a higher level of confidence may be had by processing multiple blocks, synchronization may by definition require the processing of multiple blocks. If a successful synchronization is determined to be produced; control continues to step 332; otherwise, control jumps to step 340.
  • step 340 which assumes an unsuccessful synchronization, a determination is made as to whether the last available block in the preamble was processed in step 310. If the last available block in the preamble was processed, control continues to step 342, where a failure report is issued to some relevant control circuitry, and the process stops at step 390. [0048] If the last available block in the preamble was not processed, control jumps to step 350, where the next sequential block in the preamble is identified. Control then jumps back to step 310 wherein the above-described frequency offset estimation, frequency offset correction, channel estimation and synchronization steps 312-320 are performed on the next identified block.
  • step 332 which assumes a successful synchronization process at step 330, the synchronization offset produced by step 320 can be applied to the preliminary channel estimation output of step 316 to cyclically shift the channel estimation output - thus producing a true channel estimate.
  • step 334 the true channel estimate can be used to extract data from the data portion of the received packet, and control continues to step 390 where the process stops.
  • various storage media such as magnetic computer disks, optical disks, electronic memories and the like, can be prepared that can contain information that can direct a device, such as a computer, to implement the above-described systems and/or methods.
  • a device such as a computer
  • the storage media can provide the information and programs to the device, thus enabling the device to perform the above-described systems and/or methods.
  • a computer disk containing appropriate materials such as a source file, an object file, an executable file or the like
  • the computer could receive the information, appropriately configure itself and perform the functions of the various systems and methods outlined in the diagrams and flowcharts above to implement the various functions. That is, the computer could receive various portions of information from the disk relating to different elements of the above-described systems and/or methods, implement the individual systems and/or methods and coordinate the functions of the individual systems and/or methods described above.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Communication Control (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

Cette invention a pour objet un dispositif de communication configuré pour l'utilisation du transport d'un signal de communication ayant un préambule spécialisé permettant un rendement de bande passante amélioré. Le dispositif de communication comprend un premier dispositif configuré pour manipuler un schéma de transmission en bloc, tel qu'un signal OFDM ou SCBT, ayant une taille de bloc égale à N, où N est un entier supérieur à 1, le signal de transmission en bloc ayant un préambule avec une configuration de symbole tel qu'un pourcentage de tous les symboles du préambule peut être utilisé pour toute l'estimation de décalage en fréquence, une synchronisation d'horloge et une estimation de canal.
PCT/IB2007/052435 2006-06-28 2007-06-22 RENDEMENT DE PAQUET AMÉLIORÉ POUR DES SIGNAUX, procédés et systèmes DE TRANSMISSION EN BLOC WO2008001293A2 (fr)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2009517535A JP2009543408A (ja) 2006-06-28 2007-06-22 ブロック伝送信号のためのパケット効率を改善された方法及びシステム
EP07789787A EP2039099A2 (fr) 2006-06-28 2007-06-22 RENDEMENT DE PAQUET AMÉLIORÉ POUR DES SIGNAUX, procédés et systèmes DE TRANSMISSION EN BLOC
BRPI0713383-9A BRPI0713383A2 (pt) 2006-06-28 2007-06-22 dispositivo de comunicação configurado para o uso com um sinal de comunicação, método para a recepção e extração de dados de sinais de comunicação de transmissão em blocos, e, onda eletromagnética
CA002656184A CA2656184A1 (fr) 2006-06-28 2007-06-22 Efficacite amelioree de transmission par paquets pour methodes et systemes applicables aux signaux de transmission de blocs
AU2007263424A AU2007263424A1 (en) 2006-06-28 2007-06-22 Design of preamble structure for block transmission signals and receiver therefor
MX2008015533A MX2008015533A (es) 2006-06-28 2007-06-22 Diseño de estructura de preambulo para señales de transmision en bloques y receptor para el mismo.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US81759006P 2006-06-28 2006-06-28
US60/817,590 2006-06-28

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WO2008001293A2 true WO2008001293A2 (fr) 2008-01-03
WO2008001293A3 WO2008001293A3 (fr) 2008-02-21

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EP (1) EP2039099A2 (fr)
JP (1) JP2009543408A (fr)
KR (1) KR20090028727A (fr)
CN (1) CN101480009A (fr)
AU (1) AU2007263424A1 (fr)
BR (1) BRPI0713383A2 (fr)
CA (1) CA2656184A1 (fr)
MX (1) MX2008015533A (fr)
RU (1) RU2009102645A (fr)
TW (1) TW200814643A (fr)
WO (1) WO2008001293A2 (fr)

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CN101938447A (zh) * 2009-06-26 2011-01-05 三星电子株式会社 用于在无线通信系统中发送前同步码的装置和方法

Families Citing this family (2)

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Publication number Priority date Publication date Assignee Title
US8767815B2 (en) * 2012-11-30 2014-07-01 Honeywell International Inc. Parallel-frequency partially-coherent reception of pulse-position modulated ADS-B messages
CN111108705B (zh) * 2017-08-04 2022-05-03 联想(北京)有限公司 具有符号重复的信息

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US20050226140A1 (en) * 2004-03-30 2005-10-13 Xiangyang Zhuang Method and apparatus for pilot signal transmission
US20060050799A1 (en) * 2004-07-27 2006-03-09 Jason Hou Transmission and reception of reference preamble signals in OFDMA or OFDM communication systems

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Publication number Priority date Publication date Assignee Title
US20050226140A1 (en) * 2004-03-30 2005-10-13 Xiangyang Zhuang Method and apparatus for pilot signal transmission
US20060050799A1 (en) * 2004-07-27 2006-03-09 Jason Hou Transmission and reception of reference preamble signals in OFDMA or OFDM communication systems

Non-Patent Citations (2)

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Title
LI LI ET AL: "Synchronization for B3G MIMO OFDM in DL Initial Acquisition by CAZAC Sequence" COMMUNICATIONS, CIRCUITS AND SYSTEMS PROCEEDINGS, 2006 INTERNATIONAL CONFERENCE ON, IEEE, PI, 25 June 2006 (2006-06-25), - 28 June 2006 (2006-06-28) pages 1035-1039, XP031010602 ISBN: 0-7803-9584-0 *
QINGYU ZHU ET AL: "Constant-modulus Preamble Design for MIMO-OFDM Systems" ACOUSTICS, SPEECH AND SIGNAL PROCESSING, 2006. ICASSP 2006 PROCEEDINGS. 2006 IEEE INTERNATIONAL CONFERENCE ON TOULOUSE, FRANCE 14-19 MAY 2006, PISCATAWAY, NJ, USA,IEEE, 14 May 2006 (2006-05-14), pages IV-645, XP010931131 ISBN: 1-4244-0469-X *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101938447A (zh) * 2009-06-26 2011-01-05 三星电子株式会社 用于在无线通信系统中发送前同步码的装置和方法
CN101938447B (zh) * 2009-06-26 2015-05-20 三星电子株式会社 用于在无线通信系统中发送前同步码的装置和方法
US9210019B2 (en) 2009-06-26 2015-12-08 Samsung Electronics Co., Ltd. Apparatus and method for transmitting preamble in a wireless communication system

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CN101480009A (zh) 2009-07-08
WO2008001293A3 (fr) 2008-02-21
TW200814643A (en) 2008-03-16
KR20090028727A (ko) 2009-03-19
CA2656184A1 (fr) 2008-01-03
RU2009102645A (ru) 2010-08-10
BRPI0713383A2 (pt) 2012-03-13
MX2008015533A (es) 2009-01-13
JP2009543408A (ja) 2009-12-03
EP2039099A2 (fr) 2009-03-25
AU2007263424A1 (en) 2008-01-03

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