AU2007263424A1 - Design of preamble structure for block transmission signals and receiver therefor - Google Patents

Description

WO 2008/001293 PCT/IB2007/052435 IMPROVED PACKET EFFICIENCY FOR BLOCK TRANSMISSION SIGNALS METHODS AND SYSTEMS FIELD OF THE DISCLOSURE [0001] This disclosure pertains to the field of packet-based communication systems. BACKGROUND [0002] Typically, for conventional block transmission methods, such as Orthogonal Frequency Division Multiplexing (OFDM) or Single Carrier Block Transmission (SCBT), transmission systems using a packet-based protocol, each packet sent and received consists of a data field preceded by a preamble. Each data field will generally include a stream of data bits, a header and some form of data check. Each preamble will include a series of two or three separate portions devoted to: (1) synchronization, (2) frequency offset estimation and (3) channel estimation. In such block transmission schemes, the preamble is also typically transmitted in blocks with each block separated by some form of buffer, such as a Zero Padding (ZP) buffer or a Cyclic Prefix (CP) buffer, i.e., a buffer formed from cyclically redundant symbols. [0003] While the above-described packet structures have been in use for a long time, the increased demands of certain data communication systems have put increased pressure to improve system performance to transfer more data using the same available bandwidth. Accordingly, new technology related to the efficient transmission and reception of packetized information is desirable. SUMMARY [0004] In a first embodiment, a communication device configured for the use of transporting a communication signal having a specialized preamble allowing for increased bandwidth efficiency. The communication device includes a first device configured to manipulate a block transmission scheme, such as OFDM or SCBT signal, having a block size equal to N, wherein N is an integer 1 WO 2008/001293 PCT/IB2007/052435 greater than 1, wherein the block transmission signal has a preamble with a symbol configuration such that a percentage of all symbols of the preamble can each be used for all of frequency offset estimation, clock synchronization and channel estimation. [0005] In a second embodiment, a method for the reception and data extraction of block transmission communication signals includes receiving a block transmission communication signal having a block size equal to N, wherein N is an integer greater than 1, and performing at least two of frequency offset estimation, clock synchronization and channel estimation using a common set of symbols in the preamble. [0006] In a third embodiment, an electromagnetic wave propagating through a transmission medium is presented. The electromagnetic wave includes block transmission signal having a block size equal to N, wherein N is an integer greater than 1, wherein each channel has a preamble that includes a repeating block of symbols, where each symbol is derived from a Complex Quadratic sequence. DESCRIPTION OF THE DRAWINGS [0007] The example embodiments are best understood from the following detailed description when read with the accompanying drawing figures. It is emphasized that the various features are not necessarily drawn to scale. In fact, the dimensions may be arbitrarily increased or decreased for clarity of discussion. Wherever applicable and practical, like reference numerals refer to like elements. [0008] FIG. 1 is an exemplary communication system according to the present disclosure; [0010] FIG. 2 is a block diagram of an exemplary receiver; [0011] FIG. 3 is a block diagram outlining various exemplary operations directed to the reception, processing and data extraction of block transmission packets; and [0012] FIG. 4 depicts an exemplary communication waveform for use with the various methods and systems of the present disclosure. 2 WO 2008/001293 PCT/IB2007/052435 DETAILED DESCRIPTION [0013] In the following detailed description, for purposes of explanation and not limitation, example embodiments disclosing specific details are set forth in order to provide a thorough understanding of an embodiment according to the present teachings. However, it will be apparent to one having ordinary skill in the art having had the benefit of the present disclosure that other embodiments according to the present teachings that depart from the specific details disclosed herein remain within the scope of the appended claims. Moreover, descriptions of well-known apparatus and methods may be omitted so as to not obscure the description of the example embodiments. Such methods and apparatus are clearly within the scope of the present teachings. [0014] Typically, in packet-based block transmission systems, such as an OFDM or SCBT transmission system, time-domain and frequency-domain training sequences are transmitted at the beginning of each packet. These training sequences are used by a respective receiver for signal synchronization (SYNC), frequency offset estimation (FOE) and Channel Estimation (CE). For example, the time domain sequence of a MB-OFDM UWB communication system has a length equal to 24 OFDM symbols while the respective frequency domain sequence has a length equal to 6 OFDM symbols. The time domain sequence is used for synchronization and frequency offset estimation while the frequency domain sequence is used for channel estimation. Typically these OFDM symbols are separated using a Cyclic Prefix (CP) or Zero Padding (ZP). While this approach follows a simple paradigm, it requires a long preamble, which in turn reduces the bandwidth efficiency of the system. In high rate communication systems it can be beneficial to reduce such preamble overhead in order to improve the bandwidth efficiency of the system. [0015] The present methods and systems can increase efficiency by reducing preamble overhead, i.e., by reducing the number of symbols required in a preamble, as well as shorten the time required to process a packet's preamble once the packet is received. [0016] FIG. 1 is an exemplary communication system 100 according to the present disclosure. As shown in FIG. 1, the communication system 100 has a signal source 140 and a signal destination 160 coupled by an intermediate transmission media 150. The intermediate transmission media 150 has an inherent channel response h[t] with inherent delay tTAU and added 3 WO 2008/001293 PCT/IB2007/052435 noise source glo. The exemplary communication system 100 communicates using a packet-based block transmission method. [0017] However, unlike traditional packet-based block transmission systems, the exemplary communication system 100 can communicate using packets having a special preamble that lends itself to both increased bandwidth efficiency and parallel processing. [0018] FIG. 4 depicts an example of an exemplary block transmission packet 400 for use with the disclosed methods and systems. As shown in FIG. 4, the block transmission packet 400 includes a preamble 410 and a data field 420. The preamble 410 includes a repeating block 412 of symbols. The data field includes alternating blocks of data 424 and zero or cyclic prefixes 422. [0019] As further shown in FIG. 4, each preamble block 412 can consist of a series of symbols ao.. .aN-1 with each symbol a, defined by EQ. 1 below: a n =e SeN , n = 0,..., N -1 EQ. 1 [0020] This equation, sometimes referred to as the "complex quadratic" (CQ) sequence, is known in the communication arts, but has never been applied in the various manners developed by the inventors of the disclosed methods and systems. [0021] A first advantage of the complex quadratic sequence is that it is circularly orthogonal. That is, the complex quadratic sequence is orthogonal to any sequence based on a cyclic shift of itself. This property of the complex quadratic sequence makes it a very good choice for correlation-based synchronization for block transmission systems as such sequences eliminate the need for any cyclic prefix or zero padding between blocks. This in itself can substantially reduce preamble overhead. [0022] Yet another advantage to using the complex quadratic sequence is that it has constant power in time, i.e. I a, = 1. This property of the complex quadratic sequence can allow one to transmit the preamble at higher power without running into power amplifier non-linearity at the receiver side. 4 WO 2008/001293 PCT/IB2007/052435 [0023] Still another advantage of the complex quadratic sequence can be found by looking at the Discrete Fourier Transform (DFT) of the complex quadratic sequence, which is shown below in EQ. 2: Ak -e8e'N ,k=O,...,N-1, EQ. 2 [0024] An analysis of EQ. 2 reveals that the complex quadratic sequence also has constant power over frequency, i.e. Ak I= 1. For OFDM communication systems, this property enables one to sense a channel across the whole bandwidth, i.e., across all sub-carriers. [0025] Hence, the CQ sequence can be a good choice for the purpose of channel estimation. [0026] Note that each preamble block does not need to consist of N symbols, but can alternatively have fewer symbols for more practical applications. Furthermore, the length of the preamble blocks may not be fixed. That is, CQ sequences with different lengths may be used in the same preamble. Good block lengths may be expected to vary from embodiment to embodiment depending on a variety of factors. [0027] FIG. 2 is a block diagram of an exemplary receiver 160. As shown in FIG. 2, the exemplary receiver includes a controller 210, a memory 220, a correlation device 230, a synchronization device 240, a frequency offset estimation device 250, a channel estimation device 260 and an input/output device 290. The various components 210-290 are linked via a control/data bus 202. [0028] Although the exemplary receiver 160 of FIG. 2 uses a bussed architecture, it should be appreciated that any other architecture may be used as may be known to those of ordinary skill in the art. For example, in various embodiments, the various components 210-290 can take the form of separate electronic components coupled together via a series of separate busses or a collection of dedicated logic arranged in a highly specialized architecture. [0029] It also should be appreciated that some of the above-listed components 230-290 can take the form of software/firmware routines residing in memory 220 and be capable of being executed by the controller 210, or even software/firmware routines residing in separate memories 5 WO 2008/001293 PCT/IB2007/052435 in separate servers/computers being executed by different controllers. [0030] In operation, a detected/demodulated block transmission packet can be received via the input/output device 290 and stored in the memory 220 under control of the controller 210. Next, the received packet can correlated with a training sequence using the correlation device 230 in order to determine whether a valid packet has arrived. [0031] Once a valid packet is detected, the controller 210 can extract the preamble from the packet and provide identical copies of the preamble to the synchronization device 240, the frequency offset estimator 250 and the channel estimator 260. [0032] While there is no specific requirement that the receiver 160 perform any parallel processing, as mentioned above the preamble of the exemplary packet 400 of FIG. 4 uniquely lends itself to parallel processing. That is, when each channel's preamble consists of the repetition of blocks containing a cyclically orthogonal sequence, different time-domain and frequency domain sequences do not need to be used for synchronization, frequency offset estimation and channel estimation. Accordingly, frequency offset estimation and correction, as well as channel estimation, can be performed in parallel with synchronization using the identical blocks of symbols. For the present embodiment, it should be appreciated that synchronization can be performed in parallel with one or both of frequency offset estimation and channel estimation. [0033] To perform proper channel estimation, however, frequency offset can first be taken into consideration. Accordingly, the frequency offset estimation device 250 can perform a frequency offset estimation on the preamble. Any frequency offset can be estimated by measuring the phase rotation between similar peaks (generated by the correlation device) in two consecutive blocks. For a more accurate estimate, the estimated value from different pairs of blocks can be averaged. Typically, frequency offset takes only two repeated blocks, but of course performance and performance requirements can vary widely depending on a plethora of circumstances. [0034] Once the frequency offset estimation device 250 has provided the appropriate frequency offset information to the channel estimation device 260, the channel estimation device 260 can correctly estimate a preliminary channel estimate. [0035] Note that when a cyclically orthogonal sequence is used, when in the absence of 6 WO 2008/001293 PCT/IB2007/052435 frequency offset noise, the output of the correlator should represent the communication channel through which the packet traveled. In other words, in the absence of noise and frequency offset, any block of M consecutive samples in the output of the correlator can resemble the exact channel impulse response with an unknown cyclic shift. Accordingly, when no noise is present, the task of the channel estimation device 260 can be made simple. [0036] However, when noise is present, the channel estimation device 260 can derive a better channel estimate can by averaging a number of consecutive blocks (assuming that frequency offset is corrected). [0037] While the frequency offset estimation device 250 and channel estimation device 260 are working together, the synchronization device 240 independently can perform a synchronization procedure by looking for large peaks during a time correlation. Assuming typical channel models (e.g. with exponential decay), this approach can provide a good estimate. To ensure a higher probability of synchronization success, more than one peak (and typically 3-4 peaks) in the same relative location in sequential repeated blocks can be required. In other words, if the system observes that three consecutive blocks produce a large peak in the same location, it can assume with a high degree of confidence that the location of these peaks is the correct synchronization time. [0038] After the synchronization device 240 derives the correct synchronization time, the synchronization device 240 can provide the correct synchronization time to channel estimation device 260. [0039] In turn, assuming that the channel estimation device 260 has produced a correct preliminary channel estimate accounting for frequency offset and (optionally) noise, the channel estimation device 260 can cyclically shift the preliminary channel estimate to produce a true channel estimate. [0040] Notice that as long as the number of blocks used for synchronization is greater than the number of blocks used for either frequency offset estimation or channel estimation, one can be reasonably sure that the received data used for channel estimation and frequency offset estimation contains the transmitted training sequence (as opposed to garbage). Typically channel and 7 WO 2008/001293 PCT/IB2007/052435 frequency offset estimates can be obtained using 2 blocks, and the synchronization can be confirmed after 3 or 4 blocks with good peaks. [0041] Once the channel estimation device 260 has estimated a true channel estimate, the controller 210 can use this channel estimate to extract data from the data portion of the received packet. [0042] FIG. 3 is a block diagram outlining various exemplary operations directed to the reception, processing and data extraction of block transmission packets. The process starts in step 302 where a block transmission packet, such as the block transmission packet 400 of FIG. 4, is received. Next, in step 304, the received packet is correlated with a predetermined training sequence in order to assure, among other things, that a valid packet has been received. Then, in step 306, the preamble is extracted from the received packet, and the first block of the preamble is identified. Control continues to step 310. [0043] In step 310, the first packet is processed according to a number of intermediate steps 312-320, which can (optionally) be performed in a parallel fashion. [0044] In a first line of processing, control starts with step 312 where a frequency offset estimation procedure can be performed. Next, in step 314, a frequency offset correction procedure can be conditionally performed assuming that the correct frequency offset can be estimated in step 312. Then, in step 316, a channel estimation procedure can performed with the caveat that frequency offset and noise should be accounted for before a proper preliminary channel estimate can be derived. Control continues to step 330. [0045] In a second line of processing, control starts with step 312 where a synchronization procedure is performed. Control continues to step 330. [0046] In step 330, a determination is made as to whether the synchronization procedure of step 320 was successfully performed. As discussed above, synchronization may be determined when a strong output pulse is found in the output of a correlator for a particular location within a block. However, as a higher level of confidence may be had by processing multiple blocks, synchronization may by definition require the processing of multiple blocks. If a successful synchronization is determined to be produced; control continues to step 332; otherwise, control 8 WO 2008/001293 PCT/IB2007/052435 jumps to step 340. [0047] In step 340, which assumes an unsuccessful synchronization, a determination is made as to whether the last available block in the preamble was processed in step 310. If the last available block in the preamble was processed, control continues to step 342, where a failure report is issued to some relevant control circuitry, and the process stops at step 390. [0048] If the last available block in the preamble was not processed, control jumps to step 350, where the next sequential block in the preamble is identified. Control then jumps back to step 310 wherein the above-described frequency offset estimation, frequency offset correction, channel estimation and synchronization steps 312-320 are performed on the next identified block. [0049] In step 332, which assumes a successful synchronization process at step 330, the synchronization offset produced by step 320 can be applied to the preliminary channel estimation output of step 316 to cyclically shift the channel estimation output - thus producing a true channel estimate. Next, in step 334, the true channel estimate can be used to extract data from the data portion of the received packet, and control continues to step 390 where the process stops. [0050] In various embodiments where the above-described systems and/or methods are implemented using a programmable device, such as a computer-based system or programmable logic, it should be appreciated that the above-described systems and methods can be implemented using any of various known or later developed programming languages, such as "C", "C++", "FORTRAN", Pascal", "VHDL" and the like. [0051] Accordingly, various storage media, such as magnetic computer disks, optical disks, electronic memories and the like, can be prepared that can contain information that can direct a device, such as a computer, to implement the above-described systems and/or methods. Once an appropriate device has access to the information and programs contained on the storage media, the storage media can provide the information and programs to the device, thus enabling the device to perform the above-described systems and/or methods. [0052] For example, if a computer disk containing appropriate materials, such as a source file, an object file, an executable file or the like, were provided to a computer, the computer could receive the information, appropriately configure itself and perform the functions of the various 9 WO 2008/001293 PCT/IB2007/052435 systems and methods outlined in the diagrams and flowcharts above to implement the various functions. That is, the computer could receive various portions of information from the disk relating to different elements of the above-described systems and/or methods, implement the individual systems and/or methods and coordinate the functions of the individual systems and/or methods described above. [0053] The many features and advantages of the present teachings are apparent from the detailed specification, and thus, it is intended by the appended claims to cover all such features and advantages of the present teachings which fall within the true spirit and scope of the present teachings. Further, since numerous modifications and variations will readily occur to those skilled in the art, it is not desired to limit the invention to the exact construction and operation illustrated and described, and accordingly, all suitable modifications and equivalents may be resorted to, falling within the scope of the invention. 10

Claims (23)

1. A communication device configured for the use with a communication signal having a specialized preamble that allows for increased bandwidth efficiency, the communication device comprising: a first device configured to manipulate a block transmission signal having a block size of N, wherein N is an integer greater than 1; wherein the block transmission signal has a preamble with a symbol configuration such that at least one symbol of all symbols of the preamble can each be used for all of frequency offset estimation, clock synchronization and channel estimation.

2. The communication device according to claim 1, wherein the block transmission signal has a preamble with a symbol configuration such that at least 50% of all symbols of the preamble can each be used for all of frequency offset estimation, clock synchronization and channel estimation.

3. The communication device according to claim 2, wherein the block transmission signal has a preamble with a symbol configuration such that substantially all symbols of the preamble can each be used for at least two of frequency offset estimation, clock synchronization and channel estimation.

4. The communication device according to claim 1, wherein the preamble is cyclically orthogonal.

5. The communication device according to claim 4, wherein the preamble uses have no zero padding or no cyclic prefix. 11 WO 2008/001293 PCT/IB2007/052435

6. The communication device according to claim 4, wherein the preamble has a symbol configuration such that each symbol has equal magnitude and has a substantially flat frequency response.

7. The communication device according to claim 1, wherein the communication signal is an orthogonal frequency division multiplexed (OFDM) signal.

8. The communication device according to claim 6, wherein the preamble consists of a repeating block of symbols, and wherein each symbol value a, of the repeating block is determined by the following equation: a. =e 8eN ,n = 0,...,N -1 wherein n is a symbol number.

9. The communication device according to claim 8, wherein the first device is a portion of a receiver.

10. The communication device according to claim 9, wherein the first device includes a frequency offset estimation device for estimating frequency offset, a synchronization device for estimating the timing of a received signal and a channel estimation device for estimating the channel response of a received signal, and wherein the synchronization device is configured to operate in parallel with at least one of the frequency offset estimation device and the channel estimation device.

11. A method for the reception and data extraction of block transmission communication signals, the method comprising: receiving a block transmission communication signal having a block size of length N, 12 WO 2008/001293 PCT/IB2007/052435 wherein N is an integer greater than 1; performing at least two of frequency offset estimation, clock synchronization and channel estimation for the first block transmission communication signal using a common set of symbols in a first preamble of the block transmission communication signal.

12. The method for the reception and data extraction according to claim 11, further comprising performing all three of frequency offset estimation, clock synchronization and channel estimation using a common set of symbols in a first preamble.

13. The method for the reception and data extraction according to claim 12, wherein the common set of symbols in the first preamble includes a repeating block of symbols.

14. The method for the reception and data extraction according to claim 13, wherein each symbol value a, of the repeating block is determined by the following equation: 71 I. 7 2 a. = e 8eN ,n = 0,...,N -1 wherein n is a symbol number.

15. The method for the reception and data extraction according to claim 12, wherein the step of clock synchronization is performed in parallel with at least one of the steps of frequency offset estimation and channel estimation.

16. The method for the reception and data extraction according to claim 12, wherein the step of clock synchronization includes detecting a large peak during a running power spectrum detection process. 13 WO 2008/001293 PCT/IB2007/052435

17. The method for the reception and data extraction according to claim 16, wherein the step of clock synchronization includes detecting multiple large peaks at a common location during a running power spectrum detection process on multiple blocks of a series of repeating blocks of symbols.

18. The method for the reception and data extraction according to claim 13, wherein the step of clock synchronization is required to use at least one more block than either of the steps of frequency offset estimation and channel estimation.

19. The method for the reception and data extraction according to claim 13, wherein first preamble contains no zero padding or cyclic prefix.

20. The method for the reception and data extraction according to claim 13, wherein the step of channel estimation includes averaging noise over a plurality of preamble blocks.

21. An electromagnetic wave propagating through a transmission medium, the electromagnetic wave comprising: an block transmission communication signal having a block length equal to N, wherein N is an integer greater than 1, wherein the preamble includes a repeating block of symbols, and each symbol value a, of the repeating block is determined by the following equation: a. = e 8eN ,n = 0,...,N -1 wherein n is a symbol number.

22. The electromagnetic wave extraction according to claim 21, wherein the 14 WO 2008/001293 PCT/IB2007/052435 preamble contains no zero padding or cyclic prefix.

23. The electromagnetic wave extraction according to claim 21, wherein the electromagnetic wave consists of an orthogonal frequency division multiplexed (OFDM) communication signal. 15