KR20090028727A - Design of preamble structure for block transmission signals and receiver therefor - Google Patents

Abstract

A communication device configured for the use of transporting a communication signal having a specialized preamble allowing for increased bandwidth efficiency is disclosed. The communication device includes a first device configured to manipulate a block transmission scheme, such as OFDM or SCBT signal, having a block size equal to N, wherein N is an integer greater than 1, wherein the block transmission signal has a preamble with a symbol configuration such that a percentage of all symbols of the preamble can each be used for all of frequency offset estimation, clock synchronization and channel estimation.

Description

DESIGN OF PREAMBLE STRUCTURE FOR BLOCK TRANSMISSION SIGNALS AND RECEIVER THEREFOR}

This disclosure belongs to the field of packet-based communication systems.

Typically, in conventional block transmission methods, such as orthogonal frequency division multiplexing (OFDM) or single carrier block transmission (SCBT) transmission systems using a packet-based protocol, each packet sent and received is preceded by a data field preamble. It consists of. Each data field will typically contain a data bit stream, a header, and some data check forms. Each preamble will include a sequence of two or three separate portions dedicated to (1) synchronization, (2) frequency offset estimation, and (3) channel estimation. In such a block transmission structure, the preamble is also typically transmitted in blocks, each block being a few, such as a zero padding (ZP) buffer or a cyclic prefix (CP) buffer, that is, a buffer formed of cyclically redundant symbols. Separated by buffer form.

The packet structure described above has been in use for a long time, but the increased demands of certain data communication systems have put increasing pressure to improve system performance to transfer more data using the same available bandwidth. Therefore, new techniques related to the effective transmission and reception of packetized information are desirable.

In a first embodiment, a communication device configured for use in communicating communication signals has a special preamble that allows for increased bandwidth efficiency. The communication device includes a first device configured to manipulate a block transmission structure, such as an OFDM or SCBT signal with a block size of N, where N is an integer greater than 1 and the block transmission signal is one of all symbols of the preamble. It has a preamble with a symbol configuration that allows the percentage to be used for both frequency offset estimation, clock synchronization and channel estimation.

In a second embodiment, a method for receiving a block transmission communication signal and a data extraction method is for receiving a block transmission communication signal having a block size of N, where N is an integer greater than 1, and a common symbol in a preamble. Performing at least two of frequency offset estimation, clock synchronization, and channel estimation using the set.

In a third embodiment, electromagnetic waves propagating through a transmission medium are presented. The electromagnetic wave includes a block transmission signal having a block size of N, where N is an integer greater than 1, each channel has a preamble containing a repeating block of symbols, each symbol derived from a complex secondary sequence. .

The exemplary embodiments are best understood from the following detailed description when read in conjunction with the accompanying drawings. It is emphasized that various features are not necessarily drawn to scale. In fact, the dimensions may be arbitrarily increased or reduced for clarity of discussion. Wherever applicable and practical, like reference numerals refer to like elements.

1 illustrates an example communications system in accordance with the present disclosure.

2 is a block diagram of an exemplary receiver.

3 is a block diagram that outlines various exemplary operations for receiving, processing, and extracting data in block transmission packets.

4 illustrates exemplary communication waveforms for use with various methods and systems of the present disclosure.

In the following detailed description, for purposes of explanation and not limitation, exemplary embodiments that disclose specific details are set forth in order to provide a thorough understanding of embodiments in accordance with the present teachings. However, it will be apparent to one skilled in the art having the benefit of this disclosure that other embodiments in accordance with the present teachings outside the specific details disclosed herein are within the scope of the appended claims. Moreover, descriptions of well-known devices and methods may be omitted so as not to obscure the description of exemplary embodiments. Such methods and apparatus are clearly within the scope of this teaching.

Typically, in packet-based block transmission systems such as OFDM or SCBT transmission systems, time domain and frequency domain training sequences are transmitted at the beginning of each packet. This training sequence is used by each receiver for signal synchronization (SYNC), frequency offset estimation (FOE) and channel estimation (CE). For example, the time-domain sequence of the MB-OFDM UWB communication system has the same length as 24 OFDM symbols, but each frequency-domain sequence has the same length as 6 OFDM symbols. The time domain sequence is used for synchronization and frequency offset estimation while the frequency domain sequence is used for channel estimation. Typically these OFDM symbols are separated using cyclic prefix (CP) or zero padding (ZP). While this approach follows a simple paradigm, this requires a long preamble, which also reduces the bandwidth efficiency of the system. In high rate communication systems, it may be advantageous to reduce such preamble overhead to improve the bandwidth efficiency of the system.

The method and system can increase efficiency by reducing the preamble overhead, i.e. by reducing the number of symbols required within the preamble, and shorten the time required to process the preamble of the packet once it is received. have.

1 is an exemplary communication system 100 in accordance with the present disclosure. As shown in FIG. 1, the communication system 100 includes a signal source 140 and a signal destination 160 connected by an intermediate transmission medium 150. The intermediate transmission medium 150 has a unique channel response h [t] with an inherent delay t _TAU and an increased noise source η ₀ . Exemplary communication system 100 communicates using a packet-based block transmission method.

However, unlike traditional packet-based block transmission systems, the exemplary communication system 100 can communicate using packets with special preambles, which themselves are capable of both increased bandwidth efficiency and parallelism. Cause.

4 illustrates an example block transmission packet 400 for use with the disclosed method and system. As shown in FIG. 4, the block transmission packet 400 includes a preamble 410 and a data field 420. Preamble 410 includes a repeating block 412 of symbols. The data field includes alternating blocks of data 424 and zero or cyclic prefix 422.

As further shown in FIG. 4, each preamble block 412 may consist of a series of symbols a ₀ ... a _{N -1} , where each symbol a _n is represented by Equation 1 below. Defined by

This equation, sometimes referred to as a "complex quadratic" (CQ) sequence, is known in the communications arts, but was never used in various ways developed by the inventors of the disclosed methods and systems.

The first advantage of the complex quadratic sequence is that it is circularly orthogonal. That is, the plural secondary sequences are orthogonal to any sequence on the basis of a cyclic shift by themselves. This property of complex secondary sequences makes it a very good choice for correlation-based synchronization for block transmission systems because such sequences eliminate the need for any cyclic prefix or zero padding between blocks. This in essence can substantially reduce the preamble overhead.

Another advantage of using complex quadratic sequences is that they have constant power in time, that is, | a _n = 1 | It is This characteristic of the complex secondary sequence may allow the user to transmit the preamble at high power without reaching the power amplifier non-linearity at the receiving side.

Another advantage of the complex quadratic sequence can be found by looking at the discrete Fourier transform (DFT) of the complex quadratic sequence, which is shown in equation 2 below.

The analysis for Equation 2 reveals that the complex second order sequence also has a constant power on frequency, ie | A _k = 1 |. In an OFDM communication system, this feature allows the user to sense the channel over the entire bandwidth, ie across all sub-carriers.

Therefore, the CQ sequence can be a good choice for channel estimation purposes.

Note that each preamble block need not consist of N symbols, but may alternatively have fewer symbols for more practical applications. Furthermore, the length of the preamble block may not be fixed. That is, CQ sequences having different lengths may be used for the same preamble. It can be expected that the preferred block length varies from embodiment to embodiment depending on various factors.

2 is a block diagram of an example receiver 160. As shown in FIG. 2, an exemplary receiver includes a controller 210, a memory 220, a correlation device 230, a synchronization device 240, a frequency offset estimation device 250, a channel estimation device 260 and An input / output device 290. Various components 210-290 are linked via the control / data bus 202.

Although the example receiver 160 of FIG. 2 uses a bus structure, it should be appreciated that any other structure may be used, as known to those skilled in the art. For example, in various embodiments, the various components 210-290 may take the form of dedicated electronic sets or highly specialized architectures arranged in separate electronic components connected together through a series of separate buses.

Some of the components 230-290 listed above may take the form of software / firmware routines residing within the memory 220 and may be executed by a separate server / computer executed by the controller 210 or even by a different controller. It should also be appreciated that it may be executed by software / firmware residing within a separate memory in the system.

In operation, detected / demodulated block transmission packets may be received via input / output device 290 and stored in memory 220 under the control of controller 210. The received packet can then be correlated with the training sequence using correlation device 230 to determine if a valid packet has arrived.

Once a valid packet is detected, the controller 210 can extract the preamble from the packet and provide the same copy of the preamble to the synchronization device 240, the frequency offset estimator 250, and the channel estimator 260.

There is no specific requirement that the receiver 160 perform any parallel processing, but as mentioned above, the preamble of the example packet 400 of FIG. 4 uniquely leads itself to parallel processing. That is, when the preamble of each channel consists of a repetition of a block containing a cyclic orthogonal sequence, different time domain and frequency domain sequences need not be used for synchronization, frequency offset estimation and channel estimation. Thus, as well as frequency offset estimation and correlation, channel estimation can be performed in parallel with synchronization using the same symbol block. In this embodiment, it should be appreciated that synchronization may be performed in parallel with one or both of frequency offset estimation and channel estimation.

However, in order to perform proper channel estimation, the frequency offset may first be considered. Thus, the frequency offset estimation device 250 may perform frequency offset estimation on the preamble. Any frequency offset can be estimated by measuring the phase rotation between similar peaks (generated by the correlation device) within two consecutive blocks. For a more accurate estimate, an average may be obtained for values estimated from different block pairs. Typically, the frequency offset takes only two repeating blocks, but of course the performance and performance requirements can vary widely depending on various circumstances.

Once the frequency offset estimation device 250 provides the appropriate frequency offset information to the channel estimation device 260, the channel estimation device 260 can correctly estimate the reserve channel estimate.

Note that when a cyclic orthogonal sequence is used, in the absence of frequency offset noise, the output of the correlator should indicate the communication channel through which the packet traveled. In other words, in the absence of noise and frequency offset, any M consecutive sample blocks in the output of the correlator may resemble an accurate channel impulse response with an unknown cyclic shift. This can simplify the task of the channel estimation device 260 when no noise is present.

However, when noise is present, channel estimation device 260 can derive a better channel estimate by averaging over a number of consecutive blocks (assuming the frequency offset is corrected).

While the frequency offset estimation device 250 and the channel estimation device 260 are working together, the synchronization device 240 can perform the synchronization procedure independently by finding a large peak during the time correlation. Given the usual channel model (ie, having exponential decay), this approach can provide a good estimate. In order to ensure a higher synchronization success probability, more than one peak (and typically 3-4 peaks) in the same relative position in a sequential repeating block may be needed. In other words, if the system observes that three consecutive blocks produce large peaks within the same position, one can assume with a high degree of certainty that the position of these peaks is the correct synchronization time.

After the synchronization device 240 derives the correct synchronization time, the synchronization device 240 can provide the channel synchronization device 260 with the correct synchronization time.

Further, assuming that channel estimation device 260 produces a correct preliminary channel estimate that describes the frequency offset and (optionally) noise, channel estimation device 260 may generate a true channel estimate. The reserve channel estimate may be cyclically shifted.

If the number of blocks used for synchronization is greater than the number of blocks used for either frequency offset estimation or channel estimation, the training sequence in which the user received the data used for channel estimation and frequency offset estimation was transmitted (as opposed to garbage). Note that you can be reasonably sure that it contains a. Typically channel and frequency offset estimates can be obtained using two blocks, and synchronization can be verified after three or four blocks with good peaks.

Once channel estimation device 260 estimates the true channel estimate, controller 210 can use this channel estimate to extract data from the data portion of the received packet.

3 is a block diagram that outlines various exemplary operations for receiving, processing, and extracting data in block transmission packets. The process begins at step 302 where a block transmission packet, such as block transmission packet 400 of FIG. 4, is received. Then in step 304, the received packet is correlated with a predetermined training sequence, in particular to ensure that a valid packet is received. Then, in step 306, the preamble is extracted from the received packet and the first block of the preamble is identified. Control continues at step 310.

In step 310, the first packet is processed in accordance with a number of intermediate steps 312-320, which intermediate steps may (optionally) be performed.

In the first processing line, control begins at step 312, in which a frequency offset estimation procedure may be performed. Then, in step 314, a frequency offset correction procedure may be performed conditionally, assuming that the correct frequency offset can be estimated in step 312. Then, in step 316, a channel estimation procedure may be performed with the clue that the frequency offset and noise should be accounted for before a suitable preliminary channel estimate can be derived. Control continues at step 330.

At the second processing line, control begins at step 312, where synchronization is performed. Control continues at step 330.

In step 330, a determination is made as to whether the synchronization procedure, step 320, has been performed successfully. As discussed above, synchronization may be determined when a strong output pulse is found at the output of the correlator for a particular location in the block. However, as higher levels of confidence can be brought about by processing multiple blocks, synchronization may naturally require processing of multiple blocks. If it is determined that a successful synchronization will occur; Control continues at step 332; Otherwise, control jumps to step 340.

In step 340 presuming unsuccessful synchronization, a determination is made as to whether the last available block in the preamble has been processed in step 310. If the last available block in the preamble has been processed, control continues at step 342 where failure reports are sent to several relevant control circuits, and the process stops at step 390.

If the last available block in the preamble has not been processed, control jumps to step 350, where the next sequential block in the preamble is identified. Control then jumps back to step 310, in which the frequency offset estimation, frequency offset correction, channel estimation and synchronization steps 312-320 described above are performed on the next identified block.

In step 332, which presupposes a successful synchronization process in step 330, the synchronization offset generated by step 320 is applied to the preliminary channel estimate output of step 316 to cyclically shift the channel estimate output. Can thus generate a true channel estimate. Then, at step 334, a true channel estimate can be used to extract data from the data portion of the received packet, and control continues at step 390, where the process stops.

In various embodiments in which the systems and / or methods described above are implemented using programmable devices, such as computer-based systems or programmable logic, the systems and methods described above may be described as "C", "C ++", "FORTRAN", It should be appreciated that it may be implemented using any of a variety of known or later developed programming languages, such as "Pascal", "VHDL", and the like.

Thus, various storage media may be prepared, such as magnetic computer disks, optical disks, electronic memories, etc., that may contain information that may allow a device such as a computer to implement the systems and / or methods described above. If a suitable device accesses the information and program contained in the storage medium, the storage medium may provide the information and program to the device, thus allowing the device to perform the systems and / or methods described above.

For example, if a computer disk is provided with a suitable material, such as a source file, an object file, an executable file, etc., the computer can receive information, configure itself appropriately, and provide various functions. To implement the functions of the various systems and methods outlined in the above figures and flowcharts can be performed. That is, the computer may receive various pieces of information from the disk for different elements of the systems and / or methods described above, implement individual systems and / or methods, and implement the functionality of the individual systems and / or methods described above. Can be integrated.

Many features and advantages of the present teachings are apparent from the detailed description, and therefore are intended by the appended claims to cover all such features and advantages of the teachings that fall within the true spirit and scope of the teachings. Furthermore, as many variations and modifications will occur to those skilled in the art immediately, it is not required to limit the invention to the precise configuration and operation illustrated and described, and therefore, all suitable modifications and equivalents are intended to be within the scope of the invention. Can be considered.

The present disclosure is available for a packet based communication system.

Claims (23)

A communication device configured for use with a communication signal having a special preamble that allows for increased bandwidth efficiency, the communication device comprising: A first device configured to manipulate a block transmission signal having a block size (N), the first device comprising a first device, where N is an integer greater than 1 1; The block transmission signal has a preamble with a symbol configuration such that each of at least one symbol of all symbols in the preamble can be used for both frequency offset estimation, clock synchronization, and channel estimation. According to claim 1, The block transmission signal has a preamble having a symbol configuration such that at least 50% of each of all symbols in the preamble can be used for both frequency offset estimation, clock synchronization, and channel estimation. The method of claim 2, The block transmission signal has a preamble having a symbol configuration such that substantially all of the symbols of the preamble can each be used for at least two of frequency offset estimation, clock synchronization, and channel estimation. According to claim 1, The preamble is cyclically orthogonal. The method of claim 4, wherein The preamble usage does not have zero padding or no cyclic prefix. The method of claim 4, wherein The preamble has a symbol configuration such that each symbol has the same magnitude and has a substantially flat frequency response. According to claim 1, And the communication signal is an orthogonal frequency division multiplexed (OFDM) signal. The method of claim 6, The preamble consists of repetitive symbol blocks, where each symbol value (a _n ) of the repetitive symbol block is represented by the following equation:

Wherein n is a symbol number. The method of claim 8, The first device is part of a receiver. The method of claim 9, The first device includes a frequency offset estimating device for estimating a frequency offset, a synchronization device for estimating timing of a received signal, and a channel estimating device for estimating a channel response of the received signal, wherein the synchronization device includes a frequency offset estimation. And operate in parallel with at least one of the device and the channel estimation device. A method of receiving a block transmission communication signal and extracting data, Receiving a block transmission communication signal having a block size of length N, where N is an integer greater than one; Performing at least two of frequency offset estimation, clock synchronization, and channel estimation for the first block transmission communication signal using the common symbol set in the first preamble of the block transmission communication signal. Receiving and data extraction method of the block transmission communication signal comprising a. The method of claim 11, wherein And performing all three of frequency offset estimation, clock synchronization, and channel estimation using a common set of symbols in the first preamble. The method of claim 12, The common symbol set in the first preamble includes a repetitive symbol block. The method of claim 13, Each symbol value (a _n ) of an iterative symbol block is represented by the following equation:

And n is a symbol number, wherein the block transmission communication signal is received and extracted data. The method of claim 12, And the clock synchronizing step is performed in parallel with at least one of the frequency offset estimating step and the channel estimating step. The method of claim 12, The clock synchronization step includes detecting a large peak during a running power spectrum detection process. The method of claim 16, The clock synchronization step includes detecting a plurality of large peaks at a common location during a power spectrum detection process running on a plurality of blocks that are a series of repetitive symbol blocks. In claim 13, The clock synchronization step requires using at least one more block than the frequency offset estimation step and the channel estimation step. The method of claim 13, The method of claim 1, wherein the first preamble does not include zero padding or cyclic prefix. The method of claim 13, And channel estimating comprises averaging noise over the plurality of preamble blocks. As electromagnetic waves propagate through a transmission medium, A block transmission communication signal having a block length N, where N is an integer greater than 1, the preamble includes a repetitive symbol block, and each symbol value a _n of the repetitive symbol block is represented by the following equation:

And n is a symbol number. The method of claim 21, The preamble is electromagnetic wave free of zero padding or cyclic prefix. The method of claim 21, An electromagnetic wave, consisting of an orthogonal frequency division multiplexed (OFDM) communication signal.

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