WO2007146848A2 - Surface modification of interlayer dielectric for minimizing contamination and surface degradation - Google Patents

Surface modification of interlayer dielectric for minimizing contamination and surface degradation Download PDF

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Publication number
WO2007146848A2
WO2007146848A2 PCT/US2007/070820 US2007070820W WO2007146848A2 WO 2007146848 A2 WO2007146848 A2 WO 2007146848A2 US 2007070820 W US2007070820 W US 2007070820W WO 2007146848 A2 WO2007146848 A2 WO 2007146848A2
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WO
WIPO (PCT)
Prior art keywords
die
dielectric layer
ihc
conductor
capping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2007/070820
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English (en)
French (fr)
Other versions
WO2007146848A3 (en
Inventor
Artur Kolics
Nanhai Li
Marina Polyanskaya
Mark Weise
Jason Corneille
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lam Research Corp
Original Assignee
Lam Research Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Research Corp filed Critical Lam Research Corp
Priority to CN2007800213631A priority Critical patent/CN101467232B/zh
Priority to KR20087030079A priority patent/KR101480198B1/ko
Priority to JP2009514560A priority patent/JP5078997B2/ja
Publication of WO2007146848A2 publication Critical patent/WO2007146848A2/en
Publication of WO2007146848A3 publication Critical patent/WO2007146848A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B08—CLEANING
    • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
    • B08B3/00—Cleaning by methods involving the use or presence of liquid or steam
    • B08B3/04—Cleaning involving contact with liquid
    • C—CHEMISTRY; METALLURGY
    • C11—ANIMAL OR VEGETABLE OILS, FATS, FATTY SUBSTANCES OR WAXES; FATTY ACIDS THEREFROM; DETERGENTS; CANDLES
    • C11D—DETERGENT COMPOSITIONS; USE OF SINGLE SUBSTANCES AS DETERGENTS; SOAP OR SOAP-MAKING; RESIN SOAPS; RECOVERY OF GLYCEROL
    • C11D7/00—Compositions of detergents based essentially on non-surface-active compounds
    • C11D7/02—Inorganic compounds
    • C11D7/04—Water-soluble compounds
    • C11D7/08—Acids
    • C—CHEMISTRY; METALLURGY
    • C11—ANIMAL OR VEGETABLE OILS, FATS, FATTY SUBSTANCES OR WAXES; FATTY ACIDS THEREFROM; DETERGENTS; CANDLES
    • C11D—DETERGENT COMPOSITIONS; USE OF SINGLE SUBSTANCES AS DETERGENTS; SOAP OR SOAP-MAKING; RESIN SOAPS; RECOVERY OF GLYCEROL
    • C11D7/00—Compositions of detergents based essentially on non-surface-active compounds
    • C11D7/22—Organic compounds
    • C—CHEMISTRY; METALLURGY
    • C11—ANIMAL OR VEGETABLE OILS, FATS, FATTY SUBSTANCES OR WAXES; FATTY ACIDS THEREFROM; DETERGENTS; CANDLES
    • C11D—DETERGENT COMPOSITIONS; USE OF SINGLE SUBSTANCES AS DETERGENTS; SOAP OR SOAP-MAKING; RESIN SOAPS; RECOVERY OF GLYCEROL
    • C11D7/00—Compositions of detergents based essentially on non-surface-active compounds
    • C11D7/22—Organic compounds
    • C11D7/32—Organic compounds containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76862—Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76864—Thermal treatment

Definitions

  • TECHMICAi FIELD l:hc present itwfMkm aisles psiemlv to pmMsmduetor .s ⁇ te.ti3&, and more ⁇ eo&siJIy to advanced ⁇ miso ⁇ ifcetGr mtrswlk ⁇ urksg $j « sfe ⁇ B w.d device ⁇ st ⁇ m.
  • the -didksctne b ⁇ erss are s ⁇ e €l ⁇ sd IB sar&ee cftaitsmi ⁇ tbK :is ⁇ the mat ⁇ ulaeti-ems* pmcess
  • hin der lii ⁇ i 1 be uicre ⁇ tc m mn ⁇ turc b ⁇ ski-yp C ⁇ H p ⁇ u ⁇ vlo (lie ⁇ xuia ⁇ c ⁇ o? the to? ⁇ v U>CT v ⁇ f ⁇ i (. tt jsl thi?
  • Tl ⁇ adviMaggs will teeTM s ⁇ pwm to tfess -$ki ⁇ k ⁇ m ⁇ m m% fmm a reasling of ⁇ hs? folbwlssg; delisilOd des ⁇ fiplios ⁇ Whso tskpi. with ⁇ fae ⁇ s to tlis ac € ⁇ rs ⁇ iss ⁇ sssg
  • FlCl, 6 is & dose up view of the ⁇ mi ⁇ diiCfOT m:t «r ⁇ > ⁇ mx ⁇ : ai ⁇ r an o.s ⁇ kfe :re:o»v&! sts ⁇ 20 ⁇ ccarding to a seeprf gofedimenl. ef tlae pressM m ⁇ astk>.ra;
  • wl'sere imiltiple fi ⁇ nhodUne ⁇ are disc ⁇ Sv ⁇ i ami d ⁇ cnheti having ⁇ > ⁇ KS fc ⁇ ures i ⁇ i c ⁇ u?] ⁇ ii.s ⁇ 5, tW ck ⁇ ity «5M! eaae of sUus.uiat3O?5 k ⁇ so"i ⁇ k> ⁇ USKI ctf ⁇ pr ⁇ hcn ⁇ k ⁇ IISCRI ⁇ C
  • PRK&s ⁇ ea c, d. a! ⁇ l e aire aiso i ⁇ cluil ⁇ d is ? II ⁇ post-snsairmtH pha ⁇ e csCtbe cappmg p?oc- ⁇ &.s.
  • ⁇ dideciOL' layer 1(14, »Ltcf ⁇ a,-? ⁇ & ILD, l ⁇ as hee& deposited on ?he sen ⁇ ico ⁇ d ⁇ ctor vvafo Ii ⁇ -, TIw dkitdric lmyer KM is of cHcksf ⁇ c ms ⁇ nls s ⁇ ch a ⁇ silicon o ⁇ id? ⁇ SC ⁇ > M) ⁇ e$rse?hsi> ⁇ ysit ⁇ &£ tl Et)S), h»>mph ⁇ >sphnsilicate (, B PSG J g ⁇ ss, eic. wills dselectrk constants, from 4.2 k5 3.
  • the capping layer 700 cars be s meta I or meta ⁇ co ⁇ iposmd s ⁇ ch ss c ⁇ Kih i.Co ) or ⁇ ibsh t ⁇ ) lig ten plk ⁇ ptu.' ⁇ KH-i « f Cu'WP) dqju ⁇ i ⁇ il by dectr ⁇ fe ⁇ deposit iu ⁇ ,

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Oil, Petroleum & Natural Gas (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Wood Science & Technology (AREA)
  • Organic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
PCT/US2007/070820 2006-06-09 2007-06-09 Surface modification of interlayer dielectric for minimizing contamination and surface degradation Ceased WO2007146848A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN2007800213631A CN101467232B (zh) 2006-06-09 2007-06-09 用于使污染及表面退化最小化的中间介电层的表面改变
KR20087030079A KR101480198B1 (ko) 2006-06-09 2007-06-09 오염 및 표면 열화를 최소화하기 위한 층간 유전체의 표면 개질
JP2009514560A JP5078997B2 (ja) 2006-06-09 2007-06-09 汚染および表面分解を最小限に抑えるための層間絶縁膜の表面改質

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US80442506P 2006-06-09 2006-06-09
US60/804,425 2006-06-09
US11/760,722 2007-06-08
US11/760,722 US7772128B2 (en) 2006-06-09 2007-06-08 Semiconductor system with surface modification

Publications (2)

Publication Number Publication Date
WO2007146848A2 true WO2007146848A2 (en) 2007-12-21
WO2007146848A3 WO2007146848A3 (en) 2008-03-06

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/070820 Ceased WO2007146848A2 (en) 2006-06-09 2007-06-09 Surface modification of interlayer dielectric for minimizing contamination and surface degradation

Country Status (6)

Country Link
US (3) US7772128B2 (cg-RX-API-DMAC7.html)
JP (1) JP5078997B2 (cg-RX-API-DMAC7.html)
KR (1) KR101480198B1 (cg-RX-API-DMAC7.html)
CN (2) CN101467232B (cg-RX-API-DMAC7.html)
TW (1) TWI360198B (cg-RX-API-DMAC7.html)
WO (1) WO2007146848A2 (cg-RX-API-DMAC7.html)

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US8821974B2 (en) 2010-08-20 2014-09-02 Dainippon Screen Mfg. Co., Ltd. Substrate processing method
US9058975B2 (en) 2006-06-09 2015-06-16 Lam Research Corporation Cleaning solution formulations for substrates

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KR20100110123A (ko) * 2009-04-02 2010-10-12 삼성전자주식회사 반도체 소자의 제조 방법
KR101186719B1 (ko) * 2009-05-29 2012-09-27 미쓰이 가가쿠 가부시키가이샤 반도체용 시일 조성물, 반도체 장치 및 반도체 장치의 제조 방법
WO2011078982A1 (en) * 2009-12-23 2011-06-30 Lam Research Corporation Post deposition wafer cleaning formulation
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US9059176B2 (en) 2012-04-20 2015-06-16 International Business Machines Corporation Copper interconnect with CVD liner and metallic cap
TWI610806B (zh) 2012-08-08 2018-01-11 ３Ｍ新設資產公司 障壁膜，製造該障壁膜之方法，及包含該障壁膜之物件
TWI689004B (zh) 2012-11-26 2020-03-21 美商應用材料股份有限公司 用於高深寬比半導體元件結構具有污染物去除之無黏附乾燥處理
JP5674851B2 (ja) * 2013-04-09 2015-02-25 株式会社Ｓｃｒｅｅｎホールディングス 基板処理方法および基板処理装置
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US9349691B2 (en) * 2014-07-24 2016-05-24 International Business Machines Corporation Semiconductor device with reduced via resistance
US9425087B1 (en) * 2015-05-29 2016-08-23 Taiwan Semiconductor Manufacturing Co., Ltd Method for forming semiconductor device structure
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CN108140603B (zh) 2015-10-04 2023-02-28 应用材料公司 基板支撑件和挡板设备
CN108140546B (zh) 2015-10-04 2022-04-12 应用材料公司 用于高纵横比特征的干燥工艺
JP6639657B2 (ja) 2015-10-04 2020-02-05 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 熱質量が小さい加圧チャンバ
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CN108573942B (zh) 2017-03-09 2021-09-14 联华电子股份有限公司 内连线结构及其制作方法
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US10790142B2 (en) * 2017-11-28 2020-09-29 Taiwan Semiconductor Manufacturing Co., Ltd. Selective capping processes and structures formed thereby
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US9406556B2 (en) 2016-08-02
US20070287277A1 (en) 2007-12-13
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US20140099789A1 (en) 2014-04-10
US7772128B2 (en) 2010-08-10
JP2009540581A (ja) 2009-11-19
JP5078997B2 (ja) 2012-11-21
TWI360198B (en) 2012-03-11
US20090072190A1 (en) 2009-03-19
TW200805567A (en) 2008-01-16
CN101467232A (zh) 2009-06-24
KR20090017581A (ko) 2009-02-18
CN102522368A (zh) 2012-06-27
WO2007146848A3 (en) 2008-03-06

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