WO2007003132A1 - Carte interface et systeme cti utilisant la carte interface - Google Patents

Carte interface et systeme cti utilisant la carte interface Download PDF

Info

Publication number
WO2007003132A1
WO2007003132A1 PCT/CN2006/001528 CN2006001528W WO2007003132A1 WO 2007003132 A1 WO2007003132 A1 WO 2007003132A1 CN 2006001528 W CN2006001528 W CN 2006001528W WO 2007003132 A1 WO2007003132 A1 WO 2007003132A1
Authority
WO
WIPO (PCT)
Prior art keywords
card
signal
cti
memory
speed
Prior art date
Application number
PCT/CN2006/001528
Other languages
English (en)
French (fr)
Inventor
Yongkun Liao
Liangtian Wang
Original Assignee
Shenzhen Donjin Communication Tech Co., Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Donjin Communication Tech Co., Ltd filed Critical Shenzhen Donjin Communication Tech Co., Ltd
Priority to US11/722,881 priority Critical patent/US7746850B2/en
Publication of WO2007003132A1 publication Critical patent/WO2007003132A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/42—Systems providing special services or facilities to subscribers
    • H04M3/42314—Systems providing special services or facilities to subscribers in private branch exchanges
    • H04M3/42323—PBX's with CTI arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M2201/00—Electronic components, circuits, software, systems or apparatus used in telephone systems
    • H04M2201/40—Electronic components, circuits, software, systems or apparatus used in telephone systems using speech recognition

Definitions

  • the invention relates to a telecom value-added service, in particular to an over-the-counter card and a CTI system using an over-the-machine card.
  • CTI Computer Telephony Integration
  • systems are required to have large channel capacity, and systems are required to have sufficient expansion capabilities due to limitations of stand-alone processing capabilities and system reliability.
  • the entire CTI system must usually be distributed in multiple chassis, which requires a multi-machine interconnection in this CTI application, so that multiple chassis of the distributed structure are interconnected.
  • Multi-machine interconnection in CTI technology is achieved by using a machine card.
  • over-the-air card commonly used in the market: CTBUS extended type, ATM interface conversion type and Ethernet interface conversion type.
  • the CTBUS extended type of over-the-counter card directly converts the unipolar CTBUS bus signal in the machine into the inter-chassis interconnection bus of RS485 mode. Since CTBUS has dozens of signal lines, there are dozens of connections between the chassis. Yes, and all the chassis are actually connected to the same CTBUS bus, so the transmission distance is required to be short (less than 1 meter), and the signal requirements are very strict. When installed, the connection is difficult to install and use, and the reliability is also poor.
  • the ATM interface conversion type of over-the-air card is realized by combining the CTBUS bus data in the machine into an ATM package, and then converting it into an optical fiber transmission through the ATM optical interface, thereby realizing multi-machine interconnection.
  • This type of product features a long connection distance and good scalability, but its high cost and complicated use limit its application.
  • the Ethernet interface conversion type of over-the-counter card is to package the CTBUS bus data to be exchanged in the machine through a special Ethernet packet processor, and realize interconnection of multiple machines through Ethernet interconnection.
  • This type of product is characterized by its simplicity of use and ease of connection, using only one of the most common network twisted pair interconnections.
  • connection distance is long and the scalability is also very good.
  • cost per channel of the product is high, and there is a problem of excessive cost in applications requiring large channel capacity.
  • the technical problem to be solved by the present invention is to provide a low cost and high performance over-the-air card and a CTI system using the same.
  • the technical solution adopted by the present invention is: Providing an over-the-machine card, which is disposed in a CTI single machine, and the over-the-card card and the voice processing unit in the CTI stand-alone unit are connected by a bus through the bus.
  • the transmitting end of the card multiplexes the plurality of low-speed signals from the voice processing unit in the CTI stand-alone into a single high-speed signal and replaces the signal with the level interface conforming to the LVDS; at the receiving end of the card, receives the external
  • the high-speed LVDS signal is converted into a low-voltage TTL interface signal and demultiplexed into a low-speed signal conforming to the local bus standard, and transmitted to the signal processing unit of the CTI stand-alone unit.
  • the over-the-card includes a latching and buffering unit that can receive a serial code stream that is required to be output from the local unit and that is serial-to-parallel converted and latched.
  • a first memory is connected to the latching and buffering unit, the first memory can store the code stream, and a frame flag byte for positioning is written in a specific storage location of the first memory; and the first memory is The other port reads the code stream with a high-speed clock synchronized with the local bus clock, and after serial-to-serial conversion, it is sent to the driver of the LVDS connected to the first memory, and driven to output a level signal in the form of LVDS.
  • the transceiver card further includes an LVDS receiver having a high-speed code stream capable of receiving an LVDS level, and then a serial-to-parallel conversion and latch unit capable of converting a high-speed code stream into a low-speed TTL level signal.
  • the serial-to-parallel conversion and latch unit is connected to a second memory, which confirms the start position of the frame by the judgment logic of the built-in frame sync byte signal, and sequentially writes the low-speed TLL level signal into the local second memory.
  • the other port of the second memory is sequentially read out from the low speed clock from the local bus and passed to the local bus, the overcard further including a frequency divider that divides the received clock signal to generate a second low speed clock signal.
  • the second low speed clock signal is also input to the local total Line.
  • the card is further provided with a dial switch for enabling setting of the card.
  • the present invention further provides a CTI system using an over-the-card card, which includes at least two CTI stand-alone machines, at least one over-the-air card in each CTI stand-alone unit, and each of the over-the-card cards and the voice processing unit in the CTI stand-alone unit.
  • each input card is provided with an input port and an output port, and an over-the-counter card and its target CTI stand-alone over-the-counter card are cross-connected by twisted pair; in each pass card a transmitting end that multiplexes a plurality of low-speed signals from the voice processing unit in the CTI stand-alone into a single high-speed signal and replaces them with signals corresponding to the level interface of the LVDS; at the receiving end of each of the over-cards, The external high-speed LVDS signal is received, converted into a low-voltage TTL interface signal, and demultiplexed into a low-speed signal conforming to the local bus standard, and transmitted to the signal processing unit of the CTI stand-alone unit.
  • the over-the-card includes a latching and buffering unit that can receive a serial code stream that is required to be output from the local unit and that is serial-to-parallel converted and latched.
  • a first memory is connected to the latching and buffering unit, the first memory can store the code stream, and a frame flag byte for positioning is written in a specific storage location of the first memory; and the first memory is The other port reads the code stream with a high-speed clock synchronized with the local bus clock, and after serial-to-serial conversion, it is sent to the driver of the LVDS connected to the first memory, and driven to output a level signal in the form of LVDS.
  • the transceiver card further includes an LVDS receiver having a high-speed code stream capable of receiving an LVDS level, and then a serial-to-parallel conversion and latch unit capable of converting a high-speed code stream into a low-speed TTL level signal.
  • the serial-to-parallel conversion and latch unit is connected to a second memory, which confirms the start position of the frame by the judgment logic of the built-in frame sync byte signal, and sequentially writes the low-speed TLL level signal into the local second memory.
  • the other port of the second memory is sequentially read out from the low speed clock from the local bus and passed to the local bus, the overcard further including a frequency divider that divides the received clock signal to generate a second low speed clock signal.
  • the second low speed clock signal is also input to the local bus.
  • the present invention also provides a CTI system using a card, which includes at least two CTI single machines and one switch, and each CTI single machine has at least one over-the-air card, and each of the over-the-card cards and the CTI stand-alone
  • the voice processing unit is connected through a local bus, and each of the card is provided with an input port and an output port, and each card is connected to the switch by using a twisted pair cable; at the transmitting end of each card
  • the plurality of low-speed signals from the voice processing unit in the CTI stand-alone are multiplexed into a single high-speed signal and replaced with a signal conforming to the level interface of the LVDS; at the receiving end of each of the transceiver cards, the receiving end is received from the switch
  • the high-speed LVDS signal is converted into a low-voltage TTL interface signal and demultiplexed into a low-speed signal conforming to the local bus standard,
  • the over-the-card includes a latching and buffering unit that can receive a serial code stream that is required to be output from the local unit and that is serial-to-parallel converted and latched.
  • a first memory is connected to the latching and buffering unit, the first memory can store the code stream, and a frame flag byte for positioning is written in a specific storage location of the first memory; and the first memory is The other port reads the code stream with a high-speed clock synchronized with the local bus clock, and after serial-to-serial conversion, it is sent to the driver of the LVDS connected to the first memory, and driven to output a level signal in the form of LVDS.
  • the transceiver card further includes an LVDS receiver having a high-speed code stream capable of receiving an LVDS level, and then a serial-to-parallel conversion and latch unit capable of converting a high-speed code stream into a low-speed TTL level signal.
  • the serial-to-parallel conversion and latch unit is connected to a second memory, which confirms the start position of the frame by the judgment logic of the built-in frame sync byte signal, and sequentially writes the low-speed TLL level signal into the local second memory.
  • the other port of the second memory is sequentially read out from the low speed clock from the local bus and passed to the local bus, the overcard further including a frequency divider that divides the received clock signal to generate a second low speed clock signal.
  • the second low speed clock signal is also input to the local bus.
  • the beneficial effects of the present invention are as follows:
  • the CTI provided by the present invention and the CTI using the over-the-machine card are low in cost, and the interconnection between different over-the-card cards can be the simplest and most reliable network twisted pair, and the connection distance can be Up to ten meters or more, the installation is very simple, high reliability, large channel capacity and good expandability.
  • FIG. 1 is a schematic view of a first embodiment of a CTI system using a machine card of the present invention
  • FIG. 2 is a schematic view of a second embodiment of a CTI system using a machine card of the present invention
  • Block diagram of the card
  • FIG. 4 is a timing diagram showing the data of the over card of the present invention.
  • FIG. 1 is a schematic illustration of a first embodiment of a CTI system employing a machine card of the present invention.
  • the CTI system includes only a few CTI stand-alone machines (or PCs).
  • the figure shows CTI stand-alone PC A and PC B, each of which is in a single machine. Both have a voice processing unit (indicated by the garden point in the figure) and an over-the-air card (indicated by a triangle in the figure), and the voice processing unit and the card are connected to each other through a CT-BUS bus.
  • the input and output directions of 32 8M code streams of the CT-BUS bus are defined in each machine.
  • the CT-DO to CT-D15 of the CT-BUS bus defines 16 8M code streams as outputs, CT-D16 to CT - D31 A total of 16 8M code streams are defined as inputs.
  • twisted pairs are used for cross-connection, which realizes interconnection between different CTI single machines.
  • the output (Tx) of PC A is connected to the input (Rx) of PC ⁇ through a twisted pair, and the input (Rx) of PC A passes through another twisted pair and PC B.
  • the output (Tx) is connected. This enables communication between different CTI stand-alone units. In addition, only two CTI stand-alone units are shown in FIG. 1.
  • multiple CTI stand-alone units can also be connected by such direct interconnection, which requires Set up multiple pass-through cards in the CTI stand-alone unit (for example, up to 4 pass-through cards can be inserted), and set the DIP switch on the card as required.
  • FIG. 2 is a schematic diagram of a second embodiment of a CTI system employing a machine card of the present invention.
  • This embodiment is mainly applied to a large-capacity system (such as a million-gate system), and the specific capacity is determined by the capacity of the switch in the figure.
  • four CTI stand-alone units are shown (PC A1, PC Am. PC An And PC Ax), which is merely illustrative of convenience, is not intended to limit the invention.
  • the specific definition of each CTI single machine is the same as the definition of the CTI stand-alone unit in FIG. 1.
  • the output card and the voice processing unit output in each CTI stand-alone unit are interconnected by a CT-BUS bus.
  • each CTI stand-alone card The input (Rx) and output (Tx) of each CTI stand-alone card are connected to the switch through twisted pairs.
  • the over-the-counter card on each CTI unit outputs a total of 16 8M code streams 2K time slots from the CT-D0 to CTJD15 in the CT-BUS bus of the local machine (such as PC A1) to the switch.
  • the switch is based on the system. Set the time slots to be exchanged to the corresponding time slots of the corresponding CTI stand-alone (such as PC Am), and simultaneously exchange the time slot data of the corresponding CTI stand-alone (such as PC Am) to the CTJ 16 to CT of the local machine (such as PC A1). – in the corresponding time slot in the D31 code stream.
  • the definition of the twisted pair is defined according to the specific settings of the switch.
  • FIG. 3 is a schematic block diagram of an over-the-counter card in the present invention.
  • the basic implementation principle of the over-the-card card is to utilize the low-voltage differential signal (LVDS) to transmit the fast speed, and the over-the-counter card is included in the transmitting end (Rx) of the over-the-card card.
  • LVDS low-voltage differential signal
  • the low-speed signals of the CT-BUS bus in the CTI stand-alone are multiplexed into a single high-speed signal, and then converted into signals conforming to the level interface of the LVDS and transmitted; at the receiving end of the card, the received high-speed LVDS
  • the signal is converted into a low-voltage TTL (LVTTL) interface signal, which is then demultiplexed into a signal processing unit of the local (CTI stand-alone) for processing in the low-speed signal conforming to the CT-BUS bus standard.
  • LVTTL low-voltage TTL
  • the basic signal processing flow of the over-the-counter card is as follows: In the transmission process, the over-the-counter card will be from the voice processing unit of the local machine to the CT_D0 to CT-D15 in the CT-BUS bus defined as the local output. A total of 16 serial 8M code streams are received, and after the serial-to-parallel conversion, latching, etc. processing of the latch and buffer unit, the first memory (which can be a double-ended memory DPRAM) is stored in a byte manner.
  • the first memory which can be a double-ended memory DPRAM
  • the card is sent from the switch or other card to the LVDS.
  • the level 128M data stream is also received by the 128M clock synchronized with it, and is converted into an LV-TTL level signal through the LVDS receiver.
  • the frame start position is confirmed by the judgment logic of the built-in frame sync byte signal.
  • the sequence is written to the local second memory (such as DPRAM), and the other port of the second memory is sequentially read by the 8M clock from the local CT-BUS, and then sent to the CT-BUS bus.
  • the received clock signal is divided by the frequency divider to generate an 8K clock signal, which is input to the local CT-BUS bus to the voice processing unit.
  • the specific enable is set by the DIP switch on the card. For ease of use, manual settings can be used to enable various configurations of the card.
  • the default application of the over-the-card card of the present invention is to interface with the switch, and nothing needs to be set; when the peer-to-peer application is to be performed, that is, only when it is connected with another over-the-card card of the CTI stand-alone, it needs to be set.
  • the switch can be omitted, and only the ring-shaped networking working mode can be set.
  • the connection is the same as the point-to-point approach, except that the primary RJ45 of each point is connected to the other point from the RJ45. Or set to the working mode of 16M code stream.
  • a single CTI can be plugged into multiple cards.
  • the setting method is as follows: CTI single-machine plug-in multi-block card settings instructions
  • the setting of the DIP switch S5 is limited by the state of the DIP switch S4.
  • FIG. 4 it is a schematic diagram of the main data timing of the overhaul card in the present invention.
  • CT-BUS After the frame sync SYNC is valid, the rising edge of the first CLK clock, CT-BUS sends 16-bit data at the same time, and all the data is latched on the CTX2000C with the rising edge of CLK, after serial-to-parallel conversion. And store, and then use the 128M high-speed clock to forward the data stored in 16 channels of DPRAM A in the corresponding order. Then, on the 128M data stream, the data stream of one time slot and one time slot is also transmitted.
  • the over-the-counter card used in the present invention and the CTI system using the over-the-card card have a simple wiring mode, and at least one twisted pair is required to realize data transmission and reception of all 2K time slots. It is easy to use, no software setting is required, just set the DIP switch on the card to meet the needs of different applications.
  • the internal design is FPGA-based, and internal logic can be upgraded online to meet new application needs based on technology updates.

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)

Description

一种过机卡及采用过机卡的 CTI系统 技术领域
本发明涉及电信增值业务， 特别是涉及一种过机卡及采用过机卡的 CTI 系统。
背景技术
在计算机电话系统集成（Computer Telephony Integration, CTI)应用， 特 别是电信增值业务中， 往往要求系统有很大的通道容量， 同时要求系统有足 够的扩展能力， 由于单机处理能力的限制和系统可靠性的要求， 整个 CTI系 统通常必须分布在多个机箱内， 这就要求在这种 CTI应用中必须提供多机互 连的手段， 使分布结构的多个机箱互连成为一个整体。 在 CTI技术中多机互 连是采用过机卡来实现的。 目前市场常用的过机卡共有三种类型： CTBUS延 长型、 ATM接口转换型及以太网接口转换型。
其中， CTBUS延长型的过机卡是通过将机内的单极性 CTBUS总线信号 直接转换成 RS485方式的机箱间互连总线， 由于 CTBUS有几十根信号线， 所以机箱间连线有几十对， 而且所有机箱实际上是接在同一个 CTBUS 总线 上， 所以要求传输距离很短（小于 1米）， 对信号要求很严。 使用时连接安装 和使用都比较复杂， 可靠性也较差。
ATM接口转换型的过机卡是通过将机内的 CTBUS总线数据合并组合成 ATM包， 再通过 ATM光接口转换为光纤传输， 从而实现多机互连。 该类型 产品特点是连接距离可以很远、 扩展性好， 但其成本高， 使用较复杂， 从而 限制了其应用。
以太网接口转换型的过机卡是将机内要过机交换的 CTBUS 总线数据通 过专门的以太网包处理器打包， 通过以太网互连实现多机的互连。 该类型产 品的特点是使用较简单， 连接方便， 只须使用一根最常用的网络双绞线互连，
1
确认本 连接距离较远， 扩展性也很好。 但该产品的每通道成本较高， 在需要大通道 容量的应用时就存在成本过高的问题。
发明内容
本发明所要解决的技术问题在于， 提供一种低成本及高性能的过机卡及 采用该过机卡的 CTI系统。
为解决上述的技术问题， 本发明所采用的技术方案在于： 提供一种过机 卡， 其设置在 CTI单机内， 该过机卡与该 CTI单机内的语音处理单元通过总 线连接， 在过机卡的发送端， 把该 CTI单机中来自语音处理单元的多个低速 信号复用成单个高速的信号， 并换成符合 LVDS 的电平接口的信号； 在过机 卡的接收端， 接收外部的高速 LVDS信号， 转换成低压 TTL接口信号， 并解 复用成符合本地总线标准的低速信号， 传送至该 CTI单机的信号处理单元。
其中， 所述过机卡中进一步包括一个可接收来自本机的语音处理单元的 定义为需本机输出的串行码流、 并对其进行串并转换及锁存的锁存和缓冲单 元， 锁存和缓冲单元后面连接有一第一存储器， 该第一存储器可存储该码流， 且在该第一存储器的特定存储位置写入有用于定位作用的帧标志字节； 而该 第一存储器的另一端口用同步于本地总线时钟的高速时钟把该码流读出， 经 并串转换后送至与该第一存储器连接的 LVDS 的驱动器， 经其驱动， 输出 LVDS形式的电平信号。
其中， 所述过机卡进一步包括有可接收 LVDS 电平的高速码流的 LVDS 接收器， 其后连接有可将高速码流转换成低速 TTL的电平信号的串并转换及 锁存单元， 串并转换及锁存单元连接有一第二存储器， 其通过内置帧同步字 节信号的判断逻辑， 确认帧起始位置， 将该低速 TLL电平信号顺序写入该本 地的第二存储器中， 在第二存储器的另一端口用来自本地总线的低速时钟顺 序读出来并传至本地总线， 所述过机卡进一步包括可把接收到的时钟信号分 频以产生第二低速时钟信号的分频器， 该第二低速时钟信号亦输入到本地总 线。
其中， 所述过机卡上进一步设有用于对该过机卡进行使能设置的拨码开 关。
本发明还提供一种采用过机卡的 CTI系统，其至少包括有两个 CTI单机， 每一 CTI单机中至少设有一个过机卡， 每一过机卡与该 CTI单机中的语音处 理单元通过本地总线连接， 且每一过机卡上均设有输入口和输出口， 某一过 机卡与其目标不 CTI单机的过机卡采用双绞线对进行交叉连接； 在每一个过 机卡的发送端， 其把该 CTI单机中来自语音处理单元的多个低速信号复用成 单个高速的信号， 并换成符合 LVDS的电平接口的信号； 在每一过机卡的接 收端， 其接收外部的高速 LVDS信号， 转换成低压 TTL接口信号， 并解复用 成符合本地总线标准的低速信号， 传送至该 CTI单机的信号处理单元。
其中， 所述过机卡中进一步包括一个可接收来自本机的语音处理单元的 定义为需本机输出的串行码流、 并对其进行串并转换及锁存的锁存和缓冲单 元， 锁存和缓冲单元后面连接有一第一存储器， 该第一存储器可存储该码流, 且在该第一存储器的特定存储位置写入有用于定位作用的帧标志字节； 而该 第一存储器的另一端口用同步于本地总线时钟的高速时钟把该码流读出， 经 并串转换后送至与该第一存储器连接的 LVDS 的驱动器， 经其驱动， 输出 LVDS形式的电平信号。
其中， 所述过机卡进一步包括有可接收 LVDS 电平的高速码流的 LVDS 接收器， 其后连接有可将高速码流转换成低速 TTL的电平信号的串并转换及 锁存单元， 串并转换及锁存单元连接有一第二存储器， 其通过内置帧同步字 节信号的判断逻辑， 确认帧起始位置， 将该低速 TLL电平信号顺序写入该本 地的第二存储器中， 在第二存储器的另一端口用来自本地总线的低速时钟顺 序读出来并传至本地总线， 所述过机卡进一步包括可把接收到的时钟信号分 频以产生第二低速时钟信号的分频器， 该第二低速时钟信号亦输入到本地总 线。 本发明还提供一种采用过机卡的 CTI系统， 其至少包括有两个 CTI单机 及一交换机， 每一 CTI单机中至少设有一个过机卡， 每一过机卡与该 CTI单 机中的语音处理单元通过本地总线连接， 且每一过机卡上均设有输入口和输 出口， 每一过机卡均采用双绞线连接到所述交换机上； 在每一个过机卡的发 送端， 其把该 CTI单机中来自语音处理单元的多个低速信号复用成单个高速 的信号， 并换成符合 LVDS 的电平接口的信号； 在每一过机卡的接收端， 其 接收来自交换机的高速 LVDS信号， 转换成低压 TTL接口信号， 并解复用成 符合本地总线标准的低速信号， 传送至该 CTI单机的信号处理单元。
其中， 所述过机卡中进一步包括一个可接收来自本机的语音处理单元的 定义为需本机输出的串行码流、 并对其进行串并转换及锁存的锁存和缓冲单 元， 锁存和缓冲单元后面连接有一第一存储器， 该第一存储器可存储该码流， 且在该第一存储器的特定存储位置写入有用于定位作用的帧标志字节； 而该 第一存储器的另一端口用同步于本地总线时钟的高速时钟把该码流读出， 经 并串转换后送至与该第一存储器连接的 LVDS 的驱动器， 经其驱动， 输出 LVDS形式的电平信号。
其中， 所述过机卡进一步包括有可接收 LVDS 电平的高速码流的 LVDS 接收器， 其后连接有可将高速码流转换成低速 TTL的电平信号的串并转换及 锁存单元， 串并转换及锁存单元连接有一第二存储器， 其通过内置帧同步字 节信号的判断逻辑， 确认帧起始位置， 将该低速 TLL电平信号顺序写入该本 地的第二存储器中， 在第二存储器的另一端口用来自本地总线的低速时钟顺 序读出来并传至本地总线， 所述过机卡进一步包括可把接收到的时钟信号分 频以产生第二低速时钟信号的分频器， 该第二低速时钟信号亦输入到本地总 线。
本发明的有益效果在于： 本发明所提供的过机卡及采用过机卡的 CTI成 本低， 而不同的过机卡之间的互连可采用最简单可靠的网络双绞线， 连接距 离可达十米以上， 安装使用非常简单、 可靠性高、 通道容量大且扩展性好。 附图说明
图 1是本发明的采用过机卡的 CTI系统的第一实施例的示意图； 图 2是本发明的采用过机卡的 CTI系统的第二实施例的示意图； 图 3是本发明的过机卡的原理框图；
图 4是本发明的过机卡的数据时序示意图。
具体实施方式
图 1是本发明的采用过机卡的 CTI系统的第一实施例的示意图。 在该图 中示出了一种小容量的 CTI系统， 该 CTI系统只包括少数几台 CTI单机 （或 称为 PC)， 图中示出了 CTI单机 PC A及 PC B， 每一台单机中均设有语音处 理单元（图中以园点指示）及过机卡（图中以三角形指示）， 该语音处理单元 与过机卡之间均是通过 CT-BUS 总线互相连接的。 在每台机器的内部定义好 CT-BUS总线的 32个 8M码流的输入输出方向， 其中 CT-BUS总线的 CT—DO 到 CT—D15共 16个 8M码流定义为输出， CT— D16到 CT— D31共 16个 8M码 流定义为输入。 而在不同的 CTI单机之间采用双绞线迸行交叉连接， 实现不 同的 CTI单机之间的互连。 在图 1中， 具体来说， PC A的输出端 (Tx)通过 一双绞线与 PC Β的输入端（Rx)连接， PC A的输入端 （Rx)通过另一双绞 线与 PC B的输出端（Tx)连接。这样就实现了不同 CTI单机之间的通信。另 外， 在该图 1中仅示出了两个 CTI单机， 在其他的实施例中， 也可以通过这 种直接互连的方式连接多台 CTI单机（诸如 4台），这就需要在每一 CTI单机 中设置多个过机卡（例如最多可插 4块过机卡）， 并依据要求设置卡上拨码开 关来实现。
图 2是本发明的采用过机卡的 CTI系统的第二实施例的示意图。 该实施 例主要应用在大容量的系统 （如万门级的系统） 中， 具体的容量由图中的交 换机的容量来确定。在该图中，示出了四台 CTI单机（PC A1、 PC Am. PC An 及 PC Ax)， 在此仅作为举例说明的方便， 非为限定本发明。 其中， 每一 CTI 单机的具体定义与图 1的 CTI单机的定义一样， 每一台 CTI单机中的过机卡 与语音处理单元输出均采用 CT-BUS总线互连。 每一台 CTI单机的过机卡的 输入端 （Rx)及输出端 （Tx) 分别通过双绞线与交换机连接。 在原理上， 每 一 CTI单机上的过机卡把本机（如 PC A1 ) 的 CT-BUS总线中的 CT—D0到 CTJD15共 16个 8M码流 2K时隙输出给交换机，交换机依据系统的设置把这 些时隙交换到对应 CTI单机（如 PC Am) 的相应的时隙， 同时把对应 CTI单 机（如 PC Am)的时隙数据又交换到本机（如 PC A1 )的 CTJ 16到 CT— D31 码流中的对应时隙中。在该实施例中， CTI单机与交换机的连接时，其双绞线 对的定义要根据交换机的具体设置来定义。
图 3是本发明中的过机卡的原理框图。 在本发明中， 过机卡基本实现原 理是利用低电压差动信号（Low Voltage Differential Signal, LVDS )的传输速 度快的特点，在过机卡的发送端（Rx)，把包括该过机卡的 CTI单机中 CT-BUS 总线的多个低速信号复用成单个高速的信号， 然后转换成符合 LVDS 的电平 接口的信号并发送出去； 在过机卡的接收端， 把接收到的高速 LVDS信号转 换成低压 TTL (LVTTL)接口信号， 然后解复用成符合 CT-BUS总线标准的 低速信号送入本机（CTI单机） 的信号处理单元中进行处理。
结合图 3， 过机卡的基本信号处理流程说明如下： 发送处理中， 该过机卡 会从来自本机的语音处理单元的把定义为本机输出的 CT—BUS总线中 CT_D0 到 CT—D15共 16个串行的 8M码流接收下来， 经过锁存和缓冲单元的串并转 换、 锁存等处理以后， 以字节的方式存储第一存储器（该存储器可为双端存 储器 DPRAM)中，并在该第一存储器的特定存储位置写入用于定位作用的帧 标志字节；在第一存储器的另一端口用同步于本地 CT-BUS时钟的 128M时钟 把数据读出来， 进行并串转换以后再转发； 然后经 LVDS的驱动器驱动， 以 LVDS的电平信号传输到交换机或者到其它过机卡上。
同理， 接收处理中， 该过机卡把从交换机或其它过机卡发送过来 LVDS 电平的 128M数据流也用与其同步的 128M时钟收下来，经过 LVDS的接收器， 转换成 LV— TTL的电平信号， 通过内置帧同步字节信号的判断逻辑， 确认帧 起始位置， /顿序写入本地的第二存储器（如 DPRAM)中， 在第二存储器的另 一端口用来自本地 CT-BUS的 8M时钟顺序读出来， 然后再发送到 CT—BUS 总线上去。 同时把接收到的时钟信号经过分频器的分频处理，产生 8K的时钟 信号， 输入到本地的 CT-BUS总线， 至语音处理单元中。 具体的使能由过机 卡上的拨码开关进行设置。 为了便于使用， 可釆用人工的设置来使能过机卡 的各种配置。
在本发明的过机卡上不需软件控制， 只需要用户根据应用的类型， 预先 设置扳上的拨码开关， 即可进行应用。
例如， 本发明的过机卡缺省的应用是与交换机对接， 可以什么都不需设 置； 当要进行点对点应用时， 即只和另外一台 CTI单机上的过机卡对接时， 就需要设置好相应的主从时钟等关系了； 当在小于 4k门的交换应用中， 可以 不需交换机， 只需根据设置好环型组网工作模式即可。 注意连线和点对点的 方式一样， 只是每个点的主 RJ45连接到另外一个点的从 RJ45。 或者设置为 16M码流的工作模式。
下面通过表格来说明对过机卡的设置（以码流速率和输出 8K参考时钟的 设置进行说明）：
表 1 CTI单机的过机卡设置说明
Figure imgf000008_0001
在简单的环型组网或简单的点到多点的应用中， 一台 CTI单机可接插多 块过机卡。 其设置方法如下： CTI单机接插多块过机卡的设置说明
Figure imgf000009_0001
其中， 拨码开关 S5的设置由拨码幵关 S4的状态限定， 当 S4=00时， 即 共输出 16个码流， 那么 S5只有一种状态可设， 即从 0码流位置开始输出， 其它的设置是非法的！ 同理， 当 S4=01时， 即共输出 12个码流， 那么 S5只 有两种种状态可设， 即从 0码流或者 4码流位置开始输出， 其它的设置是非 法的！ 其它依此类推。
如图 4所示，是本发明中过机卡的主要数据时序示意图。在帧同步 SYNC 有效后， 第一个 CLK时钟的上升沿， CT-BUS同一时刻送来 16位数据， 在 CTX2000C上用同步于 CLK的上升沿把所有的数据锁存后， 通过串并转换后 并存储， 再用 128M的高速时钟把存储在 DPRAM A中 16个通道的数据按相 应的顺序转发出去。那么在 128M的数据流上也是传输一个时隙一个时隙的数 据流。
对于 128M时钟需要的帧同步信号，为了连线的简便，考虑利用 128M数 据流的一个时隙来产生； 具体占用 CT0—TS0或者 CT15—TS127 (在 8M码流 应用中）， 或者占用 CTO— TS0或者 CT7— TS255 (在 16M码流应用中）。
本发明所采用的过机卡， 及采用该过机卡的 CTI系统， 其接线方式简单， 至少时只需要一个双绞线对就可实现所有 2K时隙的数据收发。 且使用方便， 无需软件设置， 只需设置过机卡上的拨码开关就可满足不同需求的应用。 内 部采用 FPGA设计， 可根据技术的更新而在线升级内部逻辑以满足新的应用 需求。

Claims

权 利 要 求
1、一种过机卡， 其设置在 CTI单机内， 该过机卡与该 CTI单机内的语音 处理单元通过总线连接， 该其特征在于， 在过机卡的发送端， 把该 CTI单机 中来自语音处理单元的多个低速信号复用成单个高速的信号， 并换成符合
LVDS的电平接口的信号； 在过机卡的接收端， 接收外部的高速 LVDS信号， 转换成低压 TTL接口信号， 并解复用成符合本地总线标准的低速信号， 传送 至该 CTI单机的信号处理单元。
2、 如权利要求 1的过机卡， 其特征在于， 所述过机卡中进一步包括一个 可接收来自本机的语音处理单元的定义为需本机输出的串行码流、 并对其进 行串并转换及锁存的锁存和缓冲单元， 锁存和缓冲单元后面连接有一第一存 储器， 该第一存储器可存储该码流， 且在该第一存储器的特定存储位置写入 有用于定位作用的帧标志字节； 而该第一存储器的另一端口用同步于本地总 线时钟的高速时钟把该码流读出， 经并串转换后送至与该第一存储器连接的 LVDS的驱动器， 经其驱动， 输出 LVDS形式的电平信号。
3、 如权利要求 2的过机卡， 其特征在于， 所述过机卡进一步包括有可接 收 LVDS电平的高速码流的 LVDS接收器， 其后连接有可将高速码流转换成 低速 TTL的电平信号的串并转换及锁存单元， 串并转换及锁存单元连接有一 第二存储器， 其通过内置帧同步字节信号的判断逻辑， 确认帧起始位置， 将 该低速 TLL电平信号顺序写入该本地的第二存储器中， 在第二存储器的另一 端口用来自本地总线的低速时钟顺序读出来并传至本地总线， 所述过机卡进 一歩包括可把接收到的时钟信号分频以产生第二低速时钟信号的分频器， 该 第二低速时钟信号亦输入到本地总线。
4、 如权利要求 1至 3任一项所述的过机卡， 其特征在于， 所述过机卡上 进一步设有用于对该过机卡进行使能设置的拨码开关。
5、 一种采用过机卡的 CTI系统， 其特征在于， 其至少包括有两个 CTI 单机， 每一 CTI单机中至少设有一个过机卡， 每一过机卡与该 CTI单机中的 语音处理单元通过本地总线连接， 且每一过机卡上均设有输入口和输出口， 某一过机卡与其目标不 CTI单机的过机卡采用双绞线对进行交叉连接； 在每 一个过机卡的发送端， 其把该 CTI单机中来自语音处理单元的多个低速信号 复用成单个高速的信号， 并换成符合 LVDS的电平接口的信号； 在每一过机 卡的接收端， 其接收外部的高速 LVDS信号， 转换成低压 TTL接口信号， 并 解复用成符合本地总线标准的低速信号，传送至该 CTI单机的信号处理单元。
6、 如权利要求 5的过机卡， 其特征在于， 所述过机卡中进一步包括一个 可接收来自本机的语音处理单元的定义为需本机输出的串行码流、 并对其进 行串并转换及锁存的锁存和缓冲单元， 锁存和缓冲单元后面连接有一第一存 储器， 该第一存储器可存储该码流， 且在该第一存储器的特定存储位置写入 有用于定位作用的帧标志字节； 而该第一存储器的另一端口用同步于本地总 线时钟的高速时钟把该码流读出， 经并串转换后送至与该第一存储器连接的 LVDS的驱动器， 经其驱动， 输出 LVDS形式的电平信号。
7、 如权利要求 6的过机卡， 其特征在于， 所述过机卡进一步包括有可接 收 LVDS电平的高速码流的 LVDS接收器， 其后连接有可将高速码流转换成 低速 TTL的电平信号的串并转换及锁存单元， 串并转换及锁存单元连接有一 第二存储器， 其通过内置帧同步字节信号的判断逻辑， 确认帧起始位置， 将 该低速 TLL电平信号顺序写入该本地的第二存储器中， 在第二存储器的另一 端口用来自本地总线的低速时钟顺序读出来并传至本地总线， 所述过机卡进 一步包括可把接收到的时钟信号分频以产生第二低速时钟信号的分频器， 该 第二低速时钟信号亦输入到本地总线。
8、 一种采用过机卡的 CTI系统， 其特征在于， 其至少包括有两个 CTI 单机及一交换机，每一 CTI单机中至少设有一个过机卡，每一过机卡与该 CTI 单机中的语音处理单元通过本地总线连接， 且每一过机卡上均设有输入口和 输出口， 每一过机卡均采用双绞线连接到所述交换机上； 在每一个过机卡的 发送端， 其把该 CTI单机中来自语音处理单元的多个低速信号复用成单个高 速的信号， 并换成符合 LVDS 的电平接口的信号； 在每一过机卡的接收端， 其接收来自交换机的高速 LVDS信号， 转换成低压 TTL接口信号， 并解复用 成符合本地总线标准的低速信号， 传送至该 CTI单机的信号处理单元。
9、 如权利要求 8的过机卡， 其特征在于， 所述过机卡中进一步包括一个 可接收来自本机的语音处理单元的定义为需本机输出的串行码流、 并对其进 行串并转换及锁存的锁存和缓冲单元， 锁存和缓冲单元后面连接有一第一存 储器， 该第一存储器可存储该码流， 且在该第一存储器的特定存储位置写入 有用于定位作用的帧标志字节； 而该第一存储器的另一端口用同步于本地总 线时钟的高速时钟把该码流读出， 经并串转换后送至与该第一存储器连接的 LVDS的驱动器， 经其驱动， 输出 LVDS形式的电平信号。
10、 如权利要求 9的过机卡， 其特征在于， 所述过机卡进一步包括有可 接收 LVDS电平的高速码流的 LVDS接收器， 其后连接有可将高速码流转换 成低速 TTL的电平信号的串并转换及锁存单元， 串并转换及锁存单元连接有 一第二存储器， 其通过内置帧同步字节信号的判断逻辑， 确认帧起始位置， 将该低速 TLL电平信号顺序写入该本地的第二存储器中， 在第二存储器的另 一端口用来自本地总线的低速时钟顺序读出来并传至本地总线， 所述过机卡 进一步包括可把接收到的时钟信号分频以产生第二低速时钟信号的分频器， 该第二低速时钟信号亦输入到本地总线。
PCT/CN2006/001528 2005-07-04 2006-06-30 Carte interface et systeme cti utilisant la carte interface WO2007003132A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US11/722,881 US7746850B2 (en) 2005-07-04 2006-06-30 Interface card and CTI system applying interface card

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN2005100357965A CN1893477B (zh) 2005-07-04 2005-07-04 一种过机卡及采用过机卡的cti系统
CN200510035796.5 2005-07-04

Publications (1)

Publication Number Publication Date
WO2007003132A1 true WO2007003132A1 (fr) 2007-01-11

Family

ID=37597978

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2006/001528 WO2007003132A1 (fr) 2005-07-04 2006-06-30 Carte interface et systeme cti utilisant la carte interface

Country Status (3)

Country Link
US (1) US7746850B2 (zh)
CN (1) CN1893477B (zh)
WO (1) WO2007003132A1 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8203976B2 (en) * 2007-01-16 2012-06-19 Ricoh Company, Ltd. Interface device and image forming apparatus
CN110471880B (zh) * 2019-07-19 2021-01-12 哈尔滨工业大学 一种基于FPGA支持Label号筛选的ARINC429总线模块及其数据传输方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001308871A (ja) * 2000-04-21 2001-11-02 Ando Electric Co Ltd データ多重装置およびそのデータ処理方法
KR20030049408A (ko) * 2001-12-14 2003-06-25 삼성전자주식회사 비동기 전송 방식에서의 링크 정합 장치
WO2005011193A1 (en) * 2003-07-24 2005-02-03 Utstarcom Korea Limited Device for implementing a rnc using lvds

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5073779A (en) * 1990-08-10 1991-12-17 Sandia Corporation Beacon data acquisition and display system
US5745786A (en) * 1994-01-27 1998-04-28 Dialogic Corporation Method and apparatus for assigning memory space addresses to memory on computer interface boards
US6542584B1 (en) * 1998-08-31 2003-04-01 Intel Corporation Digital telephone system with automatic voice mail redirection
US6388591B1 (en) * 1999-09-24 2002-05-14 Oak Technology, Inc. Apparatus and method for receiving data serially for use with an advanced technology attachment packet interface (atapi)
JP2004072344A (ja) * 2002-08-05 2004-03-04 Ricoh Co Ltd 多重化ｌｖｄｓインタフェースを備えたデータ伝送システム
JP4724461B2 (ja) * 2005-05-17 2011-07-13 Ｏｋｉセミコンダクタ株式会社 システムｌｓｉ
US8023642B2 (en) * 2006-06-28 2011-09-20 Hubbell Incorporated Method for extending ethernet over twisted pair conductors and to the telephone network and plug-in apparatus for same employing standard mechanics

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001308871A (ja) * 2000-04-21 2001-11-02 Ando Electric Co Ltd データ多重装置およびそのデータ処理方法
KR20030049408A (ko) * 2001-12-14 2003-06-25 삼성전자주식회사 비동기 전송 방식에서의 링크 정합 장치
WO2005011193A1 (en) * 2003-07-24 2005-02-03 Utstarcom Korea Limited Device for implementing a rnc using lvds

Also Published As

Publication number Publication date
US7746850B2 (en) 2010-06-29
US20080133805A1 (en) 2008-06-05
CN1893477A (zh) 2007-01-10
CN1893477B (zh) 2010-06-09

Similar Documents

Publication Publication Date Title
JP5657762B2 (ja) メディアインターフェースの双方向通信を提供するためのオペレーション
US7782888B2 (en) Configurable ports for a host ethernet adapter
USRE39216E1 (en) Asynchronous processor access to a switch table in a network with isochronous capability
CN100384169C (zh) 接入设备中的主从框级联系统
EP2378742A1 (en) Method for data communication and device for ethernet
CN102347904B (zh) 路由设备及其主卡以及用于该主卡适配接口卡的方法
WO2006044726A2 (en) System packet interface packet exchange for queue concatenation and logical identification
JPH08274720A (ja) メモリインターフェースシステム
US20210409140A1 (en) Clock Synchronization Packet Exchanging Method and Apparatus
KR20160084408A (ko) 버스 상에서 추가적인 세컨더리 데이터 라인들을 통하여 데이터를 전송하는 시스템 및 방법
US10826734B2 (en) Data communication systems with forward error correction
JP2004532457A (ja) 伝送リンク層コア速度を高くするためのネットワーク
JPH09130402A (ja) 選択可能データ送信速度を有する非同期転送モードシステムで使用するクロック信号の合成方法及び装置
WO2010069193A1 (zh) 一种数据通信方法和一种以太网设备
WO2007003132A1 (fr) Carte interface et systeme cti utilisant la carte interface
CN201910048U (zh) 一种lvds节点模块
CN105718401B (zh) 一种多路smii信号到一路mii信号的复用方法及系统
CN100473029C (zh) 千兆以太网数据业务接入装置
WO2009000118A1 (fr) Procédé et appareil pour un échange aisé des données d'une interface de bus dans un système de multiplexage par répartition temporelle
CN210804154U (zh) 双通道大带宽波形产生系统
CN217335926U (zh) 分布式通信单元和通信扩展装置
CN204314869U (zh) 一种多路smii信号到一路mii信号的复用系统
US6728817B1 (en) Integrated packet bus for multiple devices
EP2683121B1 (en) System comprising a media converter using Ethernet with thin-profile mobile devices
CN111258945A (zh) 一种嵌入式系统通信接口及通信方法

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application
WWE Wipo information: entry into national phase

Ref document number: 11722881

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE

WWW Wipo information: withdrawn in national office

Country of ref document: DE

WWP Wipo information: published in national office

Ref document number: 11722881

Country of ref document: US

122 Ep: pct application non-entry in european phase

Ref document number: 06761336

Country of ref document: EP

Kind code of ref document: A1