WO2006054005A1 - Composant a protuberances conductrices ductiles enterrees et procede de connexion electrique entre ce composant et un composant muni de pointes conductrices dures - Google Patents
Composant a protuberances conductrices ductiles enterrees et procede de connexion electrique entre ce composant et un composant muni de pointes conductrices dures Download PDFInfo
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- WO2006054005A1 WO2006054005A1 PCT/FR2005/050795 FR2005050795W WO2006054005A1 WO 2006054005 A1 WO2006054005 A1 WO 2006054005A1 FR 2005050795 W FR2005050795 W FR 2005050795W WO 2006054005 A1 WO2006054005 A1 WO 2006054005A1
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- protuberances
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01049—Indium [In]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01058—Cerium [Ce]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01067—Holmium [Ho]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0367—Metallic bump or raised conductor not used as solder bump
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0373—Conductors having a fine structure, e.g. providing a plurality of contact points with a structured tool
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
Definitions
- the present invention relates to a buried ductile conductive protuberance component and a method of electrical connection between this component and a component having hard conductive tips.
- the main advantage of such an insertion electrical connection method is to be able to do without the flow, unlike conventional hybridization methods (solder protrusions and thermo-compression) which involve the use of a solution of chemical etching, the flux, to remove the native oxide layer on the surface of the alloy.
- the step of rinsing the flow is difficult to achieve at low pitch. Flux residues are in fact an obstacle to the spreading of the coating adhesive used to protect the balls during the thinning steps or during use of the hot or cold device by reinforcing the thermomechanical coupling between the chip. and the substrate, which results in the presence of bubbles that are harmful to a stack from a thermomechanical point of view.
- this known method as illustrated schematically in FIG.
- the mechanical maintenance between the two components is ensured by bonding at the interface between the components, between the protuberances, for example by molecular adhesion sealing performed at room temperature by plasma passivation or by an adhesive.
- the electrical connections are thus made at a topological level different from that of the mechanical contact.
- the coating that was used to mechanically protect the connections is no longer necessary.
- the invention also relates to a component comprising, on one face, a set of pads and a set of ductile conductive protuberances adapted to be electrically connected with another component provided on one side with a set of pads and a set hard conductive tips, characterized in that the protuberances are buried.
- Each protuberance is made of electrically conductive material such as a solder paste or a conductive adhesive.
- the level of connection is dissociated from that of mechanical support.
- This new hybridization concept makes it compatible with the technique of insertion and direct transfer from one component to the other, and thus eliminates the coating step, which is difficult from a low-tech point of view. . It offers the advantage of being at ambient temperature, "flux-free" because the tip pierces the native oxide crust on the surface of a protrusion, and requires a low mechanical pressure.
- FIG. 1 illustrates a method of the prior art.
- FIGS. 2A and 2B illustrate the realization of a connection by insertion of a set of points into buried protuberances according to the method of the invention.
- Figures 3A-7C illustrate several embodiments of the method of the invention.
- this connection is made between the pads 8 of a first component 10 and the pads 9 of a second component 11, for example a substrate, by insertion of a set of hard conducting tips 13 disposed on one face of this first component 10 in a set of buried ductile conductive protrusions 14 disposed on one side of the second component, as shown in Figures 2A and 2B.
- Hybridization can be done at room temperature. Indeed, if the tips are sufficiently sharp and the material of the protrusions sufficiently ductile, the insertion can be done only by application of mechanical pressure.
- Such an insertion can be made by playing on the Young's modules of the respective materials constituting the points 13 and the protuberances 14, and / or on the shape of points 13.
- the tips 13 must be sufficiently hard and thin (for example, a vertex angle less than 30 °, a ratio greater than 10 between the two Young's modules) to be able to pierce the oxide crust and to penetrate into the protuberances 14 with a minimal mechanical pressure.
- the surface adhesion bonding (SAB) molecular adhesion seal contemplated above for bonding between the two components, has the following advantages.
- the direct transfer of one component to the other by a molecular adhesion seal at room temperature is possible. There is therefore no shift of the pads vis-à-vis during hybridization.
- sealing by molecular adhesion was not possible in the "flip chip” technology because of the high temperature heat treatment (1000 ° C.) that it required to consolidate the bonds. Thanks to surface activated bonding (SAB) surfaces, we are now able to seal at room temperature.
- the "conventional" molecular adhesion seal (that is to say without surface activation) consists in bringing two materials into contact at room temperature after physicochemical treatment of their surface, then in carrying out a high temperature heat treatment in order to consolidate the crystalline structure by creating atomic bonds.
- Plasma activation allows a physico-chemical cleaning of surfaces on the atomic scale by bombardment of excited particles. Bonds break on the surface and dangling bonds are created. The surfaces are then sufficiently reactive so that the seal quality obtained at room temperature is mechanically acceptable and consolidation by heat treatment is not essential. Thus hybridization can be carried out at room temperature. We avoid the problems of offset of pads during hot hybridizations (due to the difference in coefficient of thermal expansion of the chip and the substrate).
- the buried ductile protuberances can be made for example by electrolytic growth at the bottom of the cavities formed in a passivation layer.
- the passivation layer may be SiO 2 and the boxes may be indium or aluminum.
- a step of depositing a resin mask 25 an electrolytic growth step, for example of indium 24 (FIG. 3C) or of any ductile conductive material,
- the set of tips can be obtained in several ways, for example by deposition by metal, etching, electrolytic growth, electrodeposition process ("electroless”), metal nanoimpresion or growth of aligned carbon nanotubes ...
- a first technique is to perform a metal deposition by spraying over cavities of resin. As the deposit is deposited, the opening becomes clogged and the amount of metal deposited at the bottom of the cavity decreases. Thus the shape obtained at the bottom of the cavity becomes conical.
- a second technique consists in carrying out the deposition step on the entire plate, depositing a resin mask and then etching the metal by chemical etching.
- the nanoimpre- sion technique is used to mold polymers, but it is also possible to mold alloys provided they are heated to around the melting temperature. Alloys with low melting point must be selected. We thus have the following steps:
- the patterns of the mold can be made in several ways: a mold, made of silicon for example, can be used and the pyramidal holes can be made by anisotropic chemical etching (KOH) along crystalline planes. It is also possible to make the mold by hot stamping. The material must be thermally and mechanically strong enough not to cleave under the application of force.
- Nanotubes can be grown under an electric field to orient them. This technique is described in the document referenced [2]. This document contemplates the direct growth of vertically aligned carbon nanotube arrays on flexible plastic substrates using a chemical vapor deposition.
- these nanotubes can grow locally by means of a masking process during the deposition of the different layers necessary for their preparation (FIG. 7C).
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Combinations Of Printed Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/662,940 US8586409B2 (en) | 2004-10-04 | 2005-09-29 | Component with buried ductile conductive bumps and method of electrical connection between said component and a component equipped with hard conductive points |
JP2007534065A JP5583324B2 (ja) | 2004-10-04 | 2005-09-29 | 埋設された複数の軟質導電性バンプを備えた素子、ならびに、そのような素子と、複数の硬質導電性ポイントを備えた素子と、の電気的接続方法 |
EP05802576.8A EP1797748B1 (fr) | 2004-10-04 | 2005-09-29 | Composant a protuberances conductrices ductiles enterrees et procede de connexion electrique entre ce composant et un composant muni de pointes conductrices dures |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0452249 | 2004-10-04 | ||
FR0452249A FR2876243B1 (fr) | 2004-10-04 | 2004-10-04 | Composant a protuberances conductrices ductiles enterrees et procede de connexion electrique entre ce composant et un composant muni de pointes conductrices dures |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006054005A1 true WO2006054005A1 (fr) | 2006-05-26 |
Family
ID=34982532
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/FR2005/050795 WO2006054005A1 (fr) | 2004-10-04 | 2005-09-29 | Composant a protuberances conductrices ductiles enterrees et procede de connexion electrique entre ce composant et un composant muni de pointes conductrices dures |
Country Status (5)
Country | Link |
---|---|
US (1) | US8586409B2 (fr) |
EP (1) | EP1797748B1 (fr) |
JP (1) | JP5583324B2 (fr) |
FR (1) | FR2876243B1 (fr) |
WO (1) | WO2006054005A1 (fr) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009101664A1 (fr) * | 2008-02-15 | 2009-08-20 | Fujitsu Limited | Procédé de fabrication de dispositif à semi-conducteur |
EP2175485A2 (fr) | 2008-09-25 | 2010-04-14 | Commissariat A L'energie Atomique | Connexion par emboitement de deux inserts soudés et sa méthode de fabrication |
EP2190020A1 (fr) | 2008-11-20 | 2010-05-26 | Commissariat à l'énergie atomique et aux énergies alternatives | Procédé d'amincissement d'un bloc reporté sur un substrat |
WO2011018572A1 (fr) | 2009-08-13 | 2011-02-17 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Assemblage hermetique de deux composants et procede de realisation d'un tel assemblage |
EP2287904A1 (fr) | 2009-08-13 | 2011-02-23 | Commissariat à l'Énergie Atomique et aux Énergies Alternatives | Procédé d'assemblage de deux composants électroniques |
EP2618368A1 (fr) | 2008-02-22 | 2013-07-24 | Commissariat à l'Énergie Atomique et aux Énergies Alternatives | Composant de connexion muni d'inserts creux et son procédé de réalisation |
EP2693468A1 (fr) | 2012-07-31 | 2014-02-05 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procédé d'assemblage de deux composants électroniques entre eux, de type flip-chip |
WO2014049551A1 (fr) | 2012-09-27 | 2014-04-03 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede d'assemblage de deux composants electroniques, de type flip-chip, assemblage obtenu selon le procede |
WO2018033689A1 (fr) | 2016-08-18 | 2018-02-22 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procédé de connection intercomposants à densité optimisée |
EP3675187A1 (fr) | 2018-12-28 | 2020-07-01 | Commissariat à l'énergie atomique et aux énergies alternatives | Procédés de fabrication optimisés d'une structure destinée à être assemblée par hybridation et d'un dispositif comprenant une telle structure |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006054468A1 (de) * | 2006-11-18 | 2008-05-29 | Braun Gmbh | Vorrichtung zur Entfernung von Körperhaar |
TWI320680B (en) * | 2007-03-07 | 2010-02-11 | Phoenix Prec Technology Corp | Circuit board structure and fabrication method thereof |
US7749887B2 (en) * | 2007-12-18 | 2010-07-06 | Micron Technology, Inc. | Methods of fluxless micro-piercing of solder balls, and resulting devices |
FR2928032B1 (fr) * | 2008-02-22 | 2011-06-17 | Commissariat Energie Atomique | Composant de connexion muni d'inserts avec cales compensatrices. |
KR101022912B1 (ko) * | 2008-11-28 | 2011-03-17 | 삼성전기주식회사 | 금속범프를 갖는 인쇄회로기판 및 그 제조방법 |
FR2964786B1 (fr) * | 2010-09-09 | 2013-03-15 | Commissariat Energie Atomique | Procédé de réalisation d'éléments a puce munis de rainures d'insertion de fils |
FR3082663B1 (fr) | 2018-06-14 | 2022-01-07 | Aledia | Dispositif optoelectronique |
FR3082998B1 (fr) | 2018-06-25 | 2021-01-08 | Commissariat Energie Atomique | Dispositif et procedes pour le report de puces d'un substrat source vers un substrat destination |
US10989735B2 (en) | 2019-08-21 | 2021-04-27 | Facebook Technologies, Llc | Atomic force microscopy tips for interconnection |
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US6414506B2 (en) * | 1993-09-03 | 2002-07-02 | Micron Technology, Inc. | Interconnect for testing semiconductor dice having raised bond pads |
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JP2000150701A (ja) * | 1998-11-05 | 2000-05-30 | Shinko Electric Ind Co Ltd | 半導体装置並びにこれに用いる接続用基板及びその製造方法 |
JP2000208675A (ja) * | 1999-01-11 | 2000-07-28 | Matsushita Electronics Industry Corp | 半導体装置およびその製造方法 |
JP2001257453A (ja) * | 2000-03-09 | 2001-09-21 | Shinko Electric Ind Co Ltd | 配線基板、半導体装置及びそれらの製造方法 |
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US6884313B2 (en) * | 2001-01-08 | 2005-04-26 | Fujitsu Limited | Method and system for joining and an ultra-high density interconnect |
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JP3829325B2 (ja) * | 2002-02-07 | 2006-10-04 | 日本電気株式会社 | 半導体素子およびその製造方法並びに半導体装置の製造方法 |
-
2004
- 2004-10-04 FR FR0452249A patent/FR2876243B1/fr not_active Expired - Lifetime
-
2005
- 2005-09-29 JP JP2007534065A patent/JP5583324B2/ja not_active Expired - Fee Related
- 2005-09-29 US US11/662,940 patent/US8586409B2/en active Active
- 2005-09-29 EP EP05802576.8A patent/EP1797748B1/fr not_active Not-in-force
- 2005-09-29 WO PCT/FR2005/050795 patent/WO2006054005A1/fr active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US20020153608A1 (en) * | 2001-04-19 | 2002-10-24 | Mitsubishi Denki Kabushiki Kaisha | Land grid array semiconductor device and method of mounting land grid array semiconductor devices |
US20030234277A1 (en) * | 2002-06-25 | 2003-12-25 | Rajen Dias | Microelectronic device interconnects |
WO2004093266A1 (fr) * | 2003-04-07 | 2004-10-28 | Molex Incorporated | Procede de fabrication d'un connecteur electrique |
Cited By (19)
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US8735274B2 (en) | 2008-02-15 | 2014-05-27 | Fujitsu Limited | Manufacture method for semiconductor device with bristled conductive nanotubes |
WO2009101664A1 (fr) * | 2008-02-15 | 2009-08-20 | Fujitsu Limited | Procédé de fabrication de dispositif à semi-conducteur |
US8898896B2 (en) | 2008-02-22 | 2014-12-02 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Method of making a connection component with hollow inserts |
EP2618368A1 (fr) | 2008-02-22 | 2013-07-24 | Commissariat à l'Énergie Atomique et aux Énergies Alternatives | Composant de connexion muni d'inserts creux et son procédé de réalisation |
EP2175485A2 (fr) | 2008-09-25 | 2010-04-14 | Commissariat A L'energie Atomique | Connexion par emboitement de deux inserts soudés et sa méthode de fabrication |
US8093728B2 (en) | 2008-09-25 | 2012-01-10 | Commissariat A L'energie Atomique | Connection by fitting together two soldered inserts |
US8252363B2 (en) | 2008-11-20 | 2012-08-28 | Commissariat à l'Energie Atomique | Method of thinning a block transferred to a substrate |
EP2190020A1 (fr) | 2008-11-20 | 2010-05-26 | Commissariat à l'énergie atomique et aux énergies alternatives | Procédé d'amincissement d'un bloc reporté sur un substrat |
US8291586B2 (en) | 2009-08-13 | 2012-10-23 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Method for bonding two electronic components |
WO2011018572A1 (fr) | 2009-08-13 | 2011-02-17 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Assemblage hermetique de deux composants et procede de realisation d'un tel assemblage |
EP2287904A1 (fr) | 2009-08-13 | 2011-02-23 | Commissariat à l'Énergie Atomique et aux Énergies Alternatives | Procédé d'assemblage de deux composants électroniques |
EP2693468A1 (fr) | 2012-07-31 | 2014-02-05 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procédé d'assemblage de deux composants électroniques entre eux, de type flip-chip |
WO2014049551A1 (fr) | 2012-09-27 | 2014-04-03 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede d'assemblage de deux composants electroniques, de type flip-chip, assemblage obtenu selon le procede |
US9368473B2 (en) | 2012-09-27 | 2016-06-14 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Assembly method, of the flip-chip type, for connecting two electronic components, assembly obtained by the method |
WO2018033689A1 (fr) | 2016-08-18 | 2018-02-22 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procédé de connection intercomposants à densité optimisée |
CN109791920A (zh) * | 2016-08-18 | 2019-05-21 | 原子能和替代能源委员会 | 以最佳密度连接交叉部件的方法 |
EP3675187A1 (fr) | 2018-12-28 | 2020-07-01 | Commissariat à l'énergie atomique et aux énergies alternatives | Procédés de fabrication optimisés d'une structure destinée à être assemblée par hybridation et d'un dispositif comprenant une telle structure |
FR3091411A1 (fr) | 2018-12-28 | 2020-07-03 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procédés de fabrication optimisés d’une structure destinée à être assemblée par hybridation et d’un dispositif comprenant une telle structure |
US11289439B2 (en) | 2018-12-28 | 2022-03-29 | Commissariat Âl'Énergie Atomique Et Aux Énergies Alternatives | Optimised fabrication methods for a structure to be assembled by hybridisation and a device comprising such a structure |
Also Published As
Publication number | Publication date |
---|---|
FR2876243A1 (fr) | 2006-04-07 |
EP1797748B1 (fr) | 2017-05-17 |
EP1797748A1 (fr) | 2007-06-20 |
JP2008516424A (ja) | 2008-05-15 |
FR2876243B1 (fr) | 2007-01-26 |
JP5583324B2 (ja) | 2014-09-03 |
US8586409B2 (en) | 2013-11-19 |
US20080190655A1 (en) | 2008-08-14 |
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