Classifications

• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of DC power input into DC power output
  • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
  • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
  • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
  • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M3/1584—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
• • G—PHYSICS
  • G05—CONTROLLING; REGULATING
  • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
  • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
  • G05F1/10—Regulating voltage or current 
  • G05F1/625—Regulating voltage or current  wherein it is irrelevant whether the variable actually regulated is AC or DC
  • G05F1/652—Regulating voltage or current  wherein it is irrelevant whether the variable actually regulated is AC or DC using variable impedances in parallel with the load as final control devices
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of DC power input into DC power output
  • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
  • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
  • H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
  • H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of DC power input into DC power output
  • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
  • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
  • H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
  • H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
  • H02M3/073—Charge pumps of the Schenkel-type
  • H02M3/075—Charge pumps of the Schenkel-type including a plurality of stages and two sets of clock signals, one set for the odd and one set for the even numbered stages
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of DC power input into DC power output
  • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
  • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
  • H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
  • H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
  • H02M3/073—Charge pumps of the Schenkel-type
  • H02M3/076—Charge pumps of the Schenkel-type the clock signals being boosted to a value being higher than the input voltage value
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of DC power input into DC power output
  • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
  • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
  • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
  • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
  • H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
  • H02M3/1584—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
  • H02M3/1586—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel switched with a phase shift, i.e. interleaved

Definitions

• This invention relates generally to soft switching switch mode power converters, and more particularly, to soft switching buck, buck-boost and boost switch mode power converters suitable for high power and high voltage applications such as plasma processing.
• FIG. 1 shows a prior art hard-switched power converter cell HSPCC that can be used to implement prior art hard-switched buck, buck-boost and boost power converters as shown in Figures 4-6 respectively.
• the hard-switched power converter cell HSPCC has three terminals: an active terminal AT, a passive terminal PT, and an inductive terminal IT.
• the power converter cell is comprised of a switch assembly SA and an inductor L.
• the switch assembly has an active switch terminal AST that is connected to the active terminal AT, a passive switch terminal PST that is connected to the passive terminal PT and a common switch terminal CST.
• the inductor L is connected between the common switch terminal CST and the converter inductive terminal IT.
• the switch assembly has two switches: switch SAC that is connected between active switch terminal AST and common switch terminal CST, and switch SPC that is connected between passive switch terminal PST and common switch terminal CST.
• Switch SAC always comprises an active switch such as a transistor, and may also comprise an anti-parallel diode, while the SPC switch may comprise a diode, an active switch or both.
• FIGS 2 and 3 show two implementations of switch assembly SA in -which switch SAC comprises an active switch SA connected in parallel with an anti-parallel diode APD, and in which switch SPC is a freewheeling diode FD.
• switch assembly SA comprises an active switch SA connected in parallel with an anti-parallel diode APD, and in which switch SPC is a freewheeling diode FD.
• the two switches in a switch assembly SA are never on simultaneously, but in hard-switched power that operate in a manner such that the currents in the filter inductors do not reach zero within a switching cycle (continuous conduction mode), a freewheeling diode must be turned off every time a switching transistor is turned on.
• a reverse current called the reverse-recovery current flows through the freewheeling diodes during the time interval when they are being turned off.
• the time it takes for a diode to turn off is called the reverse-recovery time.
• a large diode reverse- recovery current to flows through the switches while the voltage across them is high. This produces switching losses that may be prohibitively high in hard switching power converters that operate at high voltage and power levels while switching at high frequencies.
• Switch assemblies having SPC switches that are implemented as freewheeling diodes may be categorized as positive switch assemblies such as the PSA of Figure 2, or negative switch assemblies such as the NSA of Figure 3.
• a positive switch assembly blocks current from flowing between the active switch terminal AST and common switch terminal CST while the SAC switch is off and the active switch terminal AST is positive with respect to the common switch terminal CST.
• a negative switch assembly blocks current from flowing between the common and active switch terminals while the SAC switch is off and the active switch terminal is negative with respect to the common switch terminal.
• Figures 4-6 show hard-switched power converters that are implemented with hard-switched power converter cells.
• FIG 4 shows a hard-switched buck power converter HSBKPC
• Figure 5 shows a hard-switched buck-boost power converter HSBPC
• Figure 6 shows a hard-switched boost power converter HSBTPC.
• Each of the power converters in Figures 4-6 has a converter input terminal CIT, a converter common terminal CCT, and a converter output terminal COT. Input power is supplied between the input and common terminals having an input voltage Vj n , and power is delivered between the output and common terminals, between which there is an output voltage V QUt .
• the interconnection arrangement among the power converter cell terminals and the power converter terminals determines whether the power converter is a hard- switched buck power converter HSBKPC, a hard switched buck-boost power converter HSBBPC or ' a hard switched boost power converter HSBTPC.
• Each power converter shown in Figures 4-6 has a converter input capacitor CIC connected between the input terminal and the common terminal, and a converter output capacitor COC connected between the output terminal and the common terminal.
• Hard-switching power converter cells HSPCC can be implemented with either a set of positive switch assemblies or a set of negative switch assemblies.
• a positive hard- switched power converter cell is defined as a power converter cell that is implemented with one or more positive switch assemblies.
• a negative hard-switched power converter cell is defined as a power converter cell that is implemented with one or more negative switch assemblies. The choice of whether to use positive or negative power converter cells depends on the polarity of the voltage to be converted and the converter topology.
• Positive hard-switched power converter cells PHSPCC are used to implement hard-switched buck HSBKPC and hard-switched buck-boost HSBBPC power converters when the input voltage Vj n is positive (the converter input terminal CIT is positive with respect to the converter common terminal CCT) 1 and also with hard-switched boost power converters HSBTPC that have negative input voltages (the converter input terminal CIT is negative with respect to the converter common terminal CCT).
• negative hard-switched power converter cells NHSPCC are used in hard- switched buck HSBKPC and hard-switched buck-boost HSBBPC power converters that have negative input voltages, and also in hard-switched boost power converters HSBTPC that have positive input voltages.
• the dashed lines in Figure 4 indicate that multiple power converter cells may be connected in parallel order to share input and output currents of the power converter among two or more converter cells.
• Parallel-connected power converter cells are preferably operated with an interleaved switching pattern to reduce ripple in the input and output currents. IfN converters are connected in parallel, then the switches are preferably operated with an interleaving phase angle difference of 360°/N. Although it is not shown in Figures 5 and 6, these power converters may also be implemented with parallel-connected power converter cells.
• Interleaved hard-switched power converters are generally known in the prior art. They are commonly used for microprocessor VRM applications with very high output currents and very low output voltages. Having a low output voltage allows use of very fast low voltage diodes, so the switching losses are negligible. In general, high voltage diodes turn off more slowly than low voltage diodes, so switching losses are a particular problem for high-frequency power converters that operate at high voltages and high power levels. When hard-switched power converters are used in high- voltage and high- power applications as disclosed in US patent 6,211,657, the switching losses will be considerable when the power converter is operated at high switching frequencies.
• Figure 7 shows a prior art interleaved hard-switched buck power converter HSBKPC that is based on Figures 2 and 4.
• the power converter has two parallel- connected positive hard switching power converter cells, PHSPCCl and PHSPCC2, and it is like the interleaved converter disclosed in US patent 6,211,657.
• Figure 8 shows typical waveforms for an interleaved bard-switched power converter such as the one in Figure 7 in which slower high voltage diodes are used.
• the current waveform plots of Figure 8 have vertical scales of 10 A per division.
• the capacitance of COC used in the simulation was selected so that the output ripple voltage was negligible, but much smaller capacitors can be used with converters that are intended to operate loads where high-frequency ripple is not critical, such as typical dc plasma loads.
• the power converter was supplied by an ideal voltage source in the simulation, so the converter input capacitor was not required.
• diode FDl is conducting when switch SWl turns on at time to.
• a large reverse-recovery current I R DI flows through FDl as it is being turned off by SWl .
• the freewheeling diode waveforms IF DI and I FD ⁇ illustrate how the peak reverse-recovery currents IRD I and I RD2 of diodes FDl and FD2 may be greater than their peak forward operating currents.
• the large reverse-recovery currents of the freewheeling diodes cause high power dissipation in switches SWl and SW2 because the voltage across the switches is high during the turn-on switching transition interval.
• the diode reverse-recovery currents also cause considerable power dissipation in the diodes. Just before a diode is fully turned off, the voltage across it rises while current is still flowing, and this produces high turn- off power losses in the diode due to the simultaneous presence of high voltage and high current. Because the same switching cells are used in hard-switched interleaved buck- boost and boost power converters, these converters have switching waveforms that are similar to the ones illustrated in Figure 8. Large current spikes in the freewheeling diodes also occur in hard-switched non-interleaved power converters.
• the turn-on losses in switches due to diode reverse-recovery currents can be reduced by adding circuitry that results in having zero, or relatively low, currents flowing through the switches as they are turned on.
• the turaoff losses of the diodes can be greatly decreased by reducing the current through them gradually instead of suddenly during the commutation interval.
• US 6,426,883 discloses a power converter that uses equal-sized parallel-connected switching components and commutation inductors to achieve soft switching, but the switching pattern allows only one of the paralleled switches to have soft switching while the other switch has hard switching. In order to balance the switching losses, the switching pattern is periodically reversed so that each switch has soft switching half of the time.
• hard-switched power converter cells can be connected in a stacked arrangement to implement hard-switched stacked buck HSSBKPC power converters, hard-switched stacked buck-boost HSSBEPC power converters and hard-switched stacked boost HSSBTPC power converters as shown in Figures 9, 10 and 11 respectively.
• Each of these converters has one positive hard-switched power converter cell, PHSPCC, and one negative hard-switched power converter cell, NHSPCC.
• Stacking two power converter cells in the configurations illustrated in Figures 9-11 allows the operating voltages to be twice those obtainable with non-stacked power converters when using equivalent power converter cells.
• soft switching interleaved power converters that are suitable for high power and high voltage applications such as plasma processing. They can operate at higher frequencies than prior art converters because they have greatly reduced switching losses and diode reverse-recovery losses.
• the peak values of the reverse-recovery currents of the diodes are substantially less than their peak forward operating currents.
• the power converters incorporate power converter cells that comprise a plurality of switching assemblies that are operated with an interleaved switching pattern, and that are each connected to an input terminal of an inductor assembly that also has a common terminal. The inductance between each pair of input terminals is less than the inductance between each input terminal and the common terminal of the inductor assembly.
• Figure 1 illustrates a prior art hard-switched power converter cell.
• Figures 2 and 3 illustrate, respectively, prior art positive and negative switching assemblies.
• Figures 4-6 illustrate, respectively, prior art hard-switched buck, buck-boost and boost power converters.
• Figure 7 illustrates a prior art hard switching interleaved buck power converter.
• Figure 8 illustrates waveforms of the prior art hard switching power converter of Figure 7.
• Figures 9-11 illustrate, respectively, prior art hard-switched stacked buck, stacked buck-boost and stacked boost power converters.
• Figure 12 illustrates a soft-switched power converter cell.
• Figures 13-16 illustrate details of various embodiments of the inductor assembly IA of Figure 12.
• Figures 17-19 illustrate, respectively, soft-switched buck, buck-boost and boost power converters.
• Figure 20 illustrates a soft switching interleaved buck power converter.
• Figure 21 illustrates waveforms of the soft-switched buck power converter of Figure 20.
• Figure 22 illustrates a soft-switched stacked buck power converter.
• Figure 23 illustrates a soft-switched stacked buck-boost power converter.
• Figure 24 illustrates a soft-switched stacked boost power converter.
• Figure 25 provides a detailed diagram of the soft-switched stacked buck power converter of Figure 22.
• Figure 26 illustrates waveforms of the power converter of Figure 25.
• the power converter cells of the present invention are similar in structure to prior art circuits, but they achieve heretofore unknown performance improvements by utilizing inductor assemblies with advantageous structures and inductance values, and by utilizing optimal switching patterns.
• FIG. 12 illustrates a soft switching power converter cell SSPCC according to the present invention.
• At least two switching assemblies, SAl and SA2 are connected to active and passive terminals, AT and PT.
• the possibility of connecting more switching assemblies, for a total of N is indicated by the dashed connections to the Nth switching assembly SAN.
• the common terminal of each switch assembly, CSTl ... CSTN is connected to an inductor assembly, IA, at an inductive assembly input terminal, IAITl ... IAITN.
• An inductor assembly common terminal IACT is connected to the inductive terminal IT of the SSPCC power converter cell.
• Figures 13-16 show various ways to implement inductor assembly IA.
• the inductances between pairs of inductor assembly input terminals that are connected to a pair of consecutively operated switching assemblies, LU is a critical parameter in producing soft switching operation.
• the inductance between an inductor assembly input terminal and the inductor assembly common terminal IACT, Lj C influences the magnitude of the ripple current flowing through the inductive terminal of the switching cell.
• the Ln inductance values are preferably less than one fifth of the inductance of L ie .
• the inductor assemblies of Figures 13-16 can be constructed so as to have the same inductances the between all corresponding pairs of their terminals. If the inductances between the terminal pairs are equivalent for various inductor assemblies, then the converter waveforms will also be equivalent for the same operating conditions, and the total energy stored in each inductor assembly will be the same.
• Figure 13 shows an inductor assembly implementation DIA in which one of N discrete commutation inductors LCl ... LCN is connected between each inductor assembly input terminal IAITl ... IAITN and an inductor common junction ICJ.
• a main converter inductor LM is connected between junction ICJ and the inductor assembly common terminal IACT.
• the inductance between inductor assembly input terminals IAITl and IAIT2 is preferably less than about one-fifth of the inductance of between each of these terminals and the inductor assembly common terminal IACT.
• the inductance of the commutation inductors in Figure 13 is therefore preferably less than one-ninth of the inductance of the main inductor LM.
• Figure 14 shows an inductor assembly SAIA that has N pairs of commutation inductors connected in a series-aiding coupling arrangement.
• One inductor is connected between each inductor assembly input terminal IAITlA ... IAITNA, IAITlB ...
• IAITNB and an inductor common junction ICJB When more than two windings are used in this type of inductor assembly they must come in pairs, and the switching sequence must be ordered so that every successive switching assembly in the sequence is connected to a winding of opposite polarity.
• the two simplest ways of implementing the coupled commutation inductors LClA-LClB ... LCNA-LCNB are to wrap the windings around the center leg of an E-core set, or to wrap them around the same side of a C-core set.
• Each pair of commutation inductor windings is preferably tightly coupled (coupling coefficient of at least 0.9).
• the inductances of the commutation inductor windings are preferably nearly equal.
• the inductance between a pair of inductor assembly input terminals approaches four times the inductance of one winding for tightly coupled windings mat are connected in a series-aiding arrangement.
• the common connection between each pair of windings is connected to a main converter inductor LMB at an inductor common junction ICJB.
• each of the commutation inductors LCl ...LCN of Figure 13 is slightly less than the total peak energy stored in each pair of the coupled commutation inductors IClA-IClB...ICNA-ICNB of Figure 14 when the inductances between their corresponding input terminals are the same, the operating conditions are the same, and the peak reverse-recovery currents of the diodes are minimal in comparison to diode forward currents.
• the size of the coupled commutation inductors of Figure 14 can be significantly smaller than the combined size an equal number of the discrete commutation inductors of Figure 13.
• Figure 15 shows an inductor assembly implementation CCIA that has three coupled commutation inductors LLCl... LLC3 that are intended to be driven by three switching assemblies.
• the commutation inductors could be implemented with three windings wound around three legs of a core similar to what is used in three-phase transformers.
• the magnitude of the coupling between each winding pair must be less than 0.5, so the relative size reduction possible with this configuration in comparison with three discrete inductors of Figure 13 will generally be less than the relative size reduction possible for two tightly coupled windings of Figure 14 in comparison with two discrete inductors of Figure 13.
• One commutation inductor is connected to between each inductor assembly input terminal IAICTl ... IAICT3 and junction ICJC.
• a main inductor LMC is connected between junction ICJC and the inductor assembly common terminal IACTC.
• Figure 16 shows an inductor assembly SOIA in which two main inductor windings LMDl and LMD2 are wound on a common core structure with a series- opposing coupling arrangement. There are no commutation inductors, but the diode commutation effect still occurs due to the leakage inductance between the to windings.
• the inductances between inductor assembly input terminals IAITDl and IAITD2 and inductor assembly common terminal IACTD are preferably equal, and the inductance between the inductor assembly input terminals is preferably less than one fifth of the inductance between an input terminal and the common terminal IACT. These constraints imply that the coupling coefficient is at least 0.9.
• the copper utilization for the inductance assemblies of Figure 16 is not as good as for those of Figures 13-15 because the currents in the main windings are discontinuous.
• the configuration shown in Figure 14 with one pair of windings is the preferred embodiment of the inductor assembly.
• inductor assembly IA The previously described preferred values of the ratios between inductance values in the various implementations of inductor assembly IA are derived from typical diode commutation times and typical ripple current levels in the main inductors, and therefore they are merely guidelines for illustration, and not primary design constraints.
• Figures 17-19 illustrate, respectively, a soft-switched buck power converter SSBKPC, a buck-boost power converter SSBBPC, and a boost power converter SSBTPC.
• These power converters utilize soft-switched power converter cells (implementations of SSPCC of Figure 12) instead of the hard-switched power converter cells that are used in the prior art power converters of Figures 4-6.
• the orientations of the soft-switched power converter cells in soft-switched power converters and their polarities are the same as is described above for the hard-switched power converters.
• Figure 20 illustrates an implementation of the soft-switched buck power converter
• SSBKPC of Figure 17 that has a positive soft-switched power converter cell PSSPCC with two positive switch assemblies PSAl and PSA2 that are constructed as illustrated in Figure 2.
• NSSPCC in Figure 25 is a negative soft-switched power converter cell.
• the inductor assembly IA is the type shown in Figure 13, and has two discrete commutation inductors LCl and LC2, and a main inductor LM. Additional commutation inductors and switching assemblies may be connected as shown in Figure 13, with N switching assemblies preferably operated with an interleaving phase angle difference of 360°/N.
• the inductances of the commutation inductors are preferably equal.
• Figure 21 illustrates waveforms of the soft switching buck power converter SSBKPC in Figure 20.
• the current waveform plots of Figure 21 have vertical scales of 10 A per division.
• the capacitance of COC used in this simulation was selected so that the output ripple voltage was negligible, but much smaller capacitors can be used with converters that are intended to operate loads where high-frequency ripple is not critical, such as typical dc plasma loads. Having low output capacitance is desirable for plasma loads because this reduces the energy that may be delivered to arcs.
• the SSPCC was supplied by an ideal voltage source in the simulation, so the converter input capacitor was not required. The voltage between common switch terminal CSTl and passive switch terminal
• the soft switching characteristics of the soft-switched power converter cells of the present invention provide power savings in the switches and diodes that allow converter circuits using these cells to operate at higher frequencies than with circuits that use prior art hard-switched power converter cells. Operating at higher frequencies allows the inductor and capacitor values to be reduced, and this reduces physical size and cost. Higher frequency operation also enables improvements in the transient response of the converters and reduces the energy available for delivery to plasma arcs, In hard-switched power converters, the diode current is very rapidly reversed from the forward conduction mode to the reverse conduction mode.
• Figure 8 illustrates that the diode currents in the hard-switched power converter cell PHSPCC of Figure 7 drop at a rate of about nearly 1000 A/ ⁇ s, resulting in a large peak reverse-recovery currents IRDI and I RD2 that are 35 percent greater than the output current. This produces high diode turn-off losses and high turn-on losses for the switches.
• the optimal current reduction slope for typical high voltage power diodes ranges from about 20 A/ ⁇ s to 100 A/ ⁇ s.
• the optimal reverse-recovery and commutation times may decrease as diode technologies are improved.
• the time required to bring the diode current to zero, T z is approximately equal to
• the total commutation time, T cl is equal the sum of T z and the reverse-recovery time of the freewheeling diodes FD, t ⁇ t .
• the diode current reaches zero in about 3 ⁇ s, and, the diode reverse-recovery time W is about 1 ⁇ s.
• the total commutation time, T ct is therefore about 4 ⁇ s, which is one-sixteenth of the 64 ⁇ s switching period, T 5 .
• the voltage conversion ratio M of a power converter cell is defined as the steady- state ratio of the average voltage between the inductive and passive terminals, Vj p , divided by the average voltage between the active and passive terminals, V Bp .
• the ideal steady-state voltage conversion ratio V Ou i/Vj n of hard-switched power converters operating in continuous conduction mode is only a function of the duty cycle, and is independent of the converter output current.
• the voltage conversion ratio is nearly equal to the ideal value in high-voltage hard-switched power converters.
• the voltage conversion ratio M for soft-switched power converter cells of the present invention operating in continuous conduction mode is reduced as the output current increases, even with ideal components, because of the effects of the total commutation time T c ⁇ , and the reverse-recovery time of the anti-parallel diodes Tm on the average terminal-terminal voltages of the converter cell.
• the voltage between junction ICJ and the passive terminal PT is equal to half of the voltage between the active an passive terminals during the commutation interval T ct and also during the reverse-recovery interval T m of the anti- parallel diodes. Consequently, the ideal value of M for a soft-switched power converter cell SSPCC, which has N sets of switch assemblies is equal to:
• the ideal value of M is never less than N-D/2 when the power converter is operating in continuous conduction mode.
• the output voltage of a buck power converter BKPC (which is proportional to M) will droop as the output current is increased.
• the maximum duty cycle of the switches is preferably 1/N. Increasing the duty cycle beyond this does not increase the conversion ratio M, and causes the soft-switching effect to be lost. In contrast, the duty cycle of the switches in the prior art hard-switched interleaved buck converter of Figure 7 must use the full 0 to 1 duty cycle range to cover the full output voltage range when the inductors are operating in continuous conduction mode.
• the total commutation time is preferably less than one-tenth of T s for buck power converters BKPC that must achieved output voltages close to the input voltage when fully loaded. Longer commutation times may be acceptable for situations in which the ability of the converter to deliver power is not unduly affected.
• M is a function of the output current creates a damping effect in the transient response of the power converter may sometimes be useful. For example, when a soft-switched buck power converter SSBKPC is used to supply a plasma load that has a negative incremental impedance, this effect may help stabilize the power supply because it increases the output impedance of the power converter.
• the combined current of the two inductors in Figure 7, Ii ota i has much less ripple than the current in each inductor.
• the ripple cancellation effect is illustrated in the inductor current waveforms of Figure 8, but it is lacking in the inductor waveforms of Figure 21 because the power converter of Figure 20 is not interleaved.
• Implementing the buck-boost and boost converters of Figures 18 and 19 with the soft-switched power converter cells of the present invention provides the same type of performance improvements that are afforded to the buck converter, and the switching waveforms have the same shapes as those in Figure 20.
• Figure 22-24 show how to connect two soft-switched power converter cells to form, respectively, a soft-switched stacked buck power converter SBKPC, a soft- switched stacked buck-boost power converter SBBKPC, and a soft-switched stacked boost power converter SBTPC.
• These circuits allow the input and output voltages to be twice what they could be for single power converters with the same voltage ratings for the switches and diodes. They are particularly useful for power supplies that operate plasma loads because high output voltages are usually required.
• the stacked power converters have positive and negative power converter input terminals PCIT and NCIT, and positive and negative power converter output terminals PCOT and NCOT.
• a positive soft-switched power converter cell PSSPCC is connected between a positive input terminal PCIT and an intermediate terminal CCIT.
• a negative soft-switched power converter cell NSSPCC is connected between CCIT and the negative input terminal NCIT.
• the two power converter cells are preferably operated in an interleaved manner.
• the SBKPC can receive power from two stacked power supplies that have a common connection at terminal CCIT. It the switching duty cycles of the two power converter cells are balanced, one power supply may be connected between PCIT and NCIT, with CCIT left floating. This also applies to the soft-switched stacked buck-boost power converter SBBPC of Figure 23.
• FIG 26 illustrates waveforms for the soft-switched stacked buck converter SBKPC of Figure 25.
• Each soft-switching power converter cells is shown with two switching assemblies per inductor assembly, but they could be implemented with N switching assemblies, where N is greater than 1.
• the maximum duty cycle of the switches is preferably 1/N.
• the switches in each soft-switched stacked power converter cell are preferably operated with an interleaving phase angle difference of 360 c /N, while the switching patterns of the two cells are also preferably interleaved, which gives an effective interleaving phase angle difference between two stacked power converter cells PPCC of 180°/N.
• the inductances of the commutation inductors are preferably equal.
• the voltages between junctions CSTl through CST4 and CCIT are respectively illustrated as waveforms Vcpi through VcP4.
• the waveforms for each power converter cell are essentially the same as those for Figure 20, except that the ripple current in the main inductors, I LM is reduced because of the interleaving between the two power converter cells.
• the ripple current frequency in LM12 and LM34 is twice the switching frequency of the switches. This is similar to the ripple canceling effect that occurs with parallel-connected interleaved power converter cells, but it has the advantage that both of the inductors have reduced ripple currents instead of just having cancellation in the sum of the two main inductor currents.
• the SBKPC was supplied by two ideal voltage sources so the converter input capacitors PCIC and NCIC were not required.
• the capacitance of COC used in the simulation was selected so that the output ripple voltage was negligible, but much smaller capacitors can be used with converters that are intended to operate loads where high-frequency ripple is not critical, such as typical dc plasma loads. Having low output capacitance is desirable for plasma loads because this reduces the energy that may be delivered to arcs.
• the SBKPC of Figure 25 can be used to implement the dc power supply described in the co-pending patent application: Apparatus and Method For Fast Arc Extinction With Early Shunting of Arc Current in Plasma, serial number 10/884,119 filed July 2, 2004.
• the main inductors LM12 and LM34 are effectively connected in series with the converter output capacitor COC. Consequently, one of these main inductors could be eliminated, but it is preferable to have both main inductors because they can reduce electromagnetic noise interference (EMI) problems by providing significant high frequency impedance between the switching devices and the load.
• the main inductor could be eliminated from one of the power converter cells in the stacked power converters of Figures 23 and 24, but it is preferable to have both main inductors.
• the main inductors of the stacked soft-switch power converters preferably have essentially the same inductance, and if they do, they may be wound on a common core with the coupling polarities oriented in a series-aiding manner.
• the soft switching buck power converter SBKPC of Figure 22 can be implemented with LM12 andLM34 being wound on a common core, and with the windings oriented so that the terminals connected to ITl and IT2 have opposite polarities.

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• 2004
  • 2004-08-24 US US10/925,832 patent/US6979980B1/en not_active Expired - Lifetime
• 2005
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