WO2006022334A1 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device Download PDF

Info

Publication number
WO2006022334A1
WO2006022334A1 PCT/JP2005/015444 JP2005015444W WO2006022334A1 WO 2006022334 A1 WO2006022334 A1 WO 2006022334A1 JP 2005015444 W JP2005015444 W JP 2005015444W WO 2006022334 A1 WO2006022334 A1 WO 2006022334A1
Authority
WO
WIPO (PCT)
Prior art keywords
copper
palladium
wafer
copper wiring
film
Prior art date
Application number
PCT/JP2005/015444
Other languages
French (fr)
Japanese (ja)
Inventor
Miho Jomen
Kenichi Hara
Original Assignee
Tokyo Electron Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Limited filed Critical Tokyo Electron Limited
Publication of WO2006022334A1 publication Critical patent/WO2006022334A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1646Characteristics of the product obtained
    • C23C18/165Multilayered product
    • C23C18/1651Two or more layers only obtained by electroless plating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31Coating with metals
    • C23C18/38Coating with copper
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/54Contact plating, i.e. electroless electrochemical plating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76849Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76874Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroless plating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to a method of manufacturing a semiconductor device that includes a copper wiring embedded in an insulating film and on which a noria film is formed by electroless plating.
  • the surface of the insulating film in which the recess for embedding the wiring is formed is a barrier material such as tantalum nitride or titanium nitride ( Copper (Cu) for wiring is buried on it, and the surface is polished by a polishing process called CMP (Chemical Mechanical Polishing), so that copper and barrier in parts other than the recesses are covered. The material is removed. Then, an insulating film at the next stage is formed so as to close the upper part of the recess.
  • CMP Chemical Mechanical Polishing
  • next-stage insulating film is formed as it is on the copper wiring, copper diffuses into the insulating film. Therefore, it is necessary to form a noria film on the upper surface of the buried copper.
  • silicon nitride, silicon carbide, silicon nitride carbide, or the like has been used as this noria film.
  • SiOC film carbon-containing silicon oxide film
  • this noria film also serves as an etching stover at the time of etching.
  • a noria film formed of silicon nitride, silicon carbide, silicon nitride carbide, or the like has low adhesion to copper. For this reason, for example, when current flows through the copper wiring, As shown in the figure, the adhesiveness is poor, and the noria film 110 cannot physically hold the copper (copper atom) of the copper wire 101, and the copper atom moves to the interface with the noria film 110. In some cases, a space 111 called a void is formed. The copper atoms on the surface of the part where the space 111 is formed and no longer in contact with the noria film 110 are more easily moved.
  • 112 is a barrier material
  • 113 is a SiOC film which is one of insulating films.
  • adhesion film adhesion film
  • electroless plating for example, JP 2001—230220 (see paragraphs 0012-0015).
  • a hydrochloric acid solution of palladium chloride is supplied to the surface of the semiconductor substrate on which the copper wiring is formed, and the upper surface force of the copper wiring is utilized by utilizing the difference in ionization tendency between copper and palladium.
  • Substitution with S palladium forms a catalytically active layer.
  • an electroless plating solution is supplied to the surface of the semiconductor substrate in place of the hydrochloric acid solution, and the CoWP (CoWP ( Adhesion layers such as cobalt tungsten containing phosphorus and NiWP (nickel tungsten containing phosphorus) are formed.
  • a noria film 110 is formed on the upper surface of the adhesion layer. That is, the above publication describes that after the copper wiring is formed, the upper surface of the copper wiring is subjected to a sticking process to form an adhesion layer, and this adhesion layer is formed by adhesion between copper and the barrier film 110. It has the role of preventing the copper from diffusing into the insulating film.
  • the space 111 due to crevice corrosion remains unfilled even if an adhesion layer is formed. That is, a space 111 is formed between the noria material 112 and the copper wiring 101. As described above, the space 111 can cause deterioration of electrical characteristics and disconnection.
  • the line width of the copper wiring 1 is, for example, 65 nm or less, and further 45 nm or less.
  • the line width is large, a decrease in electrical characteristics caused by the formation of the space 111 is rarely a problem.
  • the line width is small as described above, the ratio to the line width increases even in a space of the same size, so the degree of reduction in electrical characteristics is large. For example, the wire breakage may occur after several tens of hours of use, and the fact is that the influence of the space 111 cannot be ignored.
  • Japanese Patent Application Laid-Open No. 7-183327 (paragraph 0020) describes a palladium aqueous solution before electroless nickel plating is performed on the surface of aluminum which is an input / output terminal of a semiconductor chip. It is described that the pretreatment is performed.
  • the publication discloses that an organic acid palladium such as palladium citrate is used as a noradium aqueous solution.
  • an organic acid palladium such as palladium citrate is used as a noradium aqueous solution.
  • the present invention has been devised to pay attention to the above problems and to effectively solve them. It is an object of the present invention to suppress etching of the surface of the copper wiring and replace the surface of the copper wiring embedded in the recess formed in the insulating film with good electrical characteristics over a long period of time. Another object of the present invention is to provide a semiconductor device manufacturing method capable of manufacturing a semiconductor device that can be maintained.
  • a method for manufacturing a semiconductor device of the present invention includes a step of etching a dielectric film to form a recess, a step of embedding copper in the recess to form a copper wiring, and a solution of an organic acid having a carboxyl group. Using a displacement plating solution formed by dissolving palladium, the step of depositing the surface of copper embedded in the recesses with palladium, and the electroless plating solution on the surface of the copper substituted with palladium. And a step of forming an adhesion layer using the method.
  • a method for manufacturing a semiconductor device comprising:
  • the copper surface embedded in the recess is, for example, the surface of a damascene copper wiring.
  • the organic acid preferably contains at least one of malic acid and malonic acid.
  • the method for manufacturing a semiconductor device of the present invention may further include a step of interposing a noria material containing a metal different from copper between the copper wiring and the insulating film.
  • the surface of the copper wiring is attached to the surface of the copper wiring by using a replacement adhesive solution obtained by dissolving palladium in a solution of an organic acid having a carboxyl group. Due to the small repulsive force, copper is less likely to be etched on the surface of the copper wiring, particularly at the interface with the noria material, when the copper is replaced with radium. For this reason, as a result of less space (gap) being formed between the barrier material and the copper wiring, a semiconductor device having a copper wiring that can maintain good electrical characteristics over a long period of time is manufactured. can do.
  • the organic acid having a carboxyl group is selected. It is possible to remove this acid film without dissolving it. For this reason, palladium can be uniformly deposited on the upper surface of the copper wiring, and as a result, an adhesive layer having high adhesion can be uniformly formed on the surface of the copper wiring by utilizing the catalytic action of the palladium. it can. For this reason, it is possible to suppress the diffusion of copper into the substrate, and more reliably maintain good electrical characteristics over a long period of time.
  • FIG. 1A to FIG. 1D are explanatory views showing the state of a wafer processed by the semiconductor device manufacturing method of the present invention.
  • FIG. 2A to FIG. 2D are explanatory views showing the state of a wafer processed by the semiconductor device manufacturing method of the present invention.
  • FIG. 3 is an explanatory view showing a state of the surface of a wafer to be replaced.
  • FIG. 4 is a longitudinal sectional view showing an example of an apparatus used for carrying out the method for manufacturing a semiconductor device of the present invention.
  • FIG. 5 shows SEM imaging results of the surface of the wafer after the noradium substitution plating was carried out in an example carried out to confirm the effect of the present invention.
  • FIG. 6 is a result of SEM imaging of the surface of the wafer after the adhesion layer was formed in the example performed to confirm the effect of the present invention.
  • FIG. 7 is a SEM imaging result of the surface of the wafer after the noradium substitution plating was performed in the comparative example performed to confirm the effect of the present invention.
  • FIG. 8 is a result of SEM imaging of the surface of the wafer after the adhesion layer was formed in a comparative example performed to confirm the effect of the present invention.
  • FIG. 9 is an explanatory view showing a state in which a space has been formed between the copper wiring and the barrier material.
  • FIG. 10 is an explanatory view showing a state of a copper wiring replaced with a hydrochloric acid solution of palladium.
  • FIGS. 1A to 1D and FIGS. 2A to 2D A method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. 1A to 1D and FIGS. 2A to 2D. 1A to 1D and 2A to 2
  • D is a cross-sectional view of the surface portion of the semiconductor device.
  • a semiconductor wafer (hereinafter referred to as “wafer”) W which is a substrate to be processed on which a semiconductor device is formed, will be described.
  • an etch stopper layer is formed on the upper surface of, for example, a silicon oxide film (SiO 2) 20 as an underlying insulating film on the surface portion of the wafer W.
  • a silicon nitride film (SiN) 22 having a thickness of 400 A is formed.
  • any of these films can be formed by a plasma film forming process. More specifically, each film is formed by placing the wafer w in an evacuated vacuum container and supplying a predetermined deposition gas for each film into the vacuum container to form a plasma.
  • CF gas or CF gas is etched on the wafer W as shown in FIG. 1A.
  • the SiOC film 21 is etched into a predetermined pattern.
  • the underlying SiN film 22 acts as an etching stopper.
  • Figure 1 As shown in B, in the SiOC film 21, a recess (contact hole) 200 having a line width of 64 nm or less, preferably 45 nm or less, for embedding copper for wiring is formed.
  • the surface force of the SiOC film 21 including the recess 200 is covered with a noria material (barrier metal) 24 such as tantalum nitride or titanium nitride.
  • a noria material (barrier metal) 24 such as tantalum nitride or titanium nitride.
  • copper is embedded in the recess 200, for example, by sputtering.
  • CMP polishing in which free particles are supplied to the surface and chemically polished, the copper and the barrier material 24 in portions other than the recesses 200 are removed as shown in FIG. 1D.
  • the copper wiring 25 is formed in the recess 200.
  • a substitution squeezed solution prepared by dissolving palladium in a solution of an organic acid having a carboxyl group for example, a solution of an organic acid containing at least one of malic acid or malonic acid is prepared.
  • palladium is selectively deposited on the upper surface of the copper wiring 25 by supplying the replacement plating solution onto the surface of the wafer W in FIG. 1D.
  • palladium does not precipitate on the SiOC film 21 and the barrier material 24 in the surface of the wafer W. That is, palladium is selectively deposited on the upper surface of the copper wiring 25.
  • a noradium film 26 is formed (with palladium substitution).
  • an aqueous organic acid solution can be produced by adding a predetermined amount of an organic acid to a solvent such as water. While adjusting the temperature of this organic acid aqueous solution to, for example, 60 ° C., for example, powdery palladium sulfate is added and dissolved so as to have, for example, 0.1 lgZ liter, whereby a suitable replacement squeezing solution can be obtained.
  • concentration of the organic acid is increased, the complex formation reaction in which the organic acid reacts with palladium to form a complex is promoted, and the precipitation of palladium is suppressed.
  • the concentration of the organic acid is preferably set to a concentration that does not promote the complex formation reaction, specifically 15 to 25 gZ liters.
  • Such a substitution squeeze solution is adjusted to a predetermined temperature, for example, a temperature selected within a range from room temperature to 60 ° C, and is tempered to the same temperature as the replacement squeeze solution, for example. Supplied to the surface of the wet Ueno, W.
  • a predetermined temperature for example, a temperature selected within a range from room temperature to 60 ° C
  • the redox potential is small at the interface between the copper wiring 25 and the substitution solution, and the copper is redox potential.
  • the received palladium is deposited on the surface of the copper wiring 25.
  • a natural oxide film copper oxide
  • the natural oxide film is dissolved by the presence of the carboxyl group.
  • the surface of the copper wiring 25 is selectively plated with palladium.
  • a palladium film 26 having a thickness of 10 A is formed. Since the catalyst activity is high, the surface of the copper wiring 25 is activated.
  • the palladium substitution suffices to deposit an amount of noradium that acts as a catalyst for forming the adhesion layer described later.
  • the term “noradium film 26” is used. However, in practice, even if palladium is not formed on a film that covers the entire upper surface of the copper wiring 25, an amount of palladium that acts as a catalyst is present. It should be deposited.
  • a cleaning liquid such as pure water is supplied to the surface of the wafer W, and the surface of the wafer W is cleaned.
  • a predetermined electroless plating solution for forming an adhesion layer (hereinafter referred to as “treatment solution” for convenience of explanation) is supplied to the surface of the wafer W.
  • palladium deposited on the surface in the process acts as a catalyst, and the surface of the copper wiring 25 is made of an alloy containing phosphorus (P) selectively, for example, an adhesion layer such as NiWP, NiP, CoP, CoWP 27 Is formed.
  • the adhesion layer 27 has a film thickness of 100 to 200 A, for example.
  • the treatment liquid is a metal salt containing the components that form the adhesion layer 27 (first metal salt and second metal salt in the case of an alloy), and metal ions precipitate as hydroxides under strong alkalinity. It contains a complexing agent for complexing metals, a reducing agent for catalytically reducing and precipitating metal ions, and a pH adjusting agent for adjusting the pH of the liquid. For example, depending on the type of adhesion layer 27 to be formed, at least one of the components listed below as the metal salt, complexing agent, reducing agent, and pH adjusting agent is selected, and a solvent such as A treatment liquid can be prepared by adding to pure water at a predetermined ratio.
  • the first metal salt can be selected from, for example, cobalt sulfate, cobalt chloride, nickel sulfate, and nickel chloride.
  • the second metal salt for example, tungstic acid, sodium tungstate, and ammonium tungstate can be selected.
  • the complexing agent may be selected from, for example, citrate and sodium citrate.
  • the reducing agent may be selected from, for example, hypophosphorous acid, sodium hypophosphite, and ammonium hypophosphite power.
  • the pH adjuster may be selected from sodium hydroxide and TMAH (tetramethylammonium hydroxide).
  • a stabilizer such as boric acid, carbonic acid, or oxycarboxylic acid may be added.
  • additives such as thiosulfuric acid and 2-MBT may be added to promote or suppress the deposition of the plating film, or to modify the plating film.
  • a surfactant such as polyalkylene glycol or polyethylene glycol may be added in order to reduce the surface tension of the plating solution so that the plating solution is uniformly disposed on the surface of the wafer W. .
  • Such a processing liquid is temperature-controlled at a predetermined temperature, for example, a temperature selected within a range of 60 to 90 ° C.
  • a predetermined temperature for example, a temperature selected within a range of 60 to 90 ° C.
  • the wafer W in a state where the temperature is adjusted to the same temperature as the processing liquid. Supplied on the surface.
  • palladium acts as a catalyst on the surface of the copper wiring 25 with the radium substitution, and the metal ions in the treatment liquid are deposited, for example, an adhesion layer 27 having a film thickness of 100 to 200 A is formed. .
  • the wafer W is cleaned using a cleaning liquid such as pure water, and the wafer W is further dried.
  • a silicon nitride film 28 is formed on the surface of Ueno and W (see FIG. 2C), and further, for example, a SiOC film 21 is formed on the upper surface as an insulating film of the next stage (see FIG. 2). (See 2D).
  • the above-described processing is performed on the SiOC film 21 in substantially the same manner. As a result, the next-stage copper wiring is formed.
  • a replacement sticking solution prepared by dissolving, for example, palladium sulfate in a solution of an organic acid having a carboxyl group is prepared, and the replacement sticking solution is used as a wafer.
  • the organic acid having a carboxyl group has a relatively small oxidizing power, even in a region where the copper wiring 25 is in contact with the barrier material 24 (the noria material can be a different metal from copper) It is unlikely that crevice corrosion will occur at the contact surface (interface) during copper displacement plating and copper will be dissolved. In other words, a space (corresponding to space 111) is formed between Noria 24 and copper wiring 25. It is rarely made. As a result, it is possible to manufacture a semiconductor device including the copper wiring 25 that can maintain good electrical characteristics over a long period of time.
  • an organic acid having a carboxyl group for example, malate or malonic acid
  • an organic acid having a carboxyl group has an action of dissolving copper oxide. Therefore, for example, even if the wafer W before being replaced with palladium is exposed to an oxygen-containing atmosphere and a natural oxide film is formed on the upper surface of the copper wiring 25, the copper wiring 25 is not removed at the time of replacing with nitrogen. Only the natural acid film can be dissolved and removed without melting.
  • palladium substitution is performed by utilizing the difference in ionization tendency between copper and palladium, so that the surface of the copper wiring 25 is covered with an acid film (acid copper). In some cases, the transfer of electrons between copper and palladium is suppressed, and the deposition of palladium may not proceed.
  • the palladium substitution reaction proceeds while removing the copper oxide from the carboxyl group contained in the substitution plating solution.
  • Palladium can be deposited well on the surface.
  • means and management for preventing the natural oxide film from being formed on the wafer W so as not to be exposed to an atmosphere containing oxygen can be simplified or omitted.
  • Such an acid tends to crevice the copper at the interface with the barrier material 24 (the present inventors have found that for oxalic acid, and when palladium has been dissolved for a long time, palladium precipitates in the solution. To make sure) In other words, when palladium displacement plating is applied to copper wiring, there is a trade-off between suppressing copper etching (corrosion) and stably dissolving noradium.
  • the inventors of the present invention paying attention to this point, have intensively studied the selection of an organic acid that does not dissolve copper while dissolving palladium, and has reached the present invention.
  • an organic acid solution having a low acidity is selected as a palladium solvent.
  • the etching of the copper wiring can be suppressed, while the noradium substitution plating can be performed stably.
  • the present invention does not exclude the inclusion of hydrochloric acid or sulfuric acid in the replacement sachet at the time of filing the present application. If the base of the solution is an organic acid, a trace amount of hydrochloric acid or sulfuric acid may be contained as an additive. Even with such a substitution solution, the same effect as in the above embodiment can be obtained.
  • the back surface side force is also supported horizontally by the plurality of support tongues 30 of the wafer chuck 3 that constitutes the substrate support portion of the peripheral portion of the wafer W that is a semiconductor device.
  • a central portion of the bottom plate of the wafer chuck 3 is connected to a rotation driving unit, for example, a hollow motor 32 via a cylindrical rotating shaft 31, for example.
  • the substrate chuck 3 is configured to be rotatable about the vertical axis while supporting the wafer W.
  • the inner region surrounded by the plurality of support tongues 30 of the wafer chuck 3 can be opposed to the back surface of the wafer W through a gap and has, for example, a temperature control plate having substantially the same size as the wafer W.
  • 33 is provided to be movable up and down.
  • the temperature adjustment plate 33 includes a heating means (not shown) such as a heater inside.
  • the temperature control plate 33 is supported at the center on the back surface side thereof by, for example, a tubular support member 34 that is suspended.
  • the lower side of the support member 34 is connected to an elevating unit (not shown) for elevating the temperature adjustment plate 33.
  • a discharge port 35 is formed.
  • the discharge port 35 includes a liquid flow path 36 which is an internal space of the tubular support member 34, and a liquid supply path 37 connected to the liquid flow path 36, for example, a supply source of the temperature adjusting liquid via a pipe. Connected with 38.
  • a flow rate adjusting unit and a valve can be provided in the middle of the liquid supply path 37.
  • the side of the wafer W supported by the wafer chuck 3 is surrounded so as to receive liquid.
  • a cup body 4 is provided to be movable up and down.
  • a drain discharge port 41 is provided at the bottom of the cup body 4 for discharging the liquid spilled from the wafer W as a drain.
  • a power cup body 4 that is not shown is provided around the periphery of the force cup body 4 and is provided with a housing that forms an apparatus exterior body. The active gas will be filled!
  • the upper surface side of the wafer W supported by the wafer chuck 3 is opposed to the surface of the wafer W through a gap in the range of 0.1 to 2 mm, for example, and is the same as the Ueno and W.
  • a liquid supply plate 5 having a size larger than that of the wafer W is provided to be movable up and down.
  • the liquid supply plate 5 includes heating means (not shown) such as a heater.
  • a plurality of discharge holes 51 for supplying either the processing liquid or the cleaning liquid to the surface of the wafer W are uniformly formed in the surface of the liquid supply plate 5.
  • the liquid supply plate 5 is provided with a liquid storage section (not shown) for supplying the treatment liquid and the cleaning liquid to the discharge holes 51.
  • a liquid supply path 52 for example, one end of a pipe is connected to the liquid reservoir.
  • the other end of the liquid supply path 52 is connected to a processing liquid supply source 53 and a cleaning liquid supply source 54, respectively.
  • a flow rate adjusting unit and a valve are provided in the middle of the liquid supply path 52.
  • reference numeral 55 denotes a switching unit for switching the flow path of the processing liquid and the cleaning liquid, for example, a three-way valve operated by a control unit (not shown).
  • the length (diameter) of the wafer W is more than half the width (diameter), that is, more than the radius
  • a liquid supply nozzle 6 having a slit-like discharge port 60 formed in a length is provided so as to be movable up and down and back and forth.
  • the liquid supply nozzle 6 is connected to a replacement liquid supply source 62 via a supply path 61 such as a pipe.
  • a flow rate adjusting unit and a valve are provided in the middle of the supply path 61.
  • the width of the wafer W for supplying a drying gas for example, an inert gas such as nitrogen whose temperature and humidity are adjusted, to the surface of the wafer W is provided.
  • the liquid supply plate 5 is set to its raised position and the cup body 4 is set to its lowered position so that it does not interfere with the wafers W and W that are carried in and out of the apparatus by a substrate transfer arm (not shown). .
  • a wafer W as shown in FIG. 1D is loaded. Wafer W is transferred to wafer chuck 3 and held in a horizontal position.
  • the cup body 4 moves to its raised position (the position shown in FIG. 4). Further, the temperature adjusting plate 33 heated to a predetermined temperature by the internal heater 33 force rises to a position of a separation distance of 0.1 to 2 mm, for example, with respect to the back surface of the wafer W, and is discharged from the discharge port 35 formed on the front surface.
  • the temperature adjustment liquid adjusted to a predetermined temperature is discharged toward the back surface of the wafer W.
  • the temperature adjusting liquid supplied to the back surface of the wafer W spreads over the entire back surface of the wafer W by spreading the gap between the wafer W and the temperature control plate 33 from the center to the outside. As a result, the wafer W is adjusted to a predetermined temperature, for example, a temperature selected within a range from room temperature to 60 ° C.
  • the arrangement of the liquid supply nozzle 6 is set so that the projected region of the slit-like discharge port 60 is set at a position straddling the outer edge of the central force of the wafer W, for example.
  • the displacement squeezing liquid force adjusted to a predetermined temperature for example, the same temperature as the wafer W, is discharged toward the surface of the wafer W at a predetermined flow rate.
  • the wafer W is rotated by the hollow motor 32 at least once around the vertical axis. As a result, the replacement plating solution is supplied to the entire surface of the wafer W.
  • the liquid supply nozzle 6 that stopped discharging moves backward.
  • the state force with the replacement liquid on the surface is maintained for a predetermined time, for example, 30 seconds.
  • the substitution reaction of copper and palladium proceeds, and the palladium layer 26 is formed on the upper surface of the copper wiring 25.
  • the liquid supply plate 5 heated to a predetermined temperature by an internal heater is lowered to the predetermined height position.
  • a cleaning liquid adjusted to a predetermined temperature for example, 60 to 90 ° C.
  • a predetermined temperature for example, 60 to 90 ° C.
  • the liquid cleaning liquid discharged from the discharge holes 51 of the liquid supply plate 5 is switched to the processing liquid.
  • the cleaning liquid on the surface of the wafer W is replaced with the processing liquid.
  • the gap between the wafer W and the liquid supply plate 5 is filled with the processing liquid by the surface tension of the processing liquid.
  • the state in which the processing liquid is accumulated on the surface is held for a predetermined time, for example, 60 seconds.
  • the electroless plating reaction proceeds by the catalytic action of palladium, and the adhesion layer 27 is formed on the upper surface of the copper wiring 25 (the upper surface of the palladium layer 26).
  • the liquid discharged from the discharge holes 51 is switched again to the cleaning liquid, and the processing liquid is removed from the surface of the wafer W. That is, the surface of the wafer W is cleaned.
  • the arrangement of the gas supply nozzle 7 is set so that the projection area of the slit-like discharge port 70 is set at a position where, for example, the central force of the wafer W also straddles the outer edge.
  • the drying gas whose temperature and humidity are adjusted is discharged from the discharge port 70.
  • the wafer W is rotated at high speed around the vertical axis by the hollow motor 32. As a result, spin drying is performed to shake off the liquid. That is, the wafer W is dried.
  • the dried wafer W (corresponding to FIG. 2B) is also unloaded by a substrate transfer arm (not shown) and transferred to a device for processing the next process.
  • Each process performed in the semiconductor device manufacturing apparatus described above can be controlled by the computer device 80.
  • the program executed in the computer device 80 for the control and the computer-readable recording medium including the program are also subject to protection in this case.
  • Example 1 In this example, palladium substitution plating was performed using the above-mentioned substitution plating solution. Thereafter, the wafer was washed with water, and further a processing solution was supplied, and an adhesion layer 27 was formed by electroless plating. Details of the test conditions are as follows.
  • Figure 5 shows the SEM imaging results of the surface of the wafer W after the palladium replacement plating.
  • Figure 6 shows the SEM imaging results of the surface of the wafer W after the adhesion layer 27 is formed.
  • Fig. 7 shows the SEM imaging results of the surface of wafer W after the palladium replacement plating.
  • Figure 8 shows the SEM imaging results of the surface of the wafer W after the adhesion layer 27 is formed.
  • Example 1 after the palladium substitution staking, the copper wiring 25 is not etched, and no space is formed at the interface with the noria material 24.
  • Example 1 substitution solution obtained by dissolving palladium in malic acid
  • the copper wiring 25 can be prevented from being etched at the time of palladium replacement and copper wiring. It was confirmed that the formation of a space between 25 and the barrier material 24 was significantly suppressed.
  • the substitution squeezing solution of Example 1 was supplied to the wafer W that was exposed to the air atmosphere and formed with a natural acid film on the surface. .
  • the copper was not etched on the surface of the copper wiring 25 after the treatment and that the oxide film was removed. That is, if an organic acid having a carboxyl group is selected, it is confirmed that even if an acid film is formed on the surface of the copper wiring 25, the oxide film can be removed and palladium can be deposited. did it.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Electrochemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemically Coating (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

A method for manufacturing a semiconductor device, characterized in that it comprises a step of etching an insulating film, to form a concave portion, a step of filling the concave portion with copper, to form a copper wiring, a step of subjecting the surface of the copper filling the above concave portion to a displacement plating with palladium, by the use of a displacement plating solution prepared by dissolving palladium in a solution of an organic acid having a carboxyl group, and a step of forming an adhered layer on the surface of the copper layer being displacement-plated with palladium by the use of an electroless plating solution.

Description

明 細 書  Specification
半導体装置の製造方法  Manufacturing method of semiconductor device
技術分野  Technical field
[0001] 本発明は、絶縁膜に埋め込まれた銅配線を備え、その上にノリア膜が無電解めつ きにより形成された半導体装置を製造する方法に関する。  The present invention relates to a method of manufacturing a semiconductor device that includes a copper wiring embedded in an insulating film and on which a noria film is formed by electroless plating.
背景技術  Background art
[0002] 半導体デバイス(半導体装置)の性能向上の要請から、近年ではアルミニウム線に 代わって銅線を用いる配線技術が実施されている。銅は、アルミニウムよりも低抵抗 であり、エレクト口マイグレーション耐性 (EM耐性)に優れているという特性を有する 一方、半導体基板内への拡散の可能性が高ぐ酸化され易いといった問題点をも有 している。このため、半導体装置内において多層構造をもって配線される銅と層間絶 縁膜 (以下、「絶縁膜」と略す。)との間には、ノリアメタルや保護膜と呼ばれる種々の ノリア材が用いられている。  In recent years, a wiring technique using a copper wire instead of an aluminum wire has been implemented in response to a demand for improving the performance of a semiconductor device (semiconductor device). Copper has the characteristics that it has a lower resistance than aluminum and is excellent in electo-hole migration resistance (EM resistance), but also has a problem that it has a high possibility of diffusion into the semiconductor substrate and is easily oxidized. is doing. For this reason, various noria materials called noria metals and protective films are used between copper and an interlayer insulating film (hereinafter abbreviated as “insulating film”) wired in a multilayer structure in a semiconductor device. Yes.
[0003] 以上のような銅の多層配線を実現する手法の一つでは、ダマシンプロセスにおいて 、配線を埋め込むための凹部が形成された絶縁膜の表面が窒化タンタルゃ窒化チタ ンなどのバリア材 (バリアメタル)で被覆され、その上に配線用の銅 (Cu)が埋め込ま れ、その表面が CMP (Chemical Mechanical Polishing)と呼ばれる研磨プロセスによ つて研磨されて、凹部以外の部位での銅及びバリア材が取り除かれる。そして、凹部 上方を塞ぐように、次段の絶縁膜が形成される。  [0003] In one of the methods for realizing the copper multilayer wiring as described above, in the damascene process, the surface of the insulating film in which the recess for embedding the wiring is formed is a barrier material such as tantalum nitride or titanium nitride ( Copper (Cu) for wiring is buried on it, and the surface is polished by a polishing process called CMP (Chemical Mechanical Polishing), so that copper and barrier in parts other than the recesses are covered. The material is removed. Then, an insulating film at the next stage is formed so as to close the upper part of the recess.
[0004] ここで、銅配線の上にそのまま次段の絶縁膜が形成されると、銅が当該絶縁膜の中 に拡散してしまう。そこで、埋め込まれた銅の上面にノ リア膜を形成する必要がある。 このノリア膜としては、従来から、窒化シリコン、炭化シリコン、窒化炭化シリコンなど が用いられてきた。このノリア膜は、絶縁膜として例えば炭素含有シリコン酸ィ匕膜 (以 下、「SiOC膜」と呼ぶ。)が用いられる場合には、エッチング時のエッチングストツバの 役割も持つ。  [0004] Here, if the next-stage insulating film is formed as it is on the copper wiring, copper diffuses into the insulating film. Therefore, it is necessary to form a noria film on the upper surface of the buried copper. Conventionally, silicon nitride, silicon carbide, silicon nitride carbide, or the like has been used as this noria film. For example, when a carbon-containing silicon oxide film (hereinafter referred to as “SiOC film”) is used as the insulating film, this noria film also serves as an etching stover at the time of etching.
[0005] し力しながら、窒化シリコン、炭化シリコン、窒化炭化シリコンなどで形成されるノ リア 膜は、銅との密着性が小さい。このため、銅配線に電流を流したときに、例えば図 9に 示すように、密着性の悪 、部位にぉ 、てノリア膜 110が銅線 101の銅 (銅原子)を物 理的に保持しきれなくなって、銅原子が移動してノリア膜 110との界面にボイドと呼 ばれる空間 111を形成してしまう場合がある。空間 111が形成されてノリア膜 110と 当接しなくなった部位の表面部にある銅原子は、益々動きやすくなるため、この空間[0005] However, a noria film formed of silicon nitride, silicon carbide, silicon nitride carbide, or the like has low adhesion to copper. For this reason, for example, when current flows through the copper wiring, As shown in the figure, the adhesiveness is poor, and the noria film 110 cannot physically hold the copper (copper atom) of the copper wire 101, and the copper atom moves to the interface with the noria film 110. In some cases, a space 111 called a void is formed. The copper atoms on the surface of the part where the space 111 is formed and no longer in contact with the noria film 110 are more easily moved.
110がさらに大きく成長してそまう。これにより、電気特性が低下し、ついには銅配線 101が断線してしまう懸念さえある。なお、図 9において、 112はバリア材であり、 113 は絶縁膜の一つである SiOC膜である。 110 will grow even bigger. As a result, the electrical characteristics deteriorate, and there is even a concern that the copper wiring 101 will eventually break. In FIG. 9, 112 is a barrier material, and 113 is a SiOC film which is one of insulating films.
[0006] 一方、最近にぉ 、て、銅とバリア膜 110との密着性を高めるために、無電解めつき で密着層(密着膜)を形成することが提案されている(例えば、特開 2001— 230220 号公報 (段落 0012〜0015)参照)。この方法では、先ず前処理として、銅配線が形 成された半導体基板の表面に塩化パラジウムの塩酸溶液が供給されて、銅とパラジ ゥムのイオン化傾向の相違を利用して銅配線の上面力 Sパラジウムで置換され、触媒 活性層が形成される。続いて、塩酸溶液に代えて無電解めつき液が半導体基板の表 面に供給され、前工程にて基板表面に析出させられたパラジウムの触媒作用を利用 して、銅配線の上面に CoWP (リンを含有するコバルトタングステン), NiWP (リンを 含有するニッケルタングステン)などの密着層が形成される。その後、当該密着層の 上面に、ノリア膜 110が形成される。つまり、前記公報には、銅配線形成後に銅配線 の上面に対してめつき処理を行って密着層を形成すること、が記載されており、この 密着層は、銅とバリア膜 110との密着性を高めると共に、銅が絶縁膜中に拡散するこ とを防止する役割を有する。 On the other hand, recently, in order to improve the adhesion between copper and the barrier film 110, it has been proposed to form an adhesion layer (adhesion film) by electroless plating (for example, JP 2001—230220 (see paragraphs 0012-0015). In this method, first, as a pretreatment, a hydrochloric acid solution of palladium chloride is supplied to the surface of the semiconductor substrate on which the copper wiring is formed, and the upper surface force of the copper wiring is utilized by utilizing the difference in ionization tendency between copper and palladium. Substitution with S palladium forms a catalytically active layer. Subsequently, an electroless plating solution is supplied to the surface of the semiconductor substrate in place of the hydrochloric acid solution, and the CoWP (CoWP ( Adhesion layers such as cobalt tungsten containing phosphorus and NiWP (nickel tungsten containing phosphorus) are formed. Thereafter, a noria film 110 is formed on the upper surface of the adhesion layer. That is, the above publication describes that after the copper wiring is formed, the upper surface of the copper wiring is subjected to a sticking process to form an adhesion layer, and this adhesion layer is formed by adhesion between copper and the barrier film 110. It has the role of preventing the copper from diffusing into the insulating film.
[0007] し力しながら、塩ィ匕パラジウムの塩酸溶液を用いてパラジウム置換めつきが行われ る場合、塩酸が強い酸ィ匕カを有するために、銅とパラジウムとの置換反応が進行する 一方で、例えば図 10に示すように、銅配線 101の表面、特に側周面、のバリア材 11 2と接触している部位でいわゆる隙間腐食が促進されてしまう、すなわち、銅が溶解し てしまうという問題がある。イオン化傾向カゝら考えると、銅は塩酸に溶解しない物質の ように考えられるのだが、バリア材 112にタンタルなどの金属 (銅に対して異種の金属 )が含まれていることによって、図 10のような隙間腐食が促進されるのであろうと推測 されている。この隙間腐食による空間 111は、密着層を形成しても埋められずに残つ てしまう、すなわち、ノリア材 112と銅配線 101との間に、空間 111が形成されてしま う。この空間 111は、前記したように、電気特性の低下や断線の原因となり得る。 [0007] However, when palladium substitution is performed using a hydrochloric acid solution of salt-palladium, the substitution reaction between copper and palladium proceeds because hydrochloric acid has a strong acid scent. On the other hand, for example, as shown in FIG. 10, so-called crevice corrosion is promoted at a portion in contact with the barrier material 112 on the surface of the copper wiring 101, particularly the side peripheral surface, that is, the copper is dissolved. There is a problem of end. Considering the ionization tendency, copper seems to be a substance that does not dissolve in hydrochloric acid. However, the barrier material 112 contains a metal such as tantalum (a metal different from copper). It is speculated that crevice corrosion like this will be promoted. The space 111 due to crevice corrosion remains unfilled even if an adhesion layer is formed. That is, a space 111 is formed between the noria material 112 and the copper wiring 101. As described above, the space 111 can cause deterioration of electrical characteristics and disconnection.
[0008] また、近年にぉ 、ては、半導体デバイスの微細化及び高集積化が益々進行する傾 向にある。これに伴って、銅配線 1の線幅も、例えば 65nm以下、さらには 45nm以下 にしようとの要請がある。線幅が大きい場合には、前記空間 111が形成されたことに より生じる電気特性の低下が問題となることは少ない。しかし、前記のように小さい線 幅では、同じ大きさの空間であっても線幅に対する割合が増すので、電気特性の低 下の程度が大きい。例えば、数十時間程度の使用で断線してしまう場合もあるため、 空間 111の影響を無視することができなくなつているのが実情である。  [0008] In recent years, semiconductor devices have been increasingly miniaturized and highly integrated. Along with this, there is a demand for the line width of the copper wiring 1 to be, for example, 65 nm or less, and further 45 nm or less. When the line width is large, a decrease in electrical characteristics caused by the formation of the space 111 is rarely a problem. However, when the line width is small as described above, the ratio to the line width increases even in a space of the same size, so the degree of reduction in electrical characteristics is large. For example, the wire breakage may occur after several tens of hours of use, and the fact is that the influence of the space 111 cannot be ignored.
[0009] その他、無電解めつきの技術として、特開平 7— 183327号公報 (段落 0020)には 、半導体チップの入出力端子であるアルミニウムの表面に無電解ニッケルめっきを行 う前に、パラジウム水溶液によって前処理を行うことが記載されている。また、同公報 には、ノラジウム水溶液としてクェン酸パラジウムなどの有機酸パラジウムを用いるこ とが記載されている。しかしながら、銅配線上の無電解めつきに関連する記載はない 発明の要旨  [0009] In addition, as a technique for electroless plating, Japanese Patent Application Laid-Open No. 7-183327 (paragraph 0020) describes a palladium aqueous solution before electroless nickel plating is performed on the surface of aluminum which is an input / output terminal of a semiconductor chip. It is described that the pretreatment is performed. In addition, the publication discloses that an organic acid palladium such as palladium citrate is used as a noradium aqueous solution. However, there is no description relating to electroless plating on copper wiring.
[0010] 本発明は、以上のような問題点に着目し、これを有効に解決すべく創案されたもの である。本発明の目的は、絶縁膜に形成された凹部に埋め込まれた銅配線の表面を ノラジウム置換めつきするにあたり、銅配線の表面がエッチングされることを抑えると 共に良好な電気特性を長期に亘つて維持することができる半導体装置を製造するこ とができる半導体装置の製造方法を提供することにある。  [0010] The present invention has been devised to pay attention to the above problems and to effectively solve them. It is an object of the present invention to suppress etching of the surface of the copper wiring and replace the surface of the copper wiring embedded in the recess formed in the insulating film with good electrical characteristics over a long period of time. Another object of the present invention is to provide a semiconductor device manufacturing method capable of manufacturing a semiconductor device that can be maintained.
[0011] 本発明の半導体装置の製造方法は、絶縁膜をエッチングして凹部を形成する工程 と、前記凹部に銅を埋め込んで銅配線を形成する工程と、カルボキシル基を有する 有機酸の溶液にパラジウムを溶力してなる置換めつき液を用いて、前記凹部に埋め 込まれた銅の表面をパラジウム置換めつきする工程と、パラジウム置換めつきされた 銅の表面に、無電解めつき液を用いて密着層を形成する工程と、を備えたことを特徴 とする半導体装置の製造方法である。 [0011] A method for manufacturing a semiconductor device of the present invention includes a step of etching a dielectric film to form a recess, a step of embedding copper in the recess to form a copper wiring, and a solution of an organic acid having a carboxyl group. Using a displacement plating solution formed by dissolving palladium, the step of depositing the surface of copper embedded in the recesses with palladium, and the electroless plating solution on the surface of the copper substituted with palladium. And a step of forming an adhesion layer using the method. A method for manufacturing a semiconductor device, comprising:
[0012] 凹部に埋め込まれた銅の表面は、例えばダマシン構造の銅配線の表面である。 [0013] 前記有機酸は、好ましくは、リンゴ酸又はマロン酸のうちの少なくとも一方を含んで いる。 [0012] The copper surface embedded in the recess is, for example, the surface of a damascene copper wiring. [0013] The organic acid preferably contains at least one of malic acid and malonic acid.
[0014] また、本発明の半導体装置の製造方法は、前記銅配線と前記絶縁膜との間に、銅 とは種類の異なる金属を含むノリア材を介在させる工程を更に備え得る。  In addition, the method for manufacturing a semiconductor device of the present invention may further include a step of interposing a noria material containing a metal different from copper between the copper wiring and the insulating film.
[0015] 本発明によれば、カルボキシル基を有する有機酸の溶液にパラジウムを溶力してな る置換めつき液を用いて銅配線の表面をパラジウム置換めつきするので、有機酸の 酸ィ匕力が小さいことにより、ノ《ラジウム置換めつき時に銅配線の表面、特にはノリア 材との間の界面、において銅がエッチングされることが少ない。このため、バリア材と 銅配線との間に空間(隙間)が形成されることが少なぐ結果として、良好な電気特性 を長期に亘つて維持することのできる銅配線を備えた半導体装置を製造することがで きる。  [0015] According to the present invention, the surface of the copper wiring is attached to the surface of the copper wiring by using a replacement adhesive solution obtained by dissolving palladium in a solution of an organic acid having a carboxyl group. Due to the small repulsive force, copper is less likely to be etched on the surface of the copper wiring, particularly at the interface with the noria material, when the copper is replaced with radium. For this reason, as a result of less space (gap) being formed between the barrier material and the copper wiring, a semiconductor device having a copper wiring that can maintain good electrical characteristics over a long period of time is manufactured. can do.
[0016] 更に、本発明によれば、カルボキシル基を有する有機酸を選択したことにより、例え ばパラジウム置換めつきを行う前の銅配線の表面に自然酸化膜が形成される場合で も、銅を溶解させることなぐこの酸ィ匕膜を除去することができる。このため、銅配線の 上面に均一にパラジウムを析出させることができ、結果として、当該パラジウムの触媒 作用を利用して、密着性の高い密着層を銅配線の表面に均一に成膜することができ る。このため、銅が基板内に拡散することが抑えられ、より確実に良好な電気特性を 長期に亘つて維持することができる。  [0016] Further, according to the present invention, even when a natural oxide film is formed on the surface of the copper wiring before performing the palladium substitution plating, the organic acid having a carboxyl group is selected. It is possible to remove this acid film without dissolving it. For this reason, palladium can be uniformly deposited on the upper surface of the copper wiring, and as a result, an adhesive layer having high adhesion can be uniformly formed on the surface of the copper wiring by utilizing the catalytic action of the palladium. it can. For this reason, it is possible to suppress the diffusion of copper into the substrate, and more reliably maintain good electrical characteristics over a long period of time.
図面の簡単な説明  Brief Description of Drawings
[0017] [図 1]図 1A乃至図 1Dは、本発明の半導体装置の製造方法により処理されるウェハ の様子を示す説明図である。  FIG. 1A to FIG. 1D are explanatory views showing the state of a wafer processed by the semiconductor device manufacturing method of the present invention.
[図 2]図 2A乃至図 2Dは、本発明の半導体装置の製造方法により処理されるウェハ の様子を示す説明図である。  FIG. 2A to FIG. 2D are explanatory views showing the state of a wafer processed by the semiconductor device manufacturing method of the present invention.
[図 3]図 3は、置換めつきされるウェハの表面の様子を示す説明図である。  FIG. 3 is an explanatory view showing a state of the surface of a wafer to be replaced.
[図 4]図 4は、本発明の半導体装置の製造方法を実施するために用いられる装置例 を示す縦断面図である。  FIG. 4 is a longitudinal sectional view showing an example of an apparatus used for carrying out the method for manufacturing a semiconductor device of the present invention.
[図 5]図 5は、本発明の効果を確認するために行われた実施例の、ノラジウム置換め つきが行われた後のウェハの表面の SEM撮像結果である。 [図 6]図 6は、本発明の効果を確認するために行われた実施例の、密着層が形成さ れた後のウェハの表面の SEM撮像結果である。 [FIG. 5] FIG. 5 shows SEM imaging results of the surface of the wafer after the noradium substitution plating was carried out in an example carried out to confirm the effect of the present invention. [FIG. 6] FIG. 6 is a result of SEM imaging of the surface of the wafer after the adhesion layer was formed in the example performed to confirm the effect of the present invention.
[図 7]図 7は、本発明の効果を確認するために行われた比較例の、ノラジウム置換め つきが行われた後のウェハの表面の SEM撮像結果である。  [FIG. 7] FIG. 7 is a SEM imaging result of the surface of the wafer after the noradium substitution plating was performed in the comparative example performed to confirm the effect of the present invention.
[図 8]図 8は、本発明の効果を確認するために行われた比較例の、密着層が形成さ れた後のウェハの表面の SEM撮像結果である。  FIG. 8 is a result of SEM imaging of the surface of the wafer after the adhesion layer was formed in a comparative example performed to confirm the effect of the present invention.
[図 9]図 9は、銅配線とバリア材との間に空間が形成されてしまった様子を示す説明 図である。  FIG. 9 is an explanatory view showing a state in which a space has been formed between the copper wiring and the barrier material.
[図 10]図 10は、パラジウムの塩酸溶液を用いて置換めつきされた銅配線の様子を示 す説明図である。  [FIG. 10] FIG. 10 is an explanatory view showing a state of a copper wiring replaced with a hydrochloric acid solution of palladium.
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0018] 本発明の一実施の形態に係る半導体装置の製造方法について、図 1A乃至図 1D 及び図 2A乃至図 2Dを参照しながら説明する。図 1A乃至図 1D及び図 2A乃至図 2A method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. 1A to 1D and FIGS. 2A to 2D. 1A to 1D and 2A to 2
Dは、半導体装置の表面部の断面図である。 D is a cross-sectional view of the surface portion of the semiconductor device.
[0019] 先ず、半導体装置が形成される被処理基板である半導体ウェハ(以下、「ウェハ」と 呼ぶ。)Wについて説明する。図 1 Aに示すように、ウェハ Wの表面部において、下地 の絶縁膜としての例えばシリコン酸ィ匕膜 (SiO ) 20の上面に、エッチストッパ層として First, a semiconductor wafer (hereinafter referred to as “wafer”) W, which is a substrate to be processed on which a semiconductor device is formed, will be described. As shown in FIG. 1A, an etch stopper layer is formed on the upper surface of, for example, a silicon oxide film (SiO 2) 20 as an underlying insulating film on the surface portion of the wafer W.
2  2
の例えば膜厚 400 Aの窒化シリコン膜 (SiN) 22が形成されている。さらにその上面 に、次段の絶縁膜としての例えば膜厚 700Aの SiOC膜 (炭素含有シリコン酸ィ匕膜) 21が積層されている。  For example, a silicon nitride film (SiN) 22 having a thickness of 400 A is formed. Further, an SiOC film (carbon-containing silicon oxide film) 21 having a thickness of 700 A, for example, is laminated on the upper surface as an insulating film for the next stage.
[0020] ここで、 SiO 膜 20、 SiOC膜 21及び SiN膜 22を成膜する手法の一例について説  [0020] Here, an example of a method for forming the SiO film 20, the SiOC film 21, and the SiN film 22 will be described.
2  2
明する。これらの膜は、いずれも、プラズマ成膜処理によって成膜することができる。 より具体的には、真空排気された真空容器内にウェハ wを載置して、当該真空容器 内に各膜毎に所定の成膜ガスを供給してプラズマ化することにより、各膜を成膜する ことができる。  Light up. Any of these films can be formed by a plasma film forming process. More specifically, each film is formed by placing the wafer w in an evacuated vacuum container and supplying a predetermined deposition gas for each film into the vacuum container to form a plasma. Can be membrane.
[0021] 図 1Aに示すようなウェハ Wに対して、例えば CF ガスや C F ガスなどをエッチ  [0021] For example, CF gas or CF gas is etched on the wafer W as shown in FIG. 1A.
4 4 8  4 4 8
ングガスとして用いることによって、 SiOC膜 21が所定のパターン状にエッチングされ る。このとき、下地の SiN膜 22は、エッチングストッパとして作用する。これにより、図 1 Bに示すように、 SiOC膜 21において、配線用の銅を埋め込むための例えば線幅が 64nm以下、好ましくは 45nm以下、の凹部(コンタクトホール) 200が形成される。 By using the etching gas, the SiOC film 21 is etched into a predetermined pattern. At this time, the underlying SiN film 22 acts as an etching stopper. As a result, Figure 1 As shown in B, in the SiOC film 21, a recess (contact hole) 200 having a line width of 64 nm or less, preferably 45 nm or less, for embedding copper for wiring is formed.
[0022] 続いて、図 1Cに示すように、凹部 200を含む SiOC膜 21の表面力 窒化タンタル、 窒化チタンなどのノリア材 (バリアメタル) 24によって被覆される。さらに続いて、例え ばスパッタリングによって、凹部 200内に銅が埋め込まれる。その後、例えば遊離砲 粒を表面に供給して化学的に研磨する CMP研磨を行うことによって、図 1Dに示すよ うに、凹部 200以外の部位における銅及びバリア材 24が除去される。これにより、凹 部 200内に銅配線 25が形成される。  Subsequently, as shown in FIG. 1C, the surface force of the SiOC film 21 including the recess 200 is covered with a noria material (barrier metal) 24 such as tantalum nitride or titanium nitride. Subsequently, copper is embedded in the recess 200, for example, by sputtering. Thereafter, for example, by performing CMP polishing in which free particles are supplied to the surface and chemically polished, the copper and the barrier material 24 in portions other than the recesses 200 are removed as shown in FIG. 1D. As a result, the copper wiring 25 is formed in the recess 200.
[0023] 、て、カルボキシル基を有する有機酸の溶液、例えばリンゴ酸又はマロン酸の少 なくとも一方を含む有機酸の溶液、にパラジウムを溶カゝしてなる置換めつき液が用意 される。そして、当該置換めつき液が図 1Dのウェハ Wの表面に供給されることによつ て、銅配線 25の上面に選択的にパラジウムを析出させる。ここで、ウェハ Wの表面の うち、 SiOC膜 21及びバリア材 24にはパラジウムは析出しない。すなわち、銅配線 25 の上面に選択的にパラジウムが析出させられる。これにより、ノラジウム膜 26が形成 される (パラジウム置換めつき)。  [0023] Then, a substitution squeezed solution prepared by dissolving palladium in a solution of an organic acid having a carboxyl group, for example, a solution of an organic acid containing at least one of malic acid or malonic acid is prepared. . Then, palladium is selectively deposited on the upper surface of the copper wiring 25 by supplying the replacement plating solution onto the surface of the wafer W in FIG. 1D. Here, palladium does not precipitate on the SiOC film 21 and the barrier material 24 in the surface of the wafer W. That is, palladium is selectively deposited on the upper surface of the copper wiring 25. As a result, a noradium film 26 is formed (with palladium substitution).
[0024] ここで、前記パラジウム置換めつきに用いられる置換めつき液について説明を補足 する。例えば水などの溶媒に所定量の有機酸を添加することによって有機酸水溶液 が生成され得る。この有機酸水溶液を例えば 60°Cに温調しながら、例えば粉末状の 硫酸パラジウムを例えば 0. lgZリットルとなるように添加して溶解させることによって 、好適な置換めつき液とすることができる。なお、有機酸の濃度が高くなると、有機酸 がパラジウムと反応して錯体が形成される錯体形成反応が促進されて、パラジウムの 析出が抑止されてしまう。従って、有機酸の濃度は、前記錯体形成反応が促進され ない程度の濃度、具体的には 15〜25gZリットル、に設定されることが好ましい。  [0024] Here, a supplementary explanation will be given for the substitution sachet used for the palladium substitution stake. For example, an aqueous organic acid solution can be produced by adding a predetermined amount of an organic acid to a solvent such as water. While adjusting the temperature of this organic acid aqueous solution to, for example, 60 ° C., for example, powdery palladium sulfate is added and dissolved so as to have, for example, 0.1 lgZ liter, whereby a suitable replacement squeezing solution can be obtained. . When the concentration of the organic acid is increased, the complex formation reaction in which the organic acid reacts with palladium to form a complex is promoted, and the precipitation of palladium is suppressed. Accordingly, the concentration of the organic acid is preferably set to a concentration that does not promote the complex formation reaction, specifically 15 to 25 gZ liters.
[0025] このような置換めつき液は、所定の温度、例えば常温から 60°Cの範囲内で選択さ れた温度、に温調され、例えば当該置換めつき液と同じ温度に温調された状態のゥ エノ、 Wの表面に供給される。これにより、例えば図 3に模式的に示すように、銅配線 2 5と置換めつき液との界面において、銅とパラジウムとの関係でみて、酸化還元電位 の小さ!/、銅が酸化還元電位の大き!、パラジウムに電子を受け渡して溶解し、電子を 受け取ったパラジウムが銅配線 25の表面に析出する。また、この時、銅配線 25の表 面に自然酸化膜 (酸化銅)が形成されているなら、カルボキシル基の存在によって当 該自然酸ィ匕膜が溶解される。即ち、銅とパラジウムとのイオン化傾向の差を利用する ことによって、銅配線 25の表面に選択的にパラジウム置換めつきがなされる。これに より、例えば膜厚 10Aのパラジウム膜 26が形成される。ノ ラジウムは触媒活性が高 いので、銅配線 25の表面は触媒活性ィ匕される。なお、パラジウム置換めつきは、後 述する密着層を形成するための触媒として働く量のノ ラジウムを析出させれば足りる 。本明細書では、便宜上、ノラジウム膜 26という用語を用いているが、実際には、銅 配線 25の上面全体を覆うような膜をパラジウムが形成していなくても、触媒として働く 量のパラジウムが析出して 、ればよ 、。 [0025] Such a substitution squeeze solution is adjusted to a predetermined temperature, for example, a temperature selected within a range from room temperature to 60 ° C, and is tempered to the same temperature as the replacement squeeze solution, for example. Supplied to the surface of the wet Ueno, W. Thus, for example, as schematically shown in FIG. 3, the redox potential is small at the interface between the copper wiring 25 and the substitution solution, and the copper is redox potential. The size of the electron! The received palladium is deposited on the surface of the copper wiring 25. At this time, if a natural oxide film (copper oxide) is formed on the surface of the copper wiring 25, the natural oxide film is dissolved by the presence of the carboxyl group. That is, by using the difference in ionization tendency between copper and palladium, the surface of the copper wiring 25 is selectively plated with palladium. Thereby, for example, a palladium film 26 having a thickness of 10 A is formed. Since the catalyst activity is high, the surface of the copper wiring 25 is activated. The palladium substitution suffices to deposit an amount of noradium that acts as a catalyst for forming the adhesion layer described later. In this specification, for the sake of convenience, the term “noradium film 26” is used. However, in practice, even if palladium is not formed on a film that covers the entire upper surface of the copper wiring 25, an amount of palladium that acts as a catalyst is present. It should be deposited.
[0026] 続いて、ウェハ Wの表面に洗浄液例えば純水が供給されて、ウェハ Wの表面が洗 浄される。その後、当該ウェハ Wの表面に、密着層 (密着膜)形成用の所定の無電解 めっき液 (説明の便宜上、以下「処理液」と呼ぶこととする。)が供給される。この時、 前記工程において表面に析出されたパラジウムが触媒として作用して、銅配線 25の 表面に選択的にリン(P)を含む合金からなる例えば NiWP、 NiP、 CoP、 CoWPなど の密着層 27が形成される。密着層 27は、例えば 100〜200Aの膜厚を有する。処 理液は、密着層 27を形成する成分を含む金属塩 (合金の場合には第 1の金属塩及 び第 2の金属塩)、強アルカリ性下において金属イオンが水酸ィ匕物として沈殿しない ように金属を錯体ィ匕するための錯化剤、金属イオンを触媒的に還元析出させるため の還元剤、液の pHを調整するための pH調整剤、を含んでいる。例えば、形成しょう とする密着層 27の種類にもよるが、前記の金属塩、錯化剤、還元剤及び pH調整剤 として以下に列記する成分の中から少なくとも一種類が選択されて、溶媒例えば純水 に所定の比率で添加されて、処理液が調製され得る。  Subsequently, a cleaning liquid such as pure water is supplied to the surface of the wafer W, and the surface of the wafer W is cleaned. Thereafter, a predetermined electroless plating solution for forming an adhesion layer (adhesion film) (hereinafter referred to as “treatment solution” for convenience of explanation) is supplied to the surface of the wafer W. At this time, palladium deposited on the surface in the process acts as a catalyst, and the surface of the copper wiring 25 is made of an alloy containing phosphorus (P) selectively, for example, an adhesion layer such as NiWP, NiP, CoP, CoWP 27 Is formed. The adhesion layer 27 has a film thickness of 100 to 200 A, for example. The treatment liquid is a metal salt containing the components that form the adhesion layer 27 (first metal salt and second metal salt in the case of an alloy), and metal ions precipitate as hydroxides under strong alkalinity. It contains a complexing agent for complexing metals, a reducing agent for catalytically reducing and precipitating metal ions, and a pH adjusting agent for adjusting the pH of the liquid. For example, depending on the type of adhesion layer 27 to be formed, at least one of the components listed below as the metal salt, complexing agent, reducing agent, and pH adjusting agent is selected, and a solvent such as A treatment liquid can be prepared by adding to pure water at a predetermined ratio.
[0027] 即ち、第 1の金属塩としては、例えば、硫酸コバルト、塩ィ匕コバルト、硫酸ニッケル、 塩化ニッケル、から選択され得る。  [0027] That is, the first metal salt can be selected from, for example, cobalt sulfate, cobalt chloride, nickel sulfate, and nickel chloride.
[0028] また、第 2の金属塩としては、例えば、タングステン酸、タングステン酸ナトリウム、タ ングステン酸アンモニゥムカも選択され得る。  [0028] As the second metal salt, for example, tungstic acid, sodium tungstate, and ammonium tungstate can be selected.
[0029] また、錯化剤としては、例えば、クェン酸、クェン酸ナトリウムカゝら選択され得る。 [0030] また、還元剤としては、例えば、次亜リン酸、次亜リン酸ナトリウム、次亜リン酸アンモ ニゥム力 選択され得る。 [0029] The complexing agent may be selected from, for example, citrate and sodium citrate. [0030] The reducing agent may be selected from, for example, hypophosphorous acid, sodium hypophosphite, and ammonium hypophosphite power.
[0031] また、 pH調製剤としては、水酸化ナトリウム、 TMAH (テトラメチルアンモ -ゥムハイ ドロオキサイド)から選択され得る。 [0031] The pH adjuster may be selected from sodium hydroxide and TMAH (tetramethylammonium hydroxide).
[0032] なお、以上に列記した各成分は一例であって、必ずしもこれらの成分を用いる必要 はない。また、還元反応が進んだときの pHの変化を抑制するために、例えばホウ酸、 炭酸、ォキシカルボン酸などの安定剤が添加されてもよい。更に、めっき膜の析出の 促進または抑制、あるいは、めっき膜の改質のために、チォ硫酸や 2— MBTなどの 添加剤が添加されてもよい。更には、めっき液の表面張力を低下させてウェハ Wの 面上にめっき液が均一に配置されるようにするために、ポリアルキレングリコール、ポ リエチレングリコールなどの界面活性剤が添加されてもよい。  [0032] The components listed above are merely examples, and it is not always necessary to use these components. Further, in order to suppress a change in pH when the reduction reaction proceeds, a stabilizer such as boric acid, carbonic acid, or oxycarboxylic acid may be added. Furthermore, additives such as thiosulfuric acid and 2-MBT may be added to promote or suppress the deposition of the plating film, or to modify the plating film. Furthermore, a surfactant such as polyalkylene glycol or polyethylene glycol may be added in order to reduce the surface tension of the plating solution so that the plating solution is uniformly disposed on the surface of the wafer W. .
[0033] このような処理液は、所定の温度、例えば 60〜90°Cの範囲内で選択された温度、 に温調され、例えば当該処理液と同じ温度に温調された状態のウェハ Wの表面に供 給される。この時、ノ《ラジウム置換めつきされた銅配線 25の表面においてパラジウム が触媒として作用し、処理液中の金属イオンが析出して、例えば 100〜200Aの膜 厚の密着層 27が形成される。  [0033] Such a processing liquid is temperature-controlled at a predetermined temperature, for example, a temperature selected within a range of 60 to 90 ° C. For example, the wafer W in a state where the temperature is adjusted to the same temperature as the processing liquid. Supplied on the surface. At this time, palladium acts as a catalyst on the surface of the copper wiring 25 with the radium substitution, and the metal ions in the treatment liquid are deposited, for example, an adhesion layer 27 having a film thickness of 100 to 200 A is formed. .
[0034] その後、洗浄液例えば純水を用いてウェハ Wが洗浄され、さらにウェハ Wが乾燥さ れる。その後、前述の手法を用いて、ウエノ、 Wの表面に例えば窒化シリコン膜 28が 形成され (図 2C参照)、更にその上面に、次段の絶縁膜として例えば SiOC膜 21が 形成される(図 2D参照)。この SiOC膜 21に対しても、前述の処理が略同様に行わ れる。これにより、次段の銅配線が形成されることとなる。  Thereafter, the wafer W is cleaned using a cleaning liquid such as pure water, and the wafer W is further dried. Thereafter, using the above-described method, for example, a silicon nitride film 28 is formed on the surface of Ueno and W (see FIG. 2C), and further, for example, a SiOC film 21 is formed on the upper surface as an insulating film of the next stage (see FIG. 2). (See 2D). The above-described processing is performed on the SiOC film 21 in substantially the same manner. As a result, the next-stage copper wiring is formed.
[0035] 以上のように、本実施の形態によれば、カルボキシル基を有する有機酸の溶液に 例えば硫酸パラジウムを溶力して調整した置換めつき液を用意し、当該置換めつき液 をウェハ Wの銅配線 25の表面に供給してパラジウム置換めつきを行う。ここで、カル ボキシル基を有する有機酸は酸化力が比較的小さいので、銅配線 25がバリア材 24 ( ノリア材は銅とは異種の金属であり得る)と接している部位においても、ノ《ラジウム置 換めっき時に当該接触面 (界面)において隙間腐食が発生して銅が溶解してしまうこ とが少ない。すなわち、ノリア材 24と銅配線 25との間に空間(空間 111に相当)が形 成されることが少ない。この結果、良好な電気特性を長期に亘つて維持することがで きる銅配線 25を備えた半導体装置を製造することが可能となる。 [0035] As described above, according to the present embodiment, a replacement sticking solution prepared by dissolving, for example, palladium sulfate in a solution of an organic acid having a carboxyl group is prepared, and the replacement sticking solution is used as a wafer. Supply to the surface of the copper wiring 25 of W to perform palladium substitution. Here, since the organic acid having a carboxyl group has a relatively small oxidizing power, even in a region where the copper wiring 25 is in contact with the barrier material 24 (the noria material can be a different metal from copper) It is unlikely that crevice corrosion will occur at the contact surface (interface) during copper displacement plating and copper will be dissolved. In other words, a space (corresponding to space 111) is formed between Noria 24 and copper wiring 25. It is rarely made. As a result, it is possible to manufacture a semiconductor device including the copper wiring 25 that can maintain good electrical characteristics over a long period of time.
[0036] 更に、カルボキシル基を有する有機酸 (例えばリンゴ酸ゃマロン酸)は酸化銅を溶 解させる作用を有する。従って、例えばパラジウム置換めつきされる前のウェハ Wが 酸素を含む雰囲気に曝されて銅配線 25の上面に自然酸化膜が形成されていても、 ノ ラジウム置換めつき時において、銅配線 25を溶かすことなく自然酸ィ匕膜のみを溶 解させて除去することができる。前述のように、パラジウム置換めつきは、銅とパラジゥ ムとのイオン化傾向の差を利用して行われるため、銅配線 25の表面が酸ィ匕膜 (酸ィ匕 銅)で覆われている場合には銅とパラジウムとの間での電子の授受が抑制されてしま つて、パラジウムの析出が進まないことがある。し力しながら、本実施の形態によれば 、置換めつき液に含まれるカルボキシル基が酸化銅を除去しつつパラジウム置換反 応が進行するため、非常に酸ィ匕されやすい金属である銅の表面に良好にパラジウム を析出させることができる。換言すれば、例えば酸素を含む雰囲気に曝されないよう にしてウェハ Wに自然酸化膜が形成されることを防止するための手段や管理を簡単 化乃至省略することができる。 [0036] Further, an organic acid having a carboxyl group (for example, malate or malonic acid) has an action of dissolving copper oxide. Therefore, for example, even if the wafer W before being replaced with palladium is exposed to an oxygen-containing atmosphere and a natural oxide film is formed on the upper surface of the copper wiring 25, the copper wiring 25 is not removed at the time of replacing with nitrogen. Only the natural acid film can be dissolved and removed without melting. As described above, palladium substitution is performed by utilizing the difference in ionization tendency between copper and palladium, so that the surface of the copper wiring 25 is covered with an acid film (acid copper). In some cases, the transfer of electrons between copper and palladium is suppressed, and the deposition of palladium may not proceed. However, according to the present embodiment, the palladium substitution reaction proceeds while removing the copper oxide from the carboxyl group contained in the substitution plating solution. Palladium can be deposited well on the surface. In other words, for example, means and management for preventing the natural oxide film from being formed on the wafer W so as not to be exposed to an atmosphere containing oxygen can be simplified or omitted.
[0037] また、前述のように、 SiOC膜 21に形成された凹部 200に金属を埋め込んで配線が 形成される場合、凹部 200の表面にノ リア材 24が被覆されて力も金属が埋め込まれ る。このため、パラジウム置換めつきをするウェハ Wの表面には、互いに種類の異な る金属であり得る銅配線 25とバリア材 24とが接触した状態で存在する。一方、ノ ジ ゥム含有溶液を調製するためには、パラジウムを溶かし得る酸を選択する必要がある 。このような酸は、バリア材 24との界面にある銅を隙間腐食させ易い (本件発明者ら は、シユウ酸について、ー且はパラジウムを溶解する力 時間が経つと溶液中にパラ ジゥムが析出してしまうことを確認している)。つまり、銅配線に対してパラジウム置換 めっきを行う場合、銅のエッチング (腐食)を抑制することと、ノ ラジウムを安定して溶 解させることと、にトレードオフの関係があるのである。本件発明者は、この点に着目 して、パラジウムを溶解させる一方で銅を溶解させな ヽ有機酸の選択にっ 、て鋭意 検討し、本件発明に至ったのである。 [0037] As described above, when a wiring is formed by embedding a metal in the recess 200 formed in the SiOC film 21, the surface of the recess 200 is covered with the noble material 24 and the metal is also embedded in the force. . For this reason, the copper wiring 25 and the barrier material 24, which may be different types of metals, are present on the surface of the wafer W to be subjected to palladium substitution. On the other hand, it is necessary to select an acid that can dissolve palladium in order to prepare a nodule-containing solution. Such an acid tends to crevice the copper at the interface with the barrier material 24 (the present inventors have found that for oxalic acid, and when palladium has been dissolved for a long time, palladium precipitates in the solution. To make sure) In other words, when palladium displacement plating is applied to copper wiring, there is a trade-off between suppressing copper etching (corrosion) and stably dissolving noradium. The inventors of the present invention, paying attention to this point, have intensively studied the selection of an organic acid that does not dissolve copper while dissolving palladium, and has reached the present invention.
[0038] 以上述べてきたように、パラジウムの溶媒として酸ィ匕力の小さ 、有機酸溶液を選択 することにより、銅配線のエッチングを抑制することができる一方、ノラジウム置換め つきを安定に行うことができる。 [0038] As described above, an organic acid solution having a low acidity is selected as a palladium solvent. As a result, the etching of the copper wiring can be suppressed, while the noradium substitution plating can be performed stably.
[0039] なお、本件発明は、本件出願の時点においては、置換めつき液中に塩酸や硫酸が 含まれることを排除しない。溶液のベースが有機酸であれば、添加剤として微量の塩 酸や硫酸が含まれていてもよい。そのような置換めつき液であっても、前記実施の形 態と同様の効果を得ることができる。  [0039] It should be noted that the present invention does not exclude the inclusion of hydrochloric acid or sulfuric acid in the replacement sachet at the time of filing the present application. If the base of the solution is an organic acid, a trace amount of hydrochloric acid or sulfuric acid may be contained as an additive. Even with such a substitution solution, the same effect as in the above embodiment can be obtained.
[0040] 次に、上述の製造方法のうち、銅配線 25の表面にパラジウム置換めつきをする処 理と、無電解めつきによって密着層 27を成膜する処理と、に用いられる装置の一例 について、図 4を参照しながら説明する。但し、これによつて本発明が限定されること はない。  [0040] Next, in the above manufacturing method, an example of an apparatus used for the process of attaching palladium to the surface of the copper wiring 25 and the process of forming the adhesion layer 27 by electroless adhesion Will be described with reference to FIG. However, this does not limit the present invention.
[0041] 図 4に示すように、半導体装置であるウェハ Wの周縁部は、基板支持部をなすゥェ ハチャック 3の複数の支持舌片 30によって、裏面側力も水平に支持されている。ゥェ ハチャック 3の底板中央部は、例えば筒状の回転軸 31を介して、回転駆動部例えば 中空モータ 32に接続されている。当該中空モータ 32によって、基板チャック 3は、ゥ ェハ Wを支持した状態で鉛直軸回りに回転可能なように構成されて 、る。  As shown in FIG. 4, the back surface side force is also supported horizontally by the plurality of support tongues 30 of the wafer chuck 3 that constitutes the substrate support portion of the peripheral portion of the wafer W that is a semiconductor device. A central portion of the bottom plate of the wafer chuck 3 is connected to a rotation driving unit, for example, a hollow motor 32 via a cylindrical rotating shaft 31, for example. By the hollow motor 32, the substrate chuck 3 is configured to be rotatable about the vertical axis while supporting the wafer W.
[0042] ウェハチャック 3の複数の支持舌片 30に囲まれた内部領域には、ウェハ Wの裏面 と隙間を介して対向可能であると共に例えば当該ウェハ Wと略同じ大きさを有する温 調用プレート 33が、昇降自在に設けられている。温調用プレート 33は、その内部に 図示しない加熱手段、例えばヒータ、を備えている。また、温調用プレート 33は、垂 立する例えば管状の支持部材 34によって、その裏面側中央部を支持されている。更 に、支持部材 34の下部側は、温調用プレート 33を昇降するための図示しない昇降 部に接続されている。また、温調用プレート 33の表面中央部には、ウェハ Wを所定 の温度に調整するために当該ウェハ Wの裏面に温度調整液例えば温調された純水 を供給(吐出)するための小径の吐出口 35が形成されている。この吐出口 35は、管 状の支持部材 34の内部空間である液流通路 36、及び、当該液流通路 36に接続さ れた液供給路 37例えば配管を介して、温度調整液の供給源 38と接続されて 、る。 液供給路 37の途中には、図示しな 、流量調節部及びバルブが設けられ得る。  [0042] The inner region surrounded by the plurality of support tongues 30 of the wafer chuck 3 can be opposed to the back surface of the wafer W through a gap and has, for example, a temperature control plate having substantially the same size as the wafer W. 33 is provided to be movable up and down. The temperature adjustment plate 33 includes a heating means (not shown) such as a heater inside. Further, the temperature control plate 33 is supported at the center on the back surface side thereof by, for example, a tubular support member 34 that is suspended. In addition, the lower side of the support member 34 is connected to an elevating unit (not shown) for elevating the temperature adjustment plate 33. Further, in the center of the surface of the temperature control plate 33, a small diameter for supplying (discharging) a temperature adjusting liquid, for example, temperature-controlled pure water, to the back surface of the wafer W in order to adjust the wafer W to a predetermined temperature. A discharge port 35 is formed. The discharge port 35 includes a liquid flow path 36 which is an internal space of the tubular support member 34, and a liquid supply path 37 connected to the liquid flow path 36, for example, a supply source of the temperature adjusting liquid via a pipe. Connected with 38. In the middle of the liquid supply path 37, a flow rate adjusting unit and a valve (not shown) can be provided.
[0043] また、ウェハチャック 3に支持されるウェハ Wの側方を囲むようにして、液受け用の カップ体 4が昇降自在に設けられている。カップ体 4の底部には、ウェハ Wからこぼれ 落ちた液をドレインとして排出するためのドレイン排出口 41が設けられている。なお、 図示は省略されている力 カップ体 4の周囲を囲むようにして、装置外装体をなす筐 体が設けられており、当該筐体内には、銅が酸ィ匕するのを抑制するための不活性ガ スが満たされるようになって!/、る。 [0043] Further, the side of the wafer W supported by the wafer chuck 3 is surrounded so as to receive liquid. A cup body 4 is provided to be movable up and down. A drain discharge port 41 is provided at the bottom of the cup body 4 for discharging the liquid spilled from the wafer W as a drain. Note that a power cup body 4 that is not shown is provided around the periphery of the force cup body 4 and is provided with a housing that forms an apparatus exterior body. The active gas will be filled!
[0044] ウェハチャック 3に支持されるウェハ Wの上面側には、当該ウェハ Wの表面に対し て例えば 0. l〜2mmの範囲内の隙間を介して対向すると共に、当該ウエノ、 Wと同じ か又は当該ウェハ Wよりも大きい大きさを有する液供給プレート 5が昇降自在に設け られている。この液供給プレート 5は、内部に図示しない加熱手段例えばヒータを備 えている。また、液供給プレート 5の表面には、ウェハ Wの表面に処理液又は洗浄液 のいずれか一方を供給するための複数の吐出孔 51が面内に均一に形成されている 。液供給プレート 5には、これら吐出孔 51に処理液及び洗浄液を供給する図示しな い液貯留部が設けられている。この液貯留部には、液供給路 52例えば配管の一端 が接続されている。液供給路 52の他端側は、処理液の供給源 53及び洗浄液の供給 源 54と夫々接続されている。液供給路 52の途中には、図示されない流量調節部及 びバルブが設けられている。なお、図中 55は、処理液及び洗浄液の流路を切り替え るための切り替え部、例えば図示しない制御部により操作される三方バルブ、である [0044] The upper surface side of the wafer W supported by the wafer chuck 3 is opposed to the surface of the wafer W through a gap in the range of 0.1 to 2 mm, for example, and is the same as the Ueno and W. Alternatively, a liquid supply plate 5 having a size larger than that of the wafer W is provided to be movable up and down. The liquid supply plate 5 includes heating means (not shown) such as a heater. In addition, a plurality of discharge holes 51 for supplying either the processing liquid or the cleaning liquid to the surface of the wafer W are uniformly formed in the surface of the liquid supply plate 5. The liquid supply plate 5 is provided with a liquid storage section (not shown) for supplying the treatment liquid and the cleaning liquid to the discharge holes 51. A liquid supply path 52, for example, one end of a pipe is connected to the liquid reservoir. The other end of the liquid supply path 52 is connected to a processing liquid supply source 53 and a cleaning liquid supply source 54, respectively. In the middle of the liquid supply path 52, a flow rate adjusting unit and a valve (not shown) are provided. In the figure, reference numeral 55 denotes a switching unit for switching the flow path of the processing liquid and the cleaning liquid, for example, a three-way valve operated by a control unit (not shown).
[0045] ウェハ Wの上面側には、詳しくは前述した置換めつき液を当該ウェハ Wの表面に 供給するための、例えばウェハ Wの幅(直径)の半分以上の長さ、つまり半径以上の 長さ、に形成されたスリット状の吐出口 60を有する液供給ノズル 6が、昇降自在且つ 進退自在に設けられている。この液供給ノズル 6は、供給路 61例えば配管を介して、 置換めつき液の供給源 62と接続されている。供給路 61の途中には、図示されない流 量調整部及びバルブが設けられて ヽる。 For example, on the upper surface side of the wafer W, in order to supply the above-described replacement squeezing liquid to the surface of the wafer W, for example, the length (diameter) of the wafer W is more than half the width (diameter), that is, more than the radius A liquid supply nozzle 6 having a slit-like discharge port 60 formed in a length is provided so as to be movable up and down and back and forth. The liquid supply nozzle 6 is connected to a replacement liquid supply source 62 via a supply path 61 such as a pipe. In the middle of the supply path 61, a flow rate adjusting unit and a valve (not shown) are provided.
[0046] 更に、ウェハ Wの上面側には、当該ウェハ Wの表面に乾燥用気体、例えば温度及 び湿度が調整された窒素などの不活性ガス、を供給するための、例えばウェハ Wの 幅 (直径)の半分以上の長さ、つまり半径以上の長さ、に形成されたスリット状の吐出 口 70を有する気体供給ノズル 7が、昇降自在且つ進退自在に設けられている。この 気体供給ノズル 7は、供給路 71例えば配管を介して、乾燥用気体の供給源 72と接 続されている。供給路 71の途中には、図示されない流量調整部及びバルブが設けら れている。 [0046] Furthermore, on the upper surface side of the wafer W, for example, the width of the wafer W for supplying a drying gas, for example, an inert gas such as nitrogen whose temperature and humidity are adjusted, to the surface of the wafer W is provided. A gas supply nozzle 7 having a slit-like discharge port 70 formed to have a length of more than half of (diameter), that is, a length of radius or more, is provided so as to be movable up and down and back and forth. this The gas supply nozzle 7 is connected to a drying gas supply source 72 via a supply path 71 such as a pipe. In the middle of the supply path 71, a flow rate adjusting unit and a valve (not shown) are provided.
[0047] 前述の半導体装置の製造装置を用いてウェハ Wの表面にパラジウム層 26及び密 着層 27を形成する手順について説明する。先ず、図示されない基板搬送アームによ つて装置外部から搬入出されるウエノ、 Wと干渉しな 、ように、液供給プレート 5がその 上昇位置に設定され、カップ体 4がその下降位置に設定される。この状態において、 例えば図 1Dに記載されたようなウェハ Wが搬入される。ウェハ Wは、ウェハチャック 3 に受け渡されて、水平姿勢に保持される。  [0047] A procedure for forming the palladium layer 26 and the adhesion layer 27 on the surface of the wafer W using the semiconductor device manufacturing apparatus described above will be described. First, the liquid supply plate 5 is set to its raised position and the cup body 4 is set to its lowered position so that it does not interfere with the wafers W and W that are carried in and out of the apparatus by a substrate transfer arm (not shown). . In this state, for example, a wafer W as shown in FIG. 1D is loaded. Wafer W is transferred to wafer chuck 3 and held in a horizontal position.
[0048] その後、ウエノ、 Wを受け渡した基板搬送手段が後退する一方で、カップ体 4がその 上昇位置(図 4に記載の位置)に移動する。また、内部のヒータによって所定の温度 に加熱された温調用プレート 33力 ウェハ Wの裏面に対して例えば 0. l〜2mmの 離間距離の位置まで上昇し、その表面に形成された吐出口 35から所定の温度に調 整された温調液がウェハ Wの裏面に向かって吐出される。ウェハ Wの裏面に供給さ れた温調液は、ウェハ Wと温調用プレート 33との間の隙間を中央から外に向かって 広がって、ウェハ Wの裏面全体に行き渡る。これにより、当該ウェハ Wは、所定の温 度例えば常温から 60°Cの範囲で選択された温度に調整される。  [0048] After that, while the substrate transfer means that has transferred Ueno and W moves backward, the cup body 4 moves to its raised position (the position shown in FIG. 4). Further, the temperature adjusting plate 33 heated to a predetermined temperature by the internal heater 33 force rises to a position of a separation distance of 0.1 to 2 mm, for example, with respect to the back surface of the wafer W, and is discharged from the discharge port 35 formed on the front surface. The temperature adjustment liquid adjusted to a predetermined temperature is discharged toward the back surface of the wafer W. The temperature adjusting liquid supplied to the back surface of the wafer W spreads over the entire back surface of the wafer W by spreading the gap between the wafer W and the temperature control plate 33 from the center to the outside. As a result, the wafer W is adjusted to a predetermined temperature, for example, a temperature selected within a range from room temperature to 60 ° C.
[0049] 続いて、必要に応じて、例えばウェハ Wの表面に純水が供給される。その後、スリツ ト状の吐出口 60の投影領域が例えばウェハ Wの中心力 外縁端に跨る位置に設定 されるように、液供給ノズル 6の配置が設定される。そして、当該吐出口 60から、所定 の温度例えばウェハ Wと同じ温度に調整された置換めつき液力 所定の流量で、ゥ ェハ Wの表面に向けて吐出される。この時、中空モータ 32によって、ウェハ Wは鉛直 軸回りに少なくとも 1回転以上回転させられる。これにより、ウェハ Wの表面全体に置 換めっき液が供給される。そして、置換めつき液の表面張力によって、例えば厚み 2 mmの置換めつき液の液膜 (パドル)が形成される。その後、吐出を停止した液供給ノ ズル 6が後退する。一方、表面に置換めつき液が液盛りされた状態力 所定時間例え ば 30秒間、保持される。これにより、詳しくは前述したように、銅とパラジウムとの置換 反応が進行して、銅配線 25の上面にパラジウム層 26が形成される。 [0050] その後、例えば内部のヒータにより所定の温度に加熱された液供給プレート 5が、 前記所定の高さ位置まで下降する。そして、吐出孔 51を介して、所定の温度例えば 60〜90°Cに調整された洗浄液が、ウェハ Wに向けて供給される。これにより、置換 めっき液がウェハ Wの表面から除去される。これと同時に、温調用プレート 33の吐出 口 35から供給される温調液の温度を変えて、ウェハ Wを無電解めつきにおける所定 の温度例えば 60〜90°Cに調整する。 Subsequently, pure water is supplied to the surface of the wafer W, for example, as necessary. Thereafter, the arrangement of the liquid supply nozzle 6 is set so that the projected region of the slit-like discharge port 60 is set at a position straddling the outer edge of the central force of the wafer W, for example. Then, from the discharge port 60, the displacement squeezing liquid force adjusted to a predetermined temperature, for example, the same temperature as the wafer W, is discharged toward the surface of the wafer W at a predetermined flow rate. At this time, the wafer W is rotated by the hollow motor 32 at least once around the vertical axis. As a result, the replacement plating solution is supplied to the entire surface of the wafer W. Then, a liquid film (paddle) of the replacement plating liquid having a thickness of 2 mm, for example, is formed by the surface tension of the replacement plating liquid. Thereafter, the liquid supply nozzle 6 that stopped discharging moves backward. On the other hand, the state force with the replacement liquid on the surface is maintained for a predetermined time, for example, 30 seconds. Thereby, as described in detail above, the substitution reaction of copper and palladium proceeds, and the palladium layer 26 is formed on the upper surface of the copper wiring 25. Thereafter, for example, the liquid supply plate 5 heated to a predetermined temperature by an internal heater is lowered to the predetermined height position. Then, a cleaning liquid adjusted to a predetermined temperature, for example, 60 to 90 ° C., is supplied toward the wafer W through the discharge holes 51. Thereby, the displacement plating solution is removed from the surface of the wafer W. At the same time, the temperature of the temperature adjustment liquid supplied from the discharge port 35 of the temperature adjustment plate 33 is changed to adjust the wafer W to a predetermined temperature for electroless plating, for example, 60 to 90 ° C.
[0051] 続いて、液供給プレート 5の吐出孔 51から吐出される液力 洗浄液から処理液に切 り替えられる。これにより、ウェハ Wの表面の洗浄液が処理液に置換される。ウェハ W と液供給プレート 5との間の隙間内は、処理液の表面張力によって処理液で満たされ る。そして、表面に処理液が液盛りされた状態が、所定の時間例えば 60秒間、保持 される。これにより、詳しくは前述したように、パラジウムの触媒作用によって無電解め つき反応が進行して、銅配線 25の上面(のパラジウム層 26の上面)に密着層 27が形 成される。  Subsequently, the liquid cleaning liquid discharged from the discharge holes 51 of the liquid supply plate 5 is switched to the processing liquid. As a result, the cleaning liquid on the surface of the wafer W is replaced with the processing liquid. The gap between the wafer W and the liquid supply plate 5 is filled with the processing liquid by the surface tension of the processing liquid. Then, the state in which the processing liquid is accumulated on the surface is held for a predetermined time, for example, 60 seconds. Thereby, as described in detail above, the electroless plating reaction proceeds by the catalytic action of palladium, and the adhesion layer 27 is formed on the upper surface of the copper wiring 25 (the upper surface of the palladium layer 26).
[0052] その後、吐出孔 51から吐出される液が再び洗浄液に切り替えられて、ウェハ Wの 表面から処理液が除去される。すなわち、ウェハ Wの表面が洗浄される。続いて、ス リット状の吐出口 70の投影領域が例えばウェハ Wの中心力も外縁端に跨る位置に 設定されるように、気体供給ノズル 7の配置が設定される。そして、当該吐出口 70か ら、温度及び湿度が調整された乾燥用気体が吐出される。この時、中空モータ 32に よって、ウェハ Wが鉛直軸回りに高速回転させられる。これにより、液を振り切るスピ ン乾燥が行われる。すなわち、ウェハ Wが乾燥させられる。乾燥後のウェハ W (図 2B に相当する)は、図示されない基板搬送アームによって装置力も搬出され、次工程の 処理を行う装置へ搬送される。  Thereafter, the liquid discharged from the discharge holes 51 is switched again to the cleaning liquid, and the processing liquid is removed from the surface of the wafer W. That is, the surface of the wafer W is cleaned. Subsequently, the arrangement of the gas supply nozzle 7 is set so that the projection area of the slit-like discharge port 70 is set at a position where, for example, the central force of the wafer W also straddles the outer edge. Then, the drying gas whose temperature and humidity are adjusted is discharged from the discharge port 70. At this time, the wafer W is rotated at high speed around the vertical axis by the hollow motor 32. As a result, spin drying is performed to shake off the liquid. That is, the wafer W is dried. The dried wafer W (corresponding to FIG. 2B) is also unloaded by a substrate transfer arm (not shown) and transferred to a device for processing the next process.
[0053] 前述の半導体装置の製造装置において実施される各工程は、コンピュータ装置 80 によって制御され得る。当該制御のためにコンピュータ装置 80において実行される プログラム及び当該プログラムを含むコンピュータで読み取り可能な記録媒体も、本 件の保護対象である。  Each process performed in the semiconductor device manufacturing apparatus described above can be controlled by the computer device 80. The program executed in the computer device 80 for the control and the computer-readable recording medium including the program are also subject to protection in this case.
[0054] 本発明の効果を確認するために行われた実施例について、以下に説明する。  [0054] Examples carried out to confirm the effects of the present invention will be described below.
[0055] (実施例 1) 本実施例では、前述の置換めつき液を用いてパラジウム置換めつきが行われた。そ の後、ウェハが水洗され、さらに処理液が供給され、無電解めつきによって密着層 27 が形成された。試験条件の詳細は以下の通りである。 [Example 1] In this example, palladium substitution plating was performed using the above-mentioned substitution plating solution. Thereafter, the wafer was washed with water, and further a processing solution was supplied, and an adhesion layer 27 was formed by electroless plating. Details of the test conditions are as follows.
1.パラジウム置換めつき  1. With palladium substitution
•めっき液組成  • Plating solution composition
リンゴ酸: 20gZリットル  Malic acid: 20gZ liter
硫酸パラジウム: lgZリットル  Palladium sulfate: lgZ liter
•処理温度: 60°C  • Processing temperature: 60 ° C
•処理時間: 30秒  • Processing time: 30 seconds
2.無電解めつき  2. Electroless plating
'処理液組成:硫酸コバルト、タングステン酸、クェン酸、次亜リン酸、 TMAH •処理温度: 60°C  'Processing liquid composition: Cobalt sulfate, tungstic acid, citrate, hypophosphorous acid, TMAH • Processing temperature: 60 ° C
•処理時間: 60秒  • Processing time: 60 seconds
パラジウム置換めつきが行われた後のウェハ Wの表面の SEM撮像結果を図 5に示 す。また、密着層 27が形成された後のウェハ Wの表面の SEM撮像結果を図 6に示 す。  Figure 5 shows the SEM imaging results of the surface of the wafer W after the palladium replacement plating. Figure 6 shows the SEM imaging results of the surface of the wafer W after the adhesion layer 27 is formed.
[0056] (比較例 1)  [0056] (Comparative Example 1)
本比較例では、置換めつき液として、パラジウムの硫酸溶液が用いられた。そのこと を除けば、前記実施例 1と同様に処理が行われた。めっき液の詳細は以下の通りで ある。  In this comparative example, a sulfuric acid solution of palladium was used as the substitution tacking solution. Except for this, the processing was performed in the same manner as in Example 1. Details of the plating solution are as follows.
•めっき液組成  • Plating solution composition
硫酸: 4. 8%硫酸を適量  Sulfuric acid: 4. 8% appropriate amount of sulfuric acid
硫酸パラジウム: lgZリットル  Palladium sulfate: lgZ liter
パラジウム置換めつきが行われた後のウェハ Wの表面の SEM撮像結果を図 7に示 す。また、密着層 27が形成された後のウェハ Wの表面を SEM撮像結果を図 8に示 す。  Fig. 7 shows the SEM imaging results of the surface of wafer W after the palladium replacement plating. Figure 8 shows the SEM imaging results of the surface of the wafer W after the adhesion layer 27 is formed.
[0057] (実施例 1及び比較例 1の結果と考察)  [0057] (Results and Discussion of Example 1 and Comparative Example 1)
図 5の画像結果から明らかなように、実施例 1では、パラジウム置換めつきをした後 の銅配線 25はエッチングされておらず、ノリア材 24との界面においても空間は形成 されていない。 As is apparent from the image result of FIG. 5, in Example 1, after the palladium substitution staking, The copper wiring 25 is not etched, and no space is formed at the interface with the noria material 24.
これに対し、図 7の画像結果とから明らかなように、比較例 1では、銅配線 25の上部 側表面がエッチングされてしまって、ノリア材 24との界面において空間が形成されて いる。  On the other hand, as is apparent from the image result of FIG. 7, in Comparative Example 1, the upper surface of the copper wiring 25 is etched, and a space is formed at the interface with the noria material 24.
また、図 6及び図 8に示す結果から明らかなように、パラジウム置換めつき時に空間 が形成されてしまうと、密着層 27が形成されても当該空間が埋められずに残ってしま すなわち、実施例 1の置換めつき液 (リンゴ酸にパラジウムを溶力してなる置換めつ き液)を用いることによって、パラジウム置換めつき時において銅配線 25がエッチング されることが抑えられると共に、銅配線 25とバリア材 24との間に空間が形成されること が顕著に抑制される、ということが確認できた。  Further, as is apparent from the results shown in FIGS. 6 and 8, if a space is formed at the time of palladium substitution, the space remains unfilled even if the adhesion layer 27 is formed. By using the replacement plating solution of Example 1 (substitution solution obtained by dissolving palladium in malic acid), the copper wiring 25 can be prevented from being etched at the time of palladium replacement and copper wiring. It was confirmed that the formation of a space between 25 and the barrier material 24 was significantly suppressed.
(実施例 2) (Example 2)
本実施例では、カルボキシル基の作用を確認するために、大気雰囲気に曝されて 表面に自然酸ィ匕膜が形成されたウェハ Wに対して、実施例 1の置換めつき液が供給 された。  In this example, in order to confirm the action of the carboxyl group, the substitution squeezing solution of Example 1 was supplied to the wafer W that was exposed to the air atmosphere and formed with a natural acid film on the surface. .
その結果、処理後の銅配線 25の表面において銅のエッチングがなされな力つたこ と、及び、酸ィ匕膜は除去されていたこと、が確認できた。即ち、カルボキシル基を有す る有機酸を選択すれば、銅配線 25の表面に酸ィ匕膜があつたとしても、当該酸化膜を 除去してパラジウムを析出させることが可能であることが確認できた。  As a result, it was confirmed that the copper was not etched on the surface of the copper wiring 25 after the treatment and that the oxide film was removed. That is, if an organic acid having a carboxyl group is selected, it is confirmed that even if an acid film is formed on the surface of the copper wiring 25, the oxide film can be removed and palladium can be deposited. did it.

Claims

請求の範囲 The scope of the claims
[1] 絶縁膜をエッチングして凹部を形成する工程と、  [1] etching the insulating film to form a recess;
前記凹部に銅を埋め込んで銅配線を形成する工程と、  Forming copper wiring by embedding copper in the recess;
カルボキシル基を有する有機酸の溶液にパラジウムを溶力してなる置換めつき液を 用いて、前記凹部に埋め込まれた銅の表面をパラジウム置換めつきする工程と、 ノラジウム置換めつきされた銅の表面に、無電解めつき液を用いて密着層を形成す る工程と、  A step of attaching the surface of the copper embedded in the concave portion with palladium using a substitution adhesive solution obtained by dissolving palladium in a solution of an organic acid having a carboxyl group; Forming an adhesion layer on the surface using an electroless plating solution;
を備えたことを特徴とする半導体装置の製造方法。  A method for manufacturing a semiconductor device, comprising:
[2] 前記有機酸は、リンゴ酸又はマロン酸のうちの少なくとも一方を含んでいる  [2] The organic acid contains at least one of malic acid and malonic acid
ことを特徴とする請求項 1に記載の半導体装置の製造方法。  The method for manufacturing a semiconductor device according to claim 1, wherein:
[3] 前記銅配線と前記絶縁膜との間に、銅とは種類の異なる金属を含むノリア材を介 在させる工程 [3] A step of interposing a noria material including a metal different from copper between the copper wiring and the insulating film
を更に備えたことを特徴とする請求項 1または 2に記載の半導体装置の製造方法。  The method for manufacturing a semiconductor device according to claim 1, further comprising:
[4] 絶縁膜をエッチングして凹部を形成する工程と、 [4] etching the insulating film to form a recess;
前記凹部に銅を埋め込んで銅配線を形成する工程と、  Forming copper wiring by embedding copper in the recess;
カルボキシル基を有する有機酸の溶液にパラジウムを溶力してなる置換めつき液を 用いて、前記凹部に埋め込まれた銅の表面をパラジウム置換めつきする工程と、 ノラジウム置換めつきされた銅の表面に、無電解めつき液を用いて密着層を形成す る工程と、  A step of attaching the surface of the copper embedded in the concave portion with palladium using a substitution adhesive solution obtained by dissolving palladium in a solution of an organic acid having a carboxyl group; Forming an adhesion layer on the surface using an electroless plating solution;
を備えた半導体装置の製造方法  For manufacturing a semiconductor device comprising
を制御するプログラムを含むコンピュータで読み取り可能な記録媒体。  A computer-readable recording medium including a program for controlling the computer.
PCT/JP2005/015444 2004-08-26 2005-08-25 Method for manufacturing semiconductor device WO2006022334A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2004-246955 2004-08-26
JP2004246955A JP2006063386A (en) 2004-08-26 2004-08-26 Method for producing semiconductor device

Publications (1)

Publication Number Publication Date
WO2006022334A1 true WO2006022334A1 (en) 2006-03-02

Family

ID=35967541

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2005/015444 WO2006022334A1 (en) 2004-08-26 2005-08-25 Method for manufacturing semiconductor device

Country Status (2)

Country Link
JP (1) JP2006063386A (en)
WO (1) WO2006022334A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104066267A (en) * 2014-06-03 2014-09-24 深圳市创智成功科技有限公司 Chemical plating structure of copper base material and technique thereof
CN104112701A (en) * 2013-04-18 2014-10-22 中芯国际集成电路制造(上海)有限公司 Semiconductor structure and manufacturing method thereof
WO2015074703A1 (en) * 2013-11-21 2015-05-28 Heraeus Deutschland GmbH & Co. KG Coated wire for bonding applications

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5105137B2 (en) * 2006-04-25 2012-12-19 日立化成工業株式会社 Manufacturing method of substrate having copper foil and substrate having copper foil
JP5109399B2 (en) * 2006-09-06 2012-12-26 日立化成工業株式会社 Copper surface treatment method
JP5109400B2 (en) * 2006-09-08 2012-12-26 日立化成工業株式会社 Copper surface treatment liquid set, copper surface treatment method using the same, copper, wiring board, and semiconductor package
JP5105162B2 (en) * 2007-10-01 2012-12-19 日立化成工業株式会社 Copper surface treatment method
US8043976B2 (en) 2008-03-24 2011-10-25 Air Products And Chemicals, Inc. Adhesion to copper and copper electromigration resistance
CN102605359A (en) * 2011-01-25 2012-07-25 台湾上村股份有限公司 Chemical palladium-gold plated film structure and manufacturing method thereof, copper wire or palladium-gold plated film packaging structure jointed by palladium-copper wire and packaging process thereof
JP6169500B2 (en) * 2014-01-31 2017-07-26 東京エレクトロン株式会社 Electroless plating method, electroless plating apparatus and storage medium

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04215855A (en) * 1990-04-02 1992-08-06 Nippondenso Co Ltd Catalyst-treating liquid, catalyst-carrying method and conductor-forming method
JPH04365877A (en) * 1991-06-13 1992-12-17 Ishihara Chem Co Ltd Catalyst liquid for copper base material-selecting electroless plating
JPH0677626A (en) * 1992-08-25 1994-03-18 Nippondenso Co Ltd Formation of plated circuit
JP2001230220A (en) * 2000-02-18 2001-08-24 Sony Corp Method of manufacturing semiconductor device
JP2004200191A (en) * 2002-12-16 2004-07-15 Sony Corp Process and system for fabricating semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04215855A (en) * 1990-04-02 1992-08-06 Nippondenso Co Ltd Catalyst-treating liquid, catalyst-carrying method and conductor-forming method
JPH04365877A (en) * 1991-06-13 1992-12-17 Ishihara Chem Co Ltd Catalyst liquid for copper base material-selecting electroless plating
JPH0677626A (en) * 1992-08-25 1994-03-18 Nippondenso Co Ltd Formation of plated circuit
JP2001230220A (en) * 2000-02-18 2001-08-24 Sony Corp Method of manufacturing semiconductor device
JP2004200191A (en) * 2002-12-16 2004-07-15 Sony Corp Process and system for fabricating semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104112701A (en) * 2013-04-18 2014-10-22 中芯国际集成电路制造(上海)有限公司 Semiconductor structure and manufacturing method thereof
WO2015074703A1 (en) * 2013-11-21 2015-05-28 Heraeus Deutschland GmbH & Co. KG Coated wire for bonding applications
CN104066267A (en) * 2014-06-03 2014-09-24 深圳市创智成功科技有限公司 Chemical plating structure of copper base material and technique thereof

Also Published As

Publication number Publication date
JP2006063386A (en) 2006-03-09

Similar Documents

Publication Publication Date Title
WO2006022334A1 (en) Method for manufacturing semiconductor device
US6821902B2 (en) Electroless plating liquid and semiconductor device
US6977224B2 (en) Method of electroless introduction of interconnect structures
US7432200B2 (en) Filling narrow and high aspect ratio openings using electroless deposition
US7622382B2 (en) Filling narrow and high aspect ratio openings with electroless deposition
JP4055319B2 (en) Manufacturing method of semiconductor device
US7262504B2 (en) Multiple stage electroless deposition of a metal layer
US7476974B2 (en) Method to fabricate interconnect structures
US7190079B2 (en) Selective capping of copper wiring
US20080296768A1 (en) Copper nucleation in interconnects having ruthenium layers
US20050181226A1 (en) Method and apparatus for selectively changing thin film composition during electroless deposition in a single chamber
US7064065B2 (en) Silver under-layers for electroless cobalt alloys
JP2005048209A (en) Electroless plating method, electroless plating device, method of fabricating semiconductor device, and fabrication device therefor
JP2002367998A (en) Semiconductor device and manufacturing method therefor
US20080045013A1 (en) Iridium encased metal interconnects for integrated circuit applications
TW543091B (en) Electroless-plating solution and semiconductor device
JP2001316834A (en) Apparatus for electroless plating and method for forming conductive film
JP2005036285A (en) Pretreatment liquid for electroless plating, and electroless plating method
US11230767B2 (en) Plating method, plating apparatus and recording medium
JP2004273790A (en) Process for fabricating semiconductor device
JP2007250915A (en) Substrate treatment method and substrate treatment apparatus
JP2006120664A (en) Method for manufacturing semiconductor device
JP4076335B2 (en) Semiconductor device and manufacturing method thereof
KR100772551B1 (en) Method for forming contact in semiconductor device
JP2004204265A (en) Plating method and plating apparatus

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KM KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NG NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU LV MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

DPE1 Request for preliminary examination filed after expiration of 19th month from priority date (pct application filed from 20040101)
121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP