JP2006063386A - Method for producing semiconductor device - Google Patents

Method for producing semiconductor device Download PDF

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JP2006063386A
JP2006063386A JP2004246955A JP2004246955A JP2006063386A JP 2006063386 A JP2006063386 A JP 2006063386A JP 2004246955 A JP2004246955 A JP 2004246955A JP 2004246955 A JP2004246955 A JP 2004246955A JP 2006063386 A JP2006063386 A JP 2006063386A
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palladium
copper
wafer
copper wiring
film
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Miho Jomen
美保 定免
Kenichi Hara
謙一 原
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Priority to PCT/JP2005/015444 priority patent/WO2006022334A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1646Characteristics of the product obtained
    • C23C18/165Multilayered product
    • C23C18/1651Two or more layers only obtained by electroless plating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31Coating with metals
    • C23C18/38Coating with copper
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/54Contact plating, i.e. electroless electrochemical plating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76849Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76871Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76874Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroless plating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method where, at the time when the surface of copper wiring buried into a recessed part formed at an insulation film is subjected to palladium substitution plating, the etching in the surface of the copper wiring is suppressed, and a semiconductor device capable of maintaining satisfactory electrical properties over a long period is produced. <P>SOLUTION: Copper is buried into a recessed part 200 formed by subjecting an insulation film such as an SiOC film 21 to etching, so as to form copper wiring 25. Thereafter, using a substitution plating liquid obtained by dissolving palladium into a solution of an organic acid having a carboxy group, the surface of the copper wiring 25 buried into the recessed part 200 is subjected to palladium substitution plating. Then, an adhesive layer 27 is formed on the surface of the copper wiring 25 on which a palladium film is formed using an electroless plating liquid. In this case, by the selection of the organic acid, the etching of the copper wiring 25 at the time of the palladium substitution plating can be suppressed. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、絶縁膜に埋め込まれた銅配線を備え、その上にバリア膜が無電解めっきにより形成された半導体装置を製造する方法に関する。   The present invention relates to a method of manufacturing a semiconductor device including a copper wiring embedded in an insulating film and having a barrier film formed thereon by electroless plating.

半導体デバイス(半導体装置)の性能向上の要請から近年ではアルミニウム線に代わり銅線を用いる配線技術が実施されている。銅はアルミニウムよりも低抵抗であり、エレクトロマイグレーション耐性(EM耐性)に優れているという特性を有する一方、半導体基板内への拡散の可能性が高く、また酸化され易いといった問題点を有している。このため半導体装置内において多層構造をもって配線される銅と層間絶縁膜(以下、「絶縁膜」と略す。)との間にはバリアメタルや保護膜と呼ばれる種々のバリア材が用いられている。   In recent years, a wiring technique using a copper wire instead of an aluminum wire has been implemented because of a demand for improving the performance of a semiconductor device (semiconductor device). Copper has a lower resistance than aluminum and has excellent electromigration resistance (EM resistance), but also has a problem of high possibility of diffusion into a semiconductor substrate and is easily oxidized. Yes. For this reason, various barrier materials called barrier metals and protective films are used between copper and an interlayer insulating film (hereinafter abbreviated as “insulating film”) wired in a multilayer structure in a semiconductor device.

以上のような銅の多層配線を実現する手法の一つとして、ダマシンプロセスにおいて、配線の埋め込み用として形成された凹部を含めた絶縁膜の表面上を窒化タンタル,窒化チタンなどのバリア材(バリアメタル)で被覆し、その上に配線用の銅(Cu)を埋め込み、基板表面をCMP(Chemical Mechanical Polishing)と呼ばれる研磨プロセスにより研磨して凹部以外の銅とバリア材とを取り除くようにしている。そして凹部上方を塞ぐようにして次段の絶縁膜を形成する。   As one of the techniques for realizing the copper multilayer wiring as described above, a barrier material (barrier such as tantalum nitride or titanium nitride) is formed on the surface of the insulating film including the recess formed for embedding the wiring in the damascene process. The wiring is covered with copper (Cu) for wiring, and the substrate surface is polished by a polishing process called CMP (Chemical Mechanical Polishing) to remove copper and the barrier material other than the recesses. . Then, a next-stage insulating film is formed so as to close the upper part of the recess.

ここで、銅配線の上にそのまま次段の絶縁膜を形成すると、銅が当該絶縁膜の中に拡散するので、埋め込まれた銅の上面にバリア膜を形成する必要がある。このバリア膜は、従来から窒化シリコン,炭化シリコン,窒化炭化シリコンなどが用いられてきた。このバリア膜は、絶縁膜として、例えば炭素含有シリコン酸化膜(以下、「SiOC膜」と呼ぶ。)を用いた場合には、エッチング時のエッチングストッパの役割も持つ。   Here, if the next-stage insulating film is formed on the copper wiring as it is, copper diffuses into the insulating film, so that it is necessary to form a barrier film on the upper surface of the buried copper. Conventionally, silicon nitride, silicon carbide, silicon nitride carbide, or the like has been used for the barrier film. For example, when a carbon-containing silicon oxide film (hereinafter referred to as “SiOC film”) is used as the insulating film, this barrier film also serves as an etching stopper during etching.

しかしながら窒化シリコン,炭化シリコン,窒化炭化シリコンなどで形成されたバリア膜は銅との密着性が小さいため、銅配線に電流を流したときに、例えば図9に示すように、密着性の悪い部位ではバリア膜10が銅配線1の銅(銅原子)を物理的に保持しきれなくなり、銅原子が移動してバリア膜10との界面にボイドと呼ばれる空間11が形成される場合がある。空間11が形成されてバリア膜10と接しなくなった部位の表面部にある銅原子は益々動きやすくなるため、この空間10がさらに大きく成長して電気特性が低下し、ついには銅配線1を断線してしまう懸念がある。なお、図中12はバリア材であり、13は絶縁膜の一つであるSiOC膜である。   However, since a barrier film formed of silicon nitride, silicon carbide, silicon nitride carbide, or the like has low adhesion to copper, a portion having poor adhesion as shown in FIG. Then, the barrier film 10 cannot physically hold copper (copper atoms) of the copper wiring 1, and the copper atoms may move to form a space 11 called a void at the interface with the barrier film 10. Since the copper atoms on the surface portion of the portion where the space 11 is formed and no longer in contact with the barrier film 10 are more likely to move, the space 10 grows further and the electrical characteristics deteriorate, and finally the copper wiring 1 is disconnected. There is a concern that it will. In the figure, 12 is a barrier material, and 13 is a SiOC film which is one of insulating films.

一方、最近において銅とバリア膜10との密着性を高めるための密着層(密着膜)を無電解めっきで形成することが提案されている(例えば、特許文献1参照。)。この方法は、前処理として先ず、銅配線を形成した半導体基板の表面に塩化パラジウムの塩酸溶液を供給し、銅とパラジウムのイオン化傾向の相違を利用して銅配線の上面をパラジウムで置換することにより触媒活性層を形成する。続いて、塩酸溶液に代えて無電解めっき液を半導体基板の表面に供給し、前工程にて表面に析出させたパラジウムの触媒作用を利用して銅配線の上面にCoWP(リンを含有するコバルトタングステン),NiWP(リンを含有するニッケルタングステン)などの密着層を形成する。その後、密着層の上面にバリア膜10を形成する。つまり、この特許文献1には、銅配線形成後にめっき処理を銅の上面に対して行い、密着層を形成することが記載されており、この密着層は銅とバリア膜10との密着性を高めると共に、銅が絶縁膜中に拡散することを防止する役割を有している点で有効である。   On the other hand, recently, it has been proposed to form an adhesion layer (adhesion film) for improving the adhesion between copper and the barrier film 10 by electroless plating (see, for example, Patent Document 1). In this method, as a pretreatment, first, a hydrochloric acid solution of palladium chloride is supplied to the surface of the semiconductor substrate on which the copper wiring is formed, and the upper surface of the copper wiring is replaced with palladium by utilizing the difference in ionization tendency between copper and palladium. To form a catalytically active layer. Subsequently, an electroless plating solution is supplied to the surface of the semiconductor substrate instead of the hydrochloric acid solution, and CoWP (cobalt containing phosphorus is formed on the upper surface of the copper wiring by utilizing the catalytic action of palladium deposited on the surface in the previous step. An adhesion layer such as tungsten) or NiWP (nickel tungsten containing phosphorus) is formed. Thereafter, the barrier film 10 is formed on the upper surface of the adhesion layer. That is, this Patent Document 1 describes that after the copper wiring is formed, plating is performed on the upper surface of copper to form an adhesion layer, and this adhesion layer provides adhesion between copper and the barrier film 10. This is effective in that it has a role of preventing copper from diffusing into the insulating film.

しかしながら、塩化パラジウムの塩酸溶液を用いてパラジウム置換めっきをする場合、塩酸が強い酸化力を有するため、銅とパラジウムとの置換反応が進行する一方で、例えば図10に示すように、銅配線1の表面、特に側周面に形成されたバリア材12と接触している部位でいわゆる隙間腐食が促進されて銅を溶解してしまう場合がある。イオン化傾向から考えると銅は塩酸に溶解しない物質のようにも考えられるが、バリア材12にはタンタルなどの金属(銅に対し異種金属)が含まれているので、これにより隙間腐食が促進されると推測する。この空間11は密着層を形成しても埋められずに残り、その結果としてバリア材12と銅配線1との間に空間11が形成されてしまう場合があり、この空間11は前記したように電気特性の低下、さらには断線の原因となり得る。   However, when palladium displacement plating is performed using a hydrochloric acid solution of palladium chloride, since the hydrochloric acid has a strong oxidizing power, the substitution reaction between copper and palladium proceeds. For example, as shown in FIG. In some cases, so-called crevice corrosion is promoted at a portion in contact with the barrier material 12 formed on the surface, particularly the side peripheral surface, and copper is dissolved. From the viewpoint of ionization, copper is considered to be a substance that does not dissolve in hydrochloric acid. However, since the barrier material 12 contains a metal such as tantalum (a different metal from copper), this promotes crevice corrosion. I guess. Even if the adhesion layer is formed, the space 11 remains unfilled. As a result, the space 11 may be formed between the barrier material 12 and the copper wiring 1, and the space 11 is formed as described above. It can be a cause of deterioration of electrical characteristics and disconnection.

ここで近年においては、半導体デバイスの微細化及び高集積化が益々進行する傾向にあり、それに伴い銅配線1の線幅も例えば65nm以下、さらには45nm以下をターゲットとする動きがある。線幅が大きければ前記空間11が形成されたことにより生じる電気特性の低下は問題視されることは少なかったが、このように線幅が小さくなると同じ大きさの空間であっても線幅に対する割合が増すので、その分において電気特性の低下の度合いは大きくなる。さらには例えば数十時間程度の使用で断線してしまうものも見つかるようになり、そのためこの空間11の影響を無視することができなくなっているのが実情である。   Here, in recent years, semiconductor devices have been increasingly miniaturized and highly integrated, and accordingly, the line width of the copper wiring 1 is also targeted to be 65 nm or less, further 45 nm or less, for example. If the line width is large, the deterioration of the electrical characteristics caused by the formation of the space 11 is rarely regarded as a problem. However, when the line width is reduced in this way, even if the space has the same size, the line width is reduced. Since the ratio increases, the degree of deterioration of the electrical characteristics increases accordingly. Furthermore, for example, it has become possible to find something that breaks after being used for several tens of hours. For this reason, the effect of this space 11 cannot be ignored.

また無電解めっきの技術として、特許文献2には、半導体チップの入出力端子であるアルミニウムの表面に無電解ニッケルめっきを行う前に、パラジウム水溶液による前処理を行うことが記載され、またパラジウム水溶液としてクエン酸パラジウムなどの有機酸パラジウムを用いることが記載されているが、銅配線上の無電解めっきに関連する記載はない。   As a technique for electroless plating, Patent Document 2 describes that pretreatment with an aqueous palladium solution is performed before electroless nickel plating is performed on the surface of aluminum which is an input / output terminal of a semiconductor chip. However, there is no description relating to electroless plating on copper wiring.

特開2001−230220号公報(段落0012〜0015)JP 2001-230220 A (paragraphs 0012 to 0015) 特開平7−183327号公報(段落0020)JP 7-183327 A (paragraph 0020)

本発明はこのような事情に基づいてなされたものであり、その目的は、絶縁膜に形成された凹部に埋め込んだ銅配線の表面をパラジウム置換めっきするにあたり、銅配線の表面がエッチングされることを抑え、良好な電気特性を長期に亘り維持することのできる半導体装置を製造することのできるの半導体装置の製造方法を提供することにある。   The present invention has been made based on such circumstances, and its purpose is that the surface of the copper wiring is etched when the surface of the copper wiring embedded in the recess formed in the insulating film is plated with palladium. It is an object of the present invention to provide a method for manufacturing a semiconductor device capable of manufacturing a semiconductor device capable of suppressing the above and maintaining good electrical characteristics over a long period of time.

本発明の半導体装置の製造方法は、絶縁膜をエッチングして凹部を形成する工程と、この凹部に銅を埋め込んで銅配線を形成する工程と、カルボキシル基を有する有機酸溶液にパラジウムを溶かしてなる置換めっき液を用いて前記凹部に埋め込まれた銅の表面をパラジウム置換めっきする工程と、パラジウム置換めっきされた銅の表面に無電解めっき液を用いて密着層を形成する工程と、を含むことを特徴とする。凹部に埋め込まれた銅の表面とは、例えばダマシン構造の銅配線の表面を挙げることができる。   The method of manufacturing a semiconductor device of the present invention includes a step of etching a dielectric film to form a recess, a step of embedding copper in the recess to form a copper wiring, and dissolving palladium in an organic acid solution having a carboxyl group. And a step of performing palladium displacement plating on the copper surface embedded in the recess using a displacement plating solution and a step of forming an adhesion layer on the surface of the copper subjected to palladium displacement plating using an electroless plating solution. It is characterized by that. Examples of the copper surface embedded in the recess include the surface of a copper wiring having a damascene structure.

前記有機酸溶液は、例えばリンゴ酸又はマロン酸のうちの少なくとも一方を含んでいるようにしてもよい。また前記銅配線と前記絶縁膜との間には、銅とは互いに種類の異なる金属を含むバリア材が介在していてもよい。   The organic acid solution may contain at least one of malic acid or malonic acid, for example. In addition, a barrier material containing a metal different from copper may be interposed between the copper wiring and the insulating film.

本発明によれば、カルボキシル基を有する有機酸溶液にパラジウムを溶かしてなる置換めっき液を用いて銅配線の表面をパラジウム置換めっきする構成としたことにより、有機酸は酸化力が小さいので、置換めっき時に銅配線の表面、特にバリア材との間の界面において銅がエッチングされることが少ない。このためバリア材と銅配線との間に空間が形成されることが少なく、結果として良好な電気特性を長期に亘って維持することのできる銅配線を備えた半導体装置を製造することができる。   According to the present invention, since the surface of the copper wiring is subjected to palladium displacement plating using a displacement plating solution in which palladium is dissolved in an organic acid solution having a carboxyl group, the organic acid has a low oxidizing power. Copper is less likely to be etched at the surface of the copper wiring, particularly at the interface with the barrier material, during plating. For this reason, a space is hardly formed between the barrier material and the copper wiring, and as a result, a semiconductor device including a copper wiring capable of maintaining good electrical characteristics over a long period can be manufactured.

更に、本発明によればカルボキシル基を有する有機酸を選択したことにより、例えばパラジウム置換めっきする前の銅配線の表面に自然酸化膜が形成されていたとしても、銅は溶解させずにこの酸化膜を除去することができる。このため銅配線の上面に均一にパラジウムを析出させることができ、結果としてこのパラジウムの触媒作用を利用して密着性の高い密着層を銅配線の表面に均一に成膜することができる。このため銅が基板内に拡散することが抑えられるので、より確実に良好な電気特性を長期に亘って維持することができる。   Furthermore, according to the present invention, by selecting an organic acid having a carboxyl group, for example, even if a natural oxide film is formed on the surface of the copper wiring before the palladium substitution plating, this oxidation is performed without dissolving copper. The film can be removed. For this reason, palladium can be deposited uniformly on the upper surface of the copper wiring, and as a result, an adhesive layer having high adhesion can be uniformly formed on the surface of the copper wiring by utilizing the catalytic action of palladium. For this reason, since it is suppressed that copper diffuses in a board | substrate, a favorable electrical property can be maintained more reliably over a long period of time.

本発明の実施の形態に係る半導体装置の製造方法について図1及び図2を参照しながら説明する。図1及び図2は、半導体装置表面部の断面図を示している。先ず、半導体装置が形成される被処理基板例えば半導体ウエハ(以下、「ウエハ」と呼ぶ。)Wについて説明しておくと、例えば図1(a)に示すように、当該ウエハWの表面には、下地の絶縁膜例えばシリコン酸化膜(SiO)20の上面にエッチストッパ層としての例えば膜厚400Åの窒化シリコン膜(SiN)22が形成され、さらにその上面に例えば膜厚700Åの次段の絶縁膜例えばSiOC膜(炭素含有シリコン酸化膜)21が積層されて構成されている。 A method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. 1 and 2 are cross-sectional views of the surface portion of the semiconductor device. First, a substrate to be processed such as a semiconductor wafer (hereinafter referred to as “wafer”) W on which a semiconductor device is formed will be described. For example, as shown in FIG. A silicon nitride film (SiN) 22 having a thickness of 400 mm, for example, is formed as an etch stopper layer on the upper surface of the underlying insulating film such as a silicon oxide film (SiO 2 ) 20, and the next stage having a thickness of 700 mm, for example, is further formed on the upper surface. An insulating film such as a SiOC film (carbon-containing silicon oxide film) 21 is laminated.

ここでシリコン酸化膜20、SiOC膜21及びSiN膜22を成膜する手法の一例について説明すると、これらの膜はいずれもプラズマ成膜処理、具体的にはウエハWを真空排気された真空容器内に置いて、この真空容器内に供給された所定の成膜ガスをプラズマ化することにより成膜することができる。 Here, an example of a method for forming the silicon oxide film 20, the SiOC film 21, and the SiN film 22 will be described. All of these films are plasma film forming processes, specifically, in a vacuum vessel in which the wafer W is evacuated. Then, a film can be formed by converting the predetermined film forming gas supplied into the vacuum vessel into plasma.

このようなウエハWに対し、先ず、例えばCFガスやCガスなどをエッチングガスとしてSiOC膜21を所定のパターン状にエッチングされる。このとき下地のSiN膜22はエッチングストッパとして作用する。これにより、例えば図1(b)に示すように、SiOC膜21に配線用の銅を埋め込むための例えば線幅が64nm以下、特に45nm以下の凹部(コンタクトホール)200が形成される。 For such a wafer W, first, the SiOC film 21 is etched into a predetermined pattern using, for example, CF 4 gas or C 4 F 8 gas as an etching gas. At this time, the underlying SiN film 22 functions as an etching stopper. Thereby, for example, as shown in FIG. 1B, a recess (contact hole) 200 having a line width of 64 nm or less, particularly 45 nm or less, for embedding copper for wiring in the SiOC film 21 is formed.

続いて、例えば図1(c)に示すように、この凹部200を含めたSiOC膜21の表面上を窒化タンタル,窒化チタンなどのバリア材(バリアメタル)24で被覆する。さらに続いて、例えばスパッタリングにより凹部200内に銅を埋め込んだ後、例えば遊離砥粒を表面に供給して化学的に研磨するCMP研磨を行うことにより、例えば図1(d)に示すように、凹部200以外の銅及びバリア材24が除去されて凹部200内に銅配線25が形成される。   Subsequently, for example, as shown in FIG. 1C, the surface of the SiOC film 21 including the recess 200 is covered with a barrier material (barrier metal) 24 such as tantalum nitride or titanium nitride. Subsequently, after embedding copper in the recess 200 by, for example, sputtering, for example, by performing CMP polishing to supply free abrasive grains to the surface and chemically polish, for example, as shown in FIG. Copper other than the recess 200 and the barrier material 24 are removed, and the copper wiring 25 is formed in the recess 200.

続いて、カルボキシル基を有する有機酸例えばリンゴ酸又はマロン酸の少なくとも一方を含む有機酸溶液例えば有機酸水溶液にパラジウムを溶かしてなる置換めっき液をウエハWの表面に供給することにより、当該ウエハWの表面のうちSiOC膜21及びバリア材24には析出させないで、銅配線25の上面に選択的にパラジウムを析出させて、パラジウム膜26を形成する(パラジウム置換めっき)。ここで、パラジウム置換めっきに用いられる置換めっき液について述べておくと、例えば水などの溶媒に所定量の有機酸を添加して有機酸水溶液とし、この有機酸水溶液を例えば60℃に温調しながら例えば粉末状の硫酸パラジウムを例えば0.1g/リットルとなるように添加して溶解させて調製されたものを用いることができる。なお、有機酸の濃度が高くなると、パラジウムと反応して錯体が形成される反応が促進され、パラジウムの析出が抑止されるので、錯体形成反応が促進されない濃度例えば15〜25g/リットルに設定するのが好ましい。   Subsequently, the wafer W is supplied with a replacement plating solution obtained by dissolving palladium in an organic acid solution containing at least one of a carboxyl group-containing organic acid such as malic acid or malonic acid, such as an organic acid aqueous solution. Then, palladium is selectively deposited on the upper surface of the copper wiring 25 without being deposited on the SiOC film 21 and the barrier material 24, thereby forming a palladium film 26 (palladium displacement plating). Here, the displacement plating solution used for palladium displacement plating will be described. For example, a predetermined amount of an organic acid is added to a solvent such as water to obtain an organic acid aqueous solution, and the temperature of the organic acid aqueous solution is adjusted to 60 ° C., for example. However, it is possible to use a powder prepared by adding and dissolving powdery palladium sulfate, for example, at 0.1 g / liter. When the concentration of the organic acid is increased, the reaction that forms a complex by reacting with palladium is promoted and the precipitation of palladium is suppressed. Therefore, the concentration is set such that the complex formation reaction is not promoted, for example, 15 to 25 g / liter. Is preferred.

このような置換めっき液は、所定の温度例えば常温から60℃の範囲内で選択された温度に温調され、そして例えばこのめっき液と同じ温度に温調されたウエハWの表面に供給される。これにより、例えば図3に模式的に示すように、銅配線25と置換めっき液との界面において、銅とパラジウムとの関係でみて酸化還元電位が卑な銅が、酸化還元電位が貴なパラジウムに電子を受け渡して溶解し、電子を受け取ったパラジウムが銅配線25の表面に析出する。またこのとき銅配線25の表面に自然酸化膜(酸化銅)が形成されている場合には、カルボキシル基の存在により溶解される。即ち、銅とパラジウムとのイオン化傾向の差を利用して銅配線25の表面に選択的にパラジウム置換めっきがなされて例えば膜厚10Åのパラジウム膜26が形成され、パラジウムは触媒活性が高いので銅配線25の表面が触媒活性化されることとなる。なお、パラジウム置換は、後述する密着層を形成するための触媒として働く量を析出させればよく、本例では便宜上、パラジウム膜26という言葉を使っているが、実際には銅配線25の上面全体を覆う膜を形成しなくとも触媒として働く量が析出していればよい。   Such a replacement plating solution is temperature-controlled at a predetermined temperature, for example, a temperature selected within a range from room temperature to 60 ° C., and is supplied to the surface of the wafer W, for example, temperature-controlled to the same temperature as the plating solution. . Thus, for example, as schematically shown in FIG. 3, copper having a low redox potential in relation to copper and palladium at the interface between the copper wiring 25 and the displacement plating solution is palladium having a high redox potential. Electrons are transferred to and dissolved, and palladium receiving the electrons is deposited on the surface of the copper wiring 25. At this time, when a natural oxide film (copper oxide) is formed on the surface of the copper wiring 25, it is dissolved by the presence of a carboxyl group. That is, using the difference in ionization tendency between copper and palladium, palladium substitution plating is selectively performed on the surface of the copper wiring 25 to form, for example, a palladium film 26 having a film thickness of 10 mm. The surface of the wiring 25 is activated by the catalyst. In addition, palladium substitution should just deposit the quantity which acts as a catalyst for forming the contact | adherence layer mentioned later, In this example, although the word the palladium film | membrane 26 is used for convenience, the upper surface of the copper wiring 25 is actually used. Even if a film covering the whole is not formed, an amount acting as a catalyst may be deposited.

続いて、ウエハWの表面に洗浄液例えば純水を供給して洗浄を行った後、当該ウエハWの表面に密着層(密着膜)形成用の所定の無電解めっき液(説明の便宜上、以下「処理液」と呼ぶこととする。)を供給することにより、上記工程において表面に析出したパラジウムが触媒として作用して銅配線25の表面に選択的にリン(P)を含む合金からなる例えばNiWP,NiP,CoP,CoWPなどの例えば膜厚100〜200Åの密着層27を形成する。処理液としては、密着層27を形成する成分を含む金属塩(合金の場合には第1の金属塩及び第2の金属塩)、強アルカリ性下において金属イオンが水酸化物として沈殿しないように、金属を錯体化するための錯化剤、金属イオンを触媒的に還元析出させるための還元剤、液のpHを調整するためのpH調整剤を含んでいる。そして形成しようとする密着層27の種類にもよるが、金属塩、錯化剤、還元剤及びpH調整剤として例えば以下に列記する成分の中から少なくとも一種類を選択し、溶媒例えば純水に所定の比率で添加することにより調製する。   Subsequently, after cleaning is performed by supplying a cleaning liquid such as pure water to the surface of the wafer W, a predetermined electroless plating solution for forming an adhesion layer (adhesion film) is formed on the surface of the wafer W (for convenience of explanation, the following “ In the above process, palladium deposited on the surface acts as a catalyst to selectively form phosphorus (P) on the surface of the copper wiring 25, for example, NiWP. An adhesion layer 27 having a thickness of 100 to 200 mm, such as NiP, CoP, or CoWP, is formed. As the treatment liquid, a metal salt containing a component that forms the adhesion layer 27 (first metal salt and second metal salt in the case of an alloy), so that metal ions do not precipitate as hydroxide under strong alkalinity. A complexing agent for complexing metal, a reducing agent for catalytically reducing and precipitating metal ions, and a pH adjusting agent for adjusting the pH of the liquid. Depending on the type of adhesion layer 27 to be formed, at least one of the components listed below is selected as a metal salt, complexing agent, reducing agent and pH adjuster, and a solvent such as pure water is used. It is prepared by adding at a predetermined ratio.

即ち、第1の金属塩として例えば硫酸コバルト,塩化コバルト,硫酸ニッケル,塩化ニッケル、第2の金属塩として例えばタングステン酸,タングステン酸ナトリウム,タングステン酸アンモニウムを選択することができ、また錯化剤として例えばクエン酸,クエン酸ナトリウム,還元剤として例えば次亜リン酸,次亜リン酸ナトリウム,次亜リン酸アンモニウム,pH調製剤として水酸化ナトリウム,TMAH(テトラメチルアンモニウムハイドロオキサイド)を選択することができる。なお、列記した成分は一例であり、必ずしもこれらの成分を用いなくともよい。また還元反応が進んだときのpHの変化を抑制するため安定剤例えば、ホウ酸、炭酸、オキシカルボン酸を添加するようにしてもよい。更にめっき膜の析出の促進又は抑制、めっき膜の改質をするための添加剤例えば、チオ硫酸、2−MBTを添加してもよい。更には液の表面張力を低下させ、ウエハWの面上にメッキ液が均一に配置されるようにするための界面活性剤例えばポリアルキレングリコール、ポリエチレングリコールを添加してもよい。 That is, for example, cobalt sulfate, cobalt chloride, nickel sulfate, nickel chloride can be selected as the first metal salt, and for example, tungstic acid, sodium tungstate, and ammonium tungstate can be selected as the second metal salt. For example, citric acid, sodium citrate, reducing agent such as hypophosphorous acid, sodium hypophosphite, ammonium hypophosphite, pH adjusting agent, sodium hydroxide, TMAH (tetramethylammonium hydroxide) can be selected it can. Note that the listed components are examples, and these components are not necessarily used. Further, a stabilizer such as boric acid, carbonic acid, or oxycarboxylic acid may be added to suppress the change in pH when the reduction reaction proceeds. Furthermore, additives such as thiosulfuric acid and 2-MBT for promoting or suppressing the deposition of the plating film and modifying the plating film may be added. Furthermore, a surfactant such as polyalkylene glycol or polyethylene glycol may be added to reduce the surface tension of the solution so that the plating solution is uniformly disposed on the surface of the wafer W.

このような処理液は、所定の温度例えば60〜90℃の範囲内で選択された温度に温調され、そして例えばこの処理液と同じ温度に調整されたウエハWの表面に供給され、これによりパラジウム置換された銅配線25の表面において、パラジウムが触媒として作用し、液中の予定とする金属イオンが析出して例えば100〜200Åの膜厚の密着層27が形成される。   Such a processing liquid is adjusted to a predetermined temperature, for example, a temperature selected within a range of 60 to 90 ° C., and supplied to the surface of the wafer W adjusted to the same temperature as the processing liquid, for example. Palladium acts as a catalyst on the surface of the copper wiring 25 substituted with palladium, and a predetermined metal ion in the liquid is deposited to form an adhesion layer 27 having a thickness of, for example, 100 to 200 mm.

その後、洗浄液例えば純水を用いてウエハWを洗浄し、さらに乾燥させた後、既述の手法を用いてウエハWの表面に例えば窒化シリコン膜28が形成され(図2(c))、更にその上面に次段の絶縁膜例えばSiOC膜21が形成される(図2(d))。このSiOC膜21に対しても既述した処理が略同様にして行われ、これにより次段の銅配線が形成されることとなる。   Thereafter, the wafer W is cleaned using a cleaning liquid such as pure water and further dried, and then, for example, a silicon nitride film 28 is formed on the surface of the wafer W using the above-described method (FIG. 2C). A next-stage insulating film such as a SiOC film 21 is formed on the upper surface (FIG. 2D). The processing described above is performed on the SiOC film 21 in substantially the same manner, thereby forming the next-stage copper wiring.

上述の実施の形態によれば、カルボキシル基を有する有機酸溶液に例えば硫酸パラジウムを溶かして置換めっき液を調製し、この置換めっき液をウエハWの表面に供給してパラジウム置換を行う構成としたことにより、有機酸は酸化力が小さいので、例えば銅がバリア材24(バリア材の種類によっては異種金属)と接しても置換めっき時にその界面において隙間腐食により銅が溶解することが少ない。このためバリア材24と銅配線25との間に空間(空間11に相当)が形成されることが少ないので、結果として良好な電気特性を長期に亘って維持することのできる銅配線25を備えた半導体装置を製造することができる。   According to the above-described embodiment, for example, palladium sulfate is dissolved in an organic acid solution having a carboxyl group to prepare a replacement plating solution, and this replacement plating solution is supplied to the surface of the wafer W to perform palladium replacement. As a result, since the organic acid has a small oxidizing power, for example, even when copper contacts the barrier material 24 (a different metal depending on the type of the barrier material), the copper is less likely to dissolve due to crevice corrosion at the interface during displacement plating. For this reason, a space (corresponding to the space 11) is rarely formed between the barrier material 24 and the copper wiring 25. As a result, the copper wiring 25 capable of maintaining good electrical characteristics over a long period of time is provided. A semiconductor device can be manufactured.

更に、上述の実施の形態によれば、カルボキシル基を有する有機酸例えばリンゴ酸、マロン酸を選択したことにより、このカルボキシル基は酸化銅を溶解させる作用を有しているので、例えば置換めっきされる前のウエハWが酸素を含む雰囲気に曝されて銅配線25の上面に自然酸化膜が形成されていたとしても、置換めっき時において銅は溶かさないで酸化銅を溶解させて除去することができる。既述のように銅とパラジウムとのイオン化傾向の差を利用して置換めっきが行われるため、表面が酸化銅で覆われていると、銅とパラジウムとの間での電子の授受が抑制されてパラジウムの析出が進まないことがある。従って、本例のように置換めっき液に含まれるカルボキシル基で酸化銅を除去しつつ置換反応を進行させることにより、非常に酸化されやすい金属である銅の表面に良好にパラジウムを析出させることができる点で極めて有効である。このことを言い換えると、例えば酸素を含む雰囲気に曝されないようにしてウエハWに自然酸化膜が形成されることを防止するための手段や管理を簡単にすることができる。   Furthermore, according to the above-described embodiment, by selecting an organic acid having a carboxyl group, such as malic acid or malonic acid, this carboxyl group has an action of dissolving copper oxide. Even if the wafer W before being exposed to an atmosphere containing oxygen and a natural oxide film is formed on the upper surface of the copper wiring 25, the copper oxide may be dissolved and removed without dissolving the copper during substitution plating. it can. As described above, displacement plating is performed using the difference in ionization tendency between copper and palladium. Therefore, if the surface is covered with copper oxide, the exchange of electrons between copper and palladium is suppressed. As a result, the precipitation of palladium may not proceed. Therefore, by removing the copper oxide with the carboxyl group contained in the displacement plating solution as in this example, the substitution reaction proceeds to favorably deposit palladium on the surface of copper, which is a highly oxidizable metal. It is extremely effective in that it can be done. In other words, it is possible to simplify the means and management for preventing the natural oxide film from being formed on the wafer W without being exposed to, for example, an atmosphere containing oxygen.

即ち、既述のようにSiOC膜21に形成された凹部200に金属を埋め込んで配線を形成する場合、凹部200の表面にバリア材24を被覆してから金属を埋め込みするため、置換めっきをするウエハWの表面には配線金属とバリア材24との互いに種類の異なる異種金属が接触した状態にある。これに加えて、パラジウム含有溶液を調製するためにはパラジウムを溶かし得る酸を選択する必要があるため(本発明者らはシュウ酸を選択した場合、一旦は溶解するが時間が経つと溶液中にパラジウムが析出することを確認している。)、バリア材24との界面にある銅が隙間腐食し易い。   That is, as described above, when a wiring is formed by embedding a metal in the recess 200 formed in the SiOC film 21, the surface of the recess 200 is covered with the barrier material 24 and then the metal is embedded, so that replacement plating is performed. Different types of dissimilar metals of the wiring metal and the barrier material 24 are in contact with the surface of the wafer W. In addition to this, it is necessary to select an acid that can dissolve palladium in order to prepare a palladium-containing solution (when the present inventors select oxalic acid, it dissolves once, but after time passes, It is confirmed that palladium is deposited on the surface of the barrier material 24), and copper at the interface with the barrier material 24 is easily corroded.

つまり銅配線に対しパラジウム置換めっきを行う場合、銅のエッチングを抑制することと、パラジウムを安定して溶解させることのトレードオフの問題があることに着目し、パラジウムは溶解させるが銅を溶解させない有機酸を選択した本発明は良好な電気特性を長期に亘って維持するための手法として極めて有効である。   In other words, when performing palladium displacement plating on copper wiring, paying attention to the trade-off problem of suppressing copper etching and stably dissolving palladium, palladium dissolves but copper does not dissolve The present invention in which an organic acid is selected is extremely effective as a technique for maintaining good electrical characteristics over a long period of time.

以上述べてきたように、パラジウムの溶媒として酸化力の小さい有機酸溶液を選択することで銅配線のエッチングを抑制することができるが、置換めっき液中に塩酸,硫酸が全く含まれないようにしなくてはならないということを要件とするものではなく、あくまで溶液のベースを有機酸としていれば、添加剤として極微量の塩酸,硫酸を含んでいたとしても、本発明の効果を得ることができるので、この場合も本発明の技術的範囲に含まれる。 As described above, it is possible to suppress the etching of the copper wiring by selecting an organic acid solution having a low oxidizing power as a solvent for palladium. However, the replacement plating solution should not contain hydrochloric acid or sulfuric acid at all. If the base of the solution is an organic acid, the effect of the present invention can be obtained even if it contains trace amounts of hydrochloric acid and sulfuric acid as additives. Therefore, this case is also included in the technical scope of the present invention.

最後に、上述の製造工程のうち、銅配線の表面にパラジウム置換めっきをする処理、及び無電解めっきにより密着層27を成膜する処理に用いられる装置の一例について図4を参照しながら説明する。但し、これにより本発明は何ら限定されることはない。図中3は、半導体装置であるウエハWの周縁部を裏面側から水平に支持するための複数の支持舌片30を有する基板支持部をなすウエハチャックである。このウエハチャック3の底板中央部は、例えば筒状の回転軸31を介して回転駆動部例えば中空モータ32と接続され、この中空モータ32により基板チャック3はウエハWを支持した状態で鉛直軸回りに回転可能なように構成されている。   Finally, an example of an apparatus used for the process of performing palladium displacement plating on the surface of the copper wiring and the process of forming the adhesion layer 27 by electroless plating in the above manufacturing process will be described with reference to FIG. . However, this does not limit the present invention. In the figure, reference numeral 3 denotes a wafer chuck that forms a substrate support portion having a plurality of support tongues 30 for horizontally supporting the peripheral portion of the wafer W as a semiconductor device from the back surface side. The central portion of the bottom plate of the wafer chuck 3 is connected to a rotation drive unit, for example, a hollow motor 32 via, for example, a cylindrical rotation shaft 31. The substrate chuck 3 supports the wafer W by the hollow motor 32 and rotates around the vertical axis. It is configured to be rotatable.

前記ウエハチャック3の複数の支持舌片30に囲まれた内部領域には、ウエハWの裏面と隙間を介して対向する例えば当該ウエハWと略同じ大きさの温調用プレート33が昇降自在に設けられている。この温調プレート33は、内部に図示しない加熱手段例えばヒータを備えている。また垂立する例えば管状の支持部材34により裏面側中央部を支持されており、更にこの支持部材34の下部側は温調用プレート33を昇降するための図示しない昇降部と接続されている。また温調プレート33の表面中央部には、ウエハWの裏面に供給することにより当該ウエハWを所定の温度に調整するための温度調整液例えば温調された純水を吐出するための小径の吐出口35が形成されている。この吐出口35は、管状の支持部材34の内部空間である液流通路36及びこの液流通路36に接続された液供給路37例えば配管を介して温度調整液の供給源38と接続されており、この液供給路37の途中には図示しない流量調節部及びバルブが設けられている。   In an inner region surrounded by the plurality of support tongues 30 of the wafer chuck 3, for example, a temperature adjustment plate 33 having substantially the same size as the wafer W is provided so as to be movable up and down, facing the back surface of the wafer W through a gap. It has been. The temperature control plate 33 includes heating means (not shown) such as a heater inside. Further, the central portion of the back surface side is supported by, for example, a tubular support member 34 that is suspended, and the lower side of the support member 34 is connected to an elevator unit (not shown) for raising and lowering the temperature adjustment plate 33. A temperature adjustment liquid for adjusting the wafer W to a predetermined temperature by supplying it to the back surface of the wafer W, for example, a small diameter for discharging temperature-controlled pure water, is provided at the center of the front surface of the temperature control plate 33. A discharge port 35 is formed. The discharge port 35 is connected to a temperature adjusting liquid supply source 38 via a liquid flow path 36 which is an internal space of the tubular support member 34 and a liquid supply path 37 connected to the liquid flow path 36, for example, a pipe. In the middle of the liquid supply path 37, a flow rate adjusting unit and a valve (not shown) are provided.

またウエハチャック3に支持されたウエハWの側方を囲むようにして液受け用のカップ体4が昇降自在に設けられており、このカップ体4の底部にはウエハWからこぼれ落ちた液をドレインとして排出するためのドレイン排出口41が設けられている。なお、図示は省略するが、当該カップ体4の周囲を囲むようにして装置外装体をなす筐体が設けられており、この筐体内は銅が酸化するのを抑制するために不活性ガスが満たされるように構成されている。   A liquid receiving cup body 4 is provided so as to be able to move up and down so as to surround the side of the wafer W supported by the wafer chuck 3, and the liquid spilled from the wafer W is discharged to the bottom of the cup body 4 as a drain. A drain outlet 41 is provided for this purpose. In addition, although illustration is abbreviate | omitted, the housing | casing which makes | forms an apparatus exterior body is provided so that the circumference | surroundings of the said cup body 4 may be enclosed, and in order to suppress that copper oxidizes in this housing | casing, it fills with inert gas. It is configured as follows.

前記ウエハチャック3に支持されたウエハWの上面側には、当該ウエハWの表面と例えば0.1〜2mmの範囲内の隙間を介して対向し、このウエハWと同じか又はウエハWよりも大きい液供給プレート5が昇降自在に設けられている。この液供給プレート5は、内部に図示しない加熱手段例えばヒータを備えている。また液供給プレート5の表面には、ウエハWの表面に処理液又は洗浄液のいずれか一方を供給するための複数の吐出孔51が面内に均一に形成されている。液供給プレート5にはこれら吐出孔51に処理液及び洗浄液を供給する図示しない液貯留部が設けられており、この液貯留部には液供給路52例えば配管の一端が接続されている。液供給路52の他端側は処理液の供給源53及び洗浄液の供給源54と夫々接続され、その途中には図示しない流量調節部及びバルブが設けられている。なお、図中55は、処理液及び洗浄液の流路を切り替えるための切り替え部例えば図示しない制御部により操作される三方バルブである。   The upper surface side of the wafer W supported by the wafer chuck 3 is opposed to the surface of the wafer W with a gap within a range of, for example, 0.1 to 2 mm, and is the same as or more than the wafer W. A large liquid supply plate 5 is provided to be movable up and down. The liquid supply plate 5 includes heating means (not shown) such as a heater. A plurality of ejection holes 51 for supplying either the processing liquid or the cleaning liquid to the surface of the wafer W are uniformly formed in the surface of the liquid supply plate 5. The liquid supply plate 5 is provided with a liquid storage section (not shown) for supplying the processing liquid and the cleaning liquid to the discharge holes 51, and a liquid supply path 52, for example, one end of a pipe is connected to the liquid storage section. The other end side of the liquid supply path 52 is connected to a processing liquid supply source 53 and a cleaning liquid supply source 54, respectively, and a flow rate adjusting unit and a valve (not shown) are provided in the middle thereof. In the figure, reference numeral 55 denotes a three-way valve operated by a switching unit, for example, a control unit (not shown) for switching the flow path of the processing liquid and the cleaning liquid.

前記ウエハWの上面側には、詳しくは既述した置換めっき液を当該ウエハWの表面に供給するための例えばウエハWの幅の半分以上の長さ、つまり半径以上の長さに形成されたスリット状の吐出口60を有する液供給ノズル6が昇降自在且つ進退自在に設けられている。この液供給ノズル6は供給路61例えば配管を介して置換めっき液の供給源62と接続され、その途中には図示しない流量調整部及びバルブが設けられている。   More specifically, the upper surface side of the wafer W is formed to have a length more than half of the width of the wafer W, that is, a length longer than the radius, for supplying the above-described displacement plating solution to the surface of the wafer W. A liquid supply nozzle 6 having a slit-like discharge port 60 is provided to be movable up and down and back and forth. The liquid supply nozzle 6 is connected to a replacement plating solution supply source 62 through a supply path 61, for example, a pipe, and a flow rate adjusting unit and a valve (not shown) are provided in the middle thereof.

更に前記ウエハWの上面側には、当該ウエハWの表面に乾燥用気体例えば温度及び湿度が調整された窒素などの不活性ガスを供給するための例えばウエハWの幅の半分以上の長さ、つまり半径以上の長さに形成されたスリット状の吐出口70を有する気体供給ノズル70が昇降自在且つ進退自在に設けられている。この気体供給ノズル7は供給路71例えば配管を介して乾燥用の気体の供給源72と接続され、その途中には図示しない流量調整部及びバルブが設けられている。   Further, on the upper surface side of the wafer W, for example, a length of more than half of the width of the wafer W for supplying a drying gas, for example, an inert gas such as nitrogen whose temperature and humidity are adjusted, to the surface of the wafer W; That is, the gas supply nozzle 70 having the slit-like discharge port 70 formed with a length longer than the radius is provided so as to be movable up and down and back and forth. The gas supply nozzle 7 is connected to a gas supply source 72 for drying via a supply path 71 such as a pipe, and a flow rate adjusting unit and a valve (not shown) are provided in the middle of the gas supply nozzle 7.

上述の半導体装置の製造装置を用いて、ウエハWの表面にパラジウム層26及び密着層27を形成する手順について説明する。先ず、図示しない基板搬送アームにより装置外部から搬入出されるウエハWと干渉しないように、液供給プレート5が上昇位置に、カップ体4が下降位置に夫々設定された状態にて、例えば図1(d)記載のウエハWが搬入され、そしてウエハチャック3に受け渡されて水平姿勢に保持される。   A procedure for forming the palladium layer 26 and the adhesion layer 27 on the surface of the wafer W using the above-described semiconductor device manufacturing apparatus will be described. First, in a state where the liquid supply plate 5 is set at the raised position and the cup body 4 is set at the lowered position so as not to interfere with the wafer W carried in / out from the outside of the apparatus by a substrate transfer arm (not shown), for example, FIG. d) The described wafer W is loaded, transferred to the wafer chuck 3 and held in a horizontal position.

ウエハWを受け渡した基板搬送手段が後退する一方で、カップ体4が上昇位置(図4記載の位置)に設定され、また内部のヒータにより所定の温度に加熱された温調プレート33がウエハWの裏面に例えば0.1〜2mmの離間距離を介して接近した位置まで上昇し、その表面に形成された吐出口35から所定の温度に調整された温調液をウエハWの裏面に向かって吐出する。ウエハWの裏面に供給された温調液は、当該ウエハWと温調プレート33との間の隙間を中央から外に向かって広がってその裏面全体に温調液が行き渡り、これにより当該ウエハWは所定の温度例えば常温から60℃の範囲で選択された温度に調整される。   While the substrate transfer means that delivered the wafer W moves backward, the cup body 4 is set at the raised position (position shown in FIG. 4), and the temperature control plate 33 heated to a predetermined temperature by the internal heater is the wafer W. For example, the temperature adjustment liquid adjusted to a predetermined temperature is discharged from the discharge port 35 formed on the surface thereof toward the back surface of the wafer W. Discharge. The temperature adjusting liquid supplied to the back surface of the wafer W spreads from the center to the outside through the gap between the wafer W and the temperature adjusting plate 33, and the temperature adjusting liquid spreads over the entire back surface. Is adjusted to a predetermined temperature, for example, a temperature selected from a room temperature to 60 ° C.

続いて、例えば必要に応じてウエハWの表面に純水を供給した後、スリット状の吐出口60の投影領域が例えばウエハWの中心から外縁端に跨る位置に設定されるように液供給ノズル6を配置し、吐出口60から所定の温度例えばウエハWと同じ温度に調整された置換めっき液を所定の流量でウエハWの表面に向けて吐出しつつ、中空モータ32によりウエハWを鉛直軸回りに少なくとも1回転以上回転させる。これによりウエハWの表面全体に置換めっき液が供給され、さらに表面張力により例えば厚み2mmの置換めっき液の液膜(パドル)が形成される。吐出を停止した液供給ノズル6が後退する一方で、表面に置換めっき液を液盛りした状態を所定時間例えば30秒間保持することにより、詳しくは上述したように銅とパラジウムとの置換反応が進行して銅配線25の上面にパラジウム層26が形成される。   Subsequently, for example, after supplying pure water to the surface of the wafer W as necessary, the liquid supply nozzle is set so that the projection region of the slit-like discharge port 60 is set at, for example, a position extending from the center of the wafer W to the outer edge. 6, while the displacement plating solution adjusted to a predetermined temperature, for example, the same temperature as the wafer W is discharged from the discharge port 60 toward the surface of the wafer W at a predetermined flow rate, the wafer W is moved vertically by the hollow motor 32. Rotate around at least one turn. As a result, the replacement plating solution is supplied to the entire surface of the wafer W, and a liquid film (paddle) of the replacement plating solution having a thickness of 2 mm, for example, is formed by surface tension. While the liquid supply nozzle 6 that has stopped discharging is retracted, the substitutional plating reaction of copper and palladium proceeds as described above in detail by holding the state in which the displacement plating solution is accumulated on the surface for a predetermined time, for example, 30 seconds. Thus, the palladium layer 26 is formed on the upper surface of the copper wiring 25.

その後、例えば内部のヒータにより所定の温度に加熱された液供給プレート5が前記所定の高さ位置まで下降し、吐出孔51を介して所定の温度例えば60〜90℃に調整された洗浄液をウエハWに向けて供給することにより、置換めっき液をウエハWの表面から除去する。これと共に、温調プレート33の吐出口35からの温調液の温度を変えてウエハWを無電解めっきにおける所定の温度例えば60〜90℃とすることにより、当該ウエハWの温度を当該温度に調整する。   Thereafter, for example, the liquid supply plate 5 heated to a predetermined temperature by an internal heater is lowered to the predetermined height position, and the cleaning liquid adjusted to a predetermined temperature, for example, 60 to 90 ° C. is discharged through the discharge holes 51 to the wafer. By supplying toward W, the displacement plating solution is removed from the surface of the wafer W. At the same time, by changing the temperature of the temperature adjustment liquid from the discharge port 35 of the temperature adjustment plate 33 to set the wafer W to a predetermined temperature in electroless plating, for example, 60 to 90 ° C., the temperature of the wafer W is set to the temperature. adjust.

続いて液供給プレート5の吐出孔51から吐出する液を洗浄液から処理液に切り替えることによりウエハWの表面にある洗浄液が処理液に置換され、ウエハWと液供給プレート5との間の隙間内には表面張力により処理液が満たされる。そして表面に処理液が液盛りされた状態を所定の時間例えば60秒間保持することにより、詳しくは上述したようにパラジウムの触媒作用により無電解めっき反応が進行して銅配線25の上面に密着層27が形成される。   Subsequently, by switching the liquid discharged from the discharge hole 51 of the liquid supply plate 5 from the cleaning liquid to the processing liquid, the cleaning liquid on the surface of the wafer W is replaced with the processing liquid, and in the gap between the wafer W and the liquid supply plate 5. Is filled with the treatment liquid by surface tension. Then, by holding the state where the treatment liquid is accumulated on the surface for a predetermined time, for example, 60 seconds, the electroless plating reaction proceeds by the catalytic action of palladium as described above in detail, and the adhesion layer is formed on the upper surface of the copper wiring 25. 27 is formed.

しかる後、吐出孔51から吐出する液を再び洗浄液に切り替えてウエハWの表面から処理液を除去し、洗浄する。続いて、スリット状の吐出口70の投影領域が例えばウエハWの中心から外縁端に跨る位置に設定されるように気体供給ノズル7を配置し、吐出口70から温度及び湿度が調整された乾燥用気体を吐出しつつ、中空モータ32により基板2を鉛直軸回りに高速回転させて液を振り切るスピン乾燥を行い、ウエハWを乾燥させる。乾燥後のウエハW(このウエハWは図2(b)記載のものに相当する)は、図示しない基板搬送アームにより装置から搬出されて次工程の処理を行う装置へと搬送される。   After that, the liquid discharged from the discharge holes 51 is switched again to the cleaning liquid, and the processing liquid is removed from the surface of the wafer W and cleaned. Subsequently, the gas supply nozzle 7 is disposed so that the projection area of the slit-like discharge port 70 is set, for example, at a position extending from the center of the wafer W to the outer edge, and drying with temperature and humidity adjusted from the discharge port 70. While discharging the working gas, the hollow motor 32 rotates the substrate 2 around the vertical axis at a high speed to perform spin drying to shake off the liquid, thereby drying the wafer W. The dried wafer W (this wafer W corresponds to that shown in FIG. 2B) is unloaded from the apparatus by a substrate transfer arm (not shown) and transferred to the apparatus for performing the next process.

本発明の効果を確認するために行った実施例について以下に説明する。
(実施例1)
本例は、上述の置換めっき液を用いてパラジウム置換めっきを行った後、水洗し、さらに処理液を供給して無電解めっきにより密着層27を形成して半導体装置を得た実施例である。詳しい試験条件を以下に列記する。パラジウム置換めっきをした後、及び密着層27を形成した後のウエハWの表面をSEMで撮像した結果を図5及び図6に夫々示す。
Examples carried out to confirm the effects of the present invention will be described below.
Example 1
This example is an example in which after performing palladium displacement plating using the above displacement plating solution, washing with water, supplying a treatment solution, and forming an adhesion layer 27 by electroless plating to obtain a semiconductor device. . Detailed test conditions are listed below. The results of imaging the surface of the wafer W after the palladium displacement plating and after the formation of the adhesion layer 27 by SEM are shown in FIGS. 5 and 6, respectively.

1.パラジウム置換めっき
・めっき液組成
リンゴ酸;20g/リットル
硫酸パラジウム;1g/リットル
・処理温度;60℃
・処理時間;30秒
2.無電解めっき
・処理液組成(硫酸コバルト,タングステン酸,クエン酸,次亜リン酸,TMAH)
・処理温度;60℃
・処理時間;60秒
1. Palladium displacement plating ・ Plating solution Malic acid; 20 g / liter Palladium sulfate; 1 g / liter ・ Processing temperature: 60 ° C.
Processing time: 30 seconds Electroless plating ・ Composition of treatment solution (cobalt sulfate, tungstic acid, citric acid, hypophosphorous acid, TMAH)
・ Processing temperature: 60 ℃
・ Processing time: 60 seconds

(比較例1)
本例は、置換めっき液として、パラジウムの硫酸溶液を用いたことを除いては実施例1と同じ処理をして半導体装置を得た比較例である。めっき液の詳しい条件については以下に列記する。パラジウム置換めっきをした後、及び密着層27を形成した後のウエハWの表面の撮像結果を図7及び図8に夫々示す。
(Comparative Example 1)
This example is a comparative example in which a semiconductor device was obtained by performing the same process as in Example 1 except that a sulfuric acid solution of palladium was used as the displacement plating solution. Detailed conditions of the plating solution are listed below. The imaging results of the surface of the wafer W after the palladium substitution plating and after the formation of the adhesion layer 27 are shown in FIGS. 7 and 8, respectively.

・めっき液組成
硫酸;4.8%硫酸を適量
硫酸パラジウム;1g/リットル
・ Plating solution composition Sulfuric acid; 4.8% sulfuric acid in appropriate amount Palladium sulfate; 1 g / liter

(実施例1及び比較例1の結果と考察)
図5、図7に示す画像結果からも明らかなように、実施例1ではパラジウム置換めっきをした後の銅配線25はエッチングされておらず、バリア材24との界面に空間は形成されていないのに対し、比較例1では銅配線25の上部側表面がエッチングされてバリア材24との間に空間が形成されている。また図6及び図8に示す結果からも明らかなように、置換めっき時に空間が形成されてしまうと、密着層27を形成しても当該空間は埋められず残ってしまう。即ち、リンゴ酸にパラジウムを溶かしてなる置換めっき液を用いるようにすれば、パラジウム置換めっき時において銅配線がエッチングされることが抑えられ、バリア材24との間に空間が形成されることがないか、或いはあったとしても極めて少ないことが確認された。
(Results and discussion of Example 1 and Comparative Example 1)
As is clear from the image results shown in FIGS. 5 and 7, in Example 1, the copper wiring 25 after palladium substitution plating was not etched, and no space was formed at the interface with the barrier material 24. On the other hand, in Comparative Example 1, the upper side surface of the copper wiring 25 is etched to form a space between the barrier material 24 and the upper surface. As is apparent from the results shown in FIGS. 6 and 8, if a space is formed during displacement plating, the space remains unfilled even if the adhesion layer 27 is formed. That is, if a displacement plating solution in which palladium is dissolved in malic acid is used, the copper wiring is prevented from being etched during palladium displacement plating, and a space is formed between the barrier material 24 and the barrier material 24. It was confirmed that there was no or very little if any.

(実施例2)
本例は、カルボキシル基の作用を確認するため、大気雰囲気に曝されて表面に自然酸化膜が形成されたウエハWに実施例1の置換めっき液を供給した実施例である。その結果、処理後の銅配線25の表面においては銅のエッチングはされていないが、酸化膜は除去されていたことを確認している。即ち、カルボキシル基を有する有機酸を選択すれば、銅配線25の表面に酸化膜があったとしても、それを除去してパラジウムを析出させることができることが確認された。
(Example 2)
In this example, in order to confirm the action of the carboxyl group, the substitution plating solution of Example 1 was supplied to the wafer W that was exposed to the air atmosphere and had a natural oxide film formed on the surface. As a result, it was confirmed that the copper film was not etched on the surface of the copper wiring 25 after the treatment, but the oxide film was removed. That is, it was confirmed that if an organic acid having a carboxyl group is selected, even if there is an oxide film on the surface of the copper wiring 25, it can be removed and palladium can be deposited.

本発明の半導体装置の製造方法により処理されるウエハの様子を示す説明図である。It is explanatory drawing which shows the mode of the wafer processed with the manufacturing method of the semiconductor device of this invention. 本発明の半導体装置の製造方法により処理されるウエハの様子を示す説明図である。It is explanatory drawing which shows the mode of the wafer processed with the manufacturing method of the semiconductor device of this invention. 置換めっきされるウエハの表面の様子を示す説明図である。It is explanatory drawing which shows the mode of the surface of the wafer by which displacement plating is carried out. 上記半導体装置の製造方法に用いられる装置を示す縦断面図である。It is a longitudinal cross-sectional view which shows the apparatus used for the manufacturing method of the said semiconductor device. 本発明の効果を確認するために行った実施例を示す特性図である。It is a characteristic view which shows the Example performed in order to confirm the effect of this invention. 本発明の効果を確認するために行った実施例を示す特性図である。It is a characteristic view which shows the Example performed in order to confirm the effect of this invention. 本発明の効果を確認するために行った実施例を示す特性図である。It is a characteristic view which shows the Example performed in order to confirm the effect of this invention. 本発明の効果を確認するために行った実施例を示す特性図である。It is a characteristic view which shows the Example performed in order to confirm the effect of this invention. 銅配線とバリア材との間に空間が形成された様子を示す説明図であるIt is explanatory drawing which shows a mode that the space was formed between copper wiring and barrier material. パラジウムの塩酸溶液を用いて置換めっきした銅配線の様子を示す説明図である。It is explanatory drawing which shows the mode of the copper wiring which carried out displacement plating using the hydrochloric acid solution of palladium.

符号の説明Explanation of symbols

W ウエハ
21 SiOC膜
24 バリア材
25 銅配線
26 パラジウム膜
27 密着層
W wafer 21 SiOC film 24 Barrier material 25 Copper wiring 26 Palladium film 27 Adhesion layer

Claims (3)

絶縁膜をエッチングして凹部を形成する工程と、
この凹部に銅を埋め込んで銅配線を形成する工程と、
カルボキシル基を有する有機酸溶液にパラジウムを溶かしてなる置換めっき液を用いて前記凹部に埋め込まれた銅の表面をパラジウム置換めっきする工程と、
パラジウム置換めっきされた銅の表面に無電解めっき液を用いて密着層を形成する工程と、を含むことを特徴とする半導体装置の製造方法。
Etching the insulating film to form a recess;
Forming copper wiring by embedding copper in the recess;
A step of performing palladium displacement plating on the surface of copper embedded in the recess using a displacement plating solution obtained by dissolving palladium in an organic acid solution having a carboxyl group;
Forming an adhesion layer on the surface of the palladium-plated copper using an electroless plating solution.
前記有機酸溶液は、リンゴ酸又はマロン酸のうちの少なくとも一方を含んでいることを特徴とする請求項1記載の半導体装置の製造方法。   The method of manufacturing a semiconductor device according to claim 1, wherein the organic acid solution contains at least one of malic acid and malonic acid. 前記銅配線と前記絶縁膜との間には、銅とは互いに種類の異なる金属を含むバリア材が介在することを特徴とする請求項1又は2記載の半導体装置の製造方法。   3. The method of manufacturing a semiconductor device according to claim 1, wherein a barrier material including a metal different from copper is interposed between the copper wiring and the insulating film.
JP2004246955A 2004-08-26 2004-08-26 Method for producing semiconductor device Pending JP2006063386A (en)

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