WO2005108643A8 - Verfahren und vorrichtung zur niedertemperaturepitaxie auf einer vielzahl von halbleitersubstraten - Google Patents

Verfahren und vorrichtung zur niedertemperaturepitaxie auf einer vielzahl von halbleitersubstraten

Info

Publication number
WO2005108643A8
WO2005108643A8 PCT/EP2005/052123 EP2005052123W WO2005108643A8 WO 2005108643 A8 WO2005108643 A8 WO 2005108643A8 EP 2005052123 W EP2005052123 W EP 2005052123W WO 2005108643 A8 WO2005108643 A8 WO 2005108643A8
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
semiconductor substrates
reactor
low
temperature
Prior art date
Application number
PCT/EP2005/052123
Other languages
English (en)
French (fr)
Other versions
WO2005108643A1 (de
Inventor
Thomas Grabolla
Georg Ritter
Bernd Tillack
Original Assignee
Ihp Gmbh
Thomas Grabolla
Georg Ritter
Bernd Tillack
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ihp Gmbh, Thomas Grabolla, Georg Ritter, Bernd Tillack filed Critical Ihp Gmbh
Priority to US11/579,276 priority Critical patent/US8932405B2/en
Publication of WO2005108643A1 publication Critical patent/WO2005108643A1/de
Publication of WO2005108643A8 publication Critical patent/WO2005108643A8/de

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/54—Apparatus specially adapted for continuous coating
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/08—Reaction chambers; Selection of materials therefor

Landscapes

  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

Verfahren zur Abscheidung von Schichten auf einer Vielzahl von Halbleitersubstraten gleichzeitig, mit den Schritten Reinigung mindestens je einer Oberfläche der Substrate in einem ersten Reaktor bei einer ersten Substrattemperatur Tred, Transport der Substrate vom ersten in einen zweiten Reaktor nachfolgende Abscheidung mindestens je einer Schicht auf den Halbleitersubstraten im zweiten Reaktor bei einer zweiten Substrattemperatur Tdep, wobei die Substrate während der Reinigung und während des Transports vom ersten in den zweiten Reaktor unterbrechungsfrei in einer reduzierenden Gasatmosphäre bewegt oder gelagert werden, solange die Substrattemperatur über einer vom Substratmaterial und dem Material der mindestens einen abzuscheidenden Schicht abhängigen kritischen Temperatur Tc liegt.
PCT/EP2005/052123 2004-05-10 2005-05-10 Verfahren und vorrichtung zur niedertemperaturepitaxie auf einer vielzahl von halbleitersubstraten WO2005108643A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US11/579,276 US8932405B2 (en) 2004-05-10 2005-05-10 Apparatus for low-temperature epitaxy on a plurality semiconductor substrates

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004024207.0 2004-05-10
DE102004024207.0A DE102004024207B4 (de) 2004-05-10 2004-05-10 Verfahren und Vorrichtung zur Niedertemperaturepitaxie auf einer Vielzahl von Halbleitersubstraten

Publications (2)

Publication Number Publication Date
WO2005108643A1 WO2005108643A1 (de) 2005-11-17
WO2005108643A8 true WO2005108643A8 (de) 2006-01-05

Family

ID=34967665

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2005/052123 WO2005108643A1 (de) 2004-05-10 2005-05-10 Verfahren und vorrichtung zur niedertemperaturepitaxie auf einer vielzahl von halbleitersubstraten

Country Status (3)

Country Link
US (1) US8932405B2 (de)
DE (1) DE102004024207B4 (de)
WO (1) WO2005108643A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006058952A1 (de) * 2006-12-14 2008-06-19 Ecb Automation Gmbh Reinraum-Manipulationssystem für Halbleiterscheiben
DE102008030677B4 (de) * 2008-04-17 2016-01-14 Von Ardenne Gmbh Verfahen und Vorrichtung zur Diffusionsbehandlung von Werkstücken
US20120058630A1 (en) * 2010-09-08 2012-03-08 Veeco Instruments Inc. Linear Cluster Deposition System
KR101271248B1 (ko) * 2011-08-02 2013-06-07 주식회사 유진테크 에피택셜 공정을 위한 반도체 제조설비
KR101271246B1 (ko) * 2011-08-02 2013-06-07 주식회사 유진테크 에피택셜 공정을 위한 반도체 제조설비
KR101271247B1 (ko) * 2011-08-02 2013-06-07 주식회사 유진테크 에피택셜 공정을 위한 반도체 제조설비
KR101720620B1 (ko) * 2015-04-21 2017-03-28 주식회사 유진테크 기판처리장치 및 챔버 세정방법
KR102620219B1 (ko) * 2018-11-02 2024-01-02 삼성전자주식회사 기판 처리 방법 및 기판 처리 장치

Family Cites Families (15)

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JPS55107236A (en) * 1979-02-09 1980-08-16 Toshiba Corp Method of manufacturing semiconductor device
JP2909481B2 (ja) * 1989-07-25 1999-06-23 東京エレクトロン株式会社 縦型処理装置における被処理体の処理方法
JPH05218176A (ja) * 1992-02-07 1993-08-27 Tokyo Electron Tohoku Kk 熱処理方法及び被処理体の移載方法
US5303671A (en) * 1992-02-07 1994-04-19 Tokyo Electron Limited System for continuously washing and film-forming a semiconductor wafer
US5766360A (en) * 1992-03-27 1998-06-16 Kabushiki Kaisha Toshiba Substrate processing apparatus and substrate processing method
US5763010A (en) * 1996-05-08 1998-06-09 Applied Materials, Inc. Thermal post-deposition treatment of halogen-doped films to improve film stability and reduce halogen migration to interconnect layers
US5820366A (en) * 1996-07-10 1998-10-13 Eaton Corporation Dual vertical thermal processing furnace
JPH10199870A (ja) * 1997-01-08 1998-07-31 Sony Corp Ｃｖｄ膜の成膜方法及びホットウォール型枚葉式減圧ｃｖｄ装置
US6013134A (en) * 1998-02-18 2000-01-11 International Business Machines Corporation Advance integrated chemical vapor deposition (AICVD) for semiconductor devices
US7105434B2 (en) * 1999-10-02 2006-09-12 Uri Cohen Advanced seed layery for metallic interconnects
US6488778B1 (en) * 2000-03-16 2002-12-03 International Business Machines Corporation Apparatus and method for controlling wafer environment between thermal clean and thermal processing
DE10144431A1 (de) * 2001-07-27 2003-02-13 Ihp Gmbh Verfahren und Vorrichtung zum Herstellen dünner epitaktischer Halbleiterschichten
US7244667B2 (en) * 2001-07-27 2007-07-17 Ihp Gmbh - Innovations For High Performance Microelectronics Method and device for the production of thin epitaxial semiconductor layers
JP3660897B2 (ja) * 2001-09-03 2005-06-15 株式会社ルネサステクノロジ 半導体装置の製造方法
KR100443121B1 (ko) * 2001-11-29 2004-08-04 삼성전자주식회사 반도체 공정의 수행 방법 및 반도체 공정 장치

Also Published As

Publication number Publication date
DE102004024207A1 (de) 2005-12-15
US8932405B2 (en) 2015-01-13
WO2005108643A1 (de) 2005-11-17
US20080050929A1 (en) 2008-02-28
DE102004024207B4 (de) 2016-03-24

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