Classifications

• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
  • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
  • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
  • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
  • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
  • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
  • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
  • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
  • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
  • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
  • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
  • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
  • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
  • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
  • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
  • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2300/00—Aspects of the constitution of display devices
  • G09G2300/04—Structural and physical details of display devices
  • G09G2300/0404—Matrix technologies
  • G09G2300/0417—Special arrangements specific to the use of low carrier mobility technology
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2300/00—Aspects of the constitution of display devices
  • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
  • G09G2300/0809—Several active elements per pixel in active matrix panels
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2300/00—Aspects of the constitution of display devices
  • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
  • G09G2300/0809—Several active elements per pixel in active matrix panels
  • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
  • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2310/00—Command of the display device
  • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
  • G09G2310/0243—Details of the generation of driving signals
  • G09G2310/0254—Control of polarity reversal in general, other than for liquid crystal displays
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2320/00—Control of display operating conditions
  • G09G2320/04—Maintaining the quality of display appearance
  • G09G2320/043—Preventing or counteracting the effects of ageing

Definitions

• the invention relates to an image display screen and a method for addressing this screen.
• the invention relates to a display screen of the type based on organic electroluminescent materials with active matrix etched on amorphous silicon (Si-a).
• Thin Film Transistor in hydrogenated amorphous silicon have advantages compared to thin film transistors in polycrystalline silicon (p-Si) for the design of screens based on organic electroluminescent materials because they are more easy to manufacture and they exhibit luminance uniformity on relatively large samples.
• p-Si polycrystalline silicon
• the trigger threshold voltage of amorphous silicon transistors drifts over time during the prolonged application of a voltage between their gate and their source.
• a screen of the aforementioned type comprising addressing control means suitable for applying, during each image frame, to the current modulator of each transmitter of this screen and using at least one of the plurality of addressing circuits of this transmitter, an addressing voltage representative of a datum of image always showing the same polarization.
• the object of the invention is to provide an alternative screen which exhibits small variations in luminance over time.
• the subject of the invention is an image display screen comprising: - light emitters (4) distributed along rows of emitters and columns of emitters to form a network of emitters, - means for controlling the transmission of the transmitters of the network comprising: a) a first addressing circuit of a transmitter, associated with each transmitter of the network for controlling the current passing through, said circuit comprising: - a first modulator of current capable of supplying said transmitter, said first modulator comprising a gate electrode and two current flow electrodes, - a first storage capacity capable of imposing a potential on the gate electrode of the first current modulator, b) for each transmitter, at least a second addressing circuit of a transmitter, said first and said second addressing circuits being associated in parallel with the same transmitter, said second circuit comprising: - a second modulator current from said transmitter comprising a gate electrode and two current flow electrodes, - a second storage capacity capable of storing a potential at the gate electrode of the second current modulator; c) addressing control means being able
• the display screen includes one or more of the following characteristics: - the addressing control means are adapted to apply to said first current modulator first the addressing voltage to start an activation phase of the first addressing circuit, then the bias voltage to start a bias phase of the first addressing circuit; the addressing control means are suitable for applying to said second current modulator first the addressing voltage to start an activation phase of the second addressing circuit, then the bias voltage to start a bias phase of the second addressing circuit, the activation phase of the first addressing circuit is synchronous with the polarization phase of the second addressing circuit and the activation phase of the second addressing circuit is synchronous with the polarization phase the first addressing circuit; the control means comprise selection control means comprising: for each first addressing circuit of a transmitter, a first
• the invention also relates to a method for addressing a display screen of this type, characterized in that it comprises, for the control of each transmitter: - a phase of activation of the first addressing circuit for supply the transmitter with current, - a bias phase of the second addressing circuit to derive the trigger threshold voltage of the second modulator, - an activation phase of the second addressing circuit to supply current to the transmitter, - a bias phase of the first addressing circuit to derive the trigger threshold voltage of the first modulator, and the activation phase of the first addressing circuit is concomitant with the bias phase of the second addressing circuit and the activation phase of the second addressing circuit is concomitant with the bias phase of the first addressing circuit.
• the display method comprises one or more of the following characteristics: - one or more phases of activation of the first addressing circuit are followed by at least one phase of polarization of the first circuit addressing and one or more activation phases of the second addressing circuit are followed by at least one bias phase of the second addressing circuit; the method comprises: a step of programming the addressing of said first storage capacity by applying to said capacity an addressing voltage representative of an image datum, a step of programming polarization of said first modulator current by applying a bias voltage to said modulator, said bias voltage having a polarity opposite to the polarity of the potential stored by the first storage capacity, - a step for programming the bias of said second current modulator by applying to said modulator of said bias voltage, and - a step of programming the addressing of said second storage capacity by applying said capacity of said addressing voltage to said capacity; the polarization programming step of said first current modulator is followed by the addressing programming step of the second storage capacity and alternatively the programming step of polarization of said second current
• FIG. 1 is a schematic view showing a transmitter and control means the emission of this screen transmitter according to a first embodiment of the invention
• FIG. 2A to 2F are graphs representing the evolution over time of different voltages and currents during the addressing process performed by the device according to the invention; in particular, FIG. 2A is a graph representing the selection voltage applied to a first selection electrode; - Figure 2B is a graph showing the voltage applied to a second selection electrode; - Figure 2C is a graph showing the voltage applied to a addressing electrode;
• FIG. 1 is a schematic view showing a transmitter and control means the emission of this screen transmitter according to a first embodiment of the invention
• FIG. 2A to 2F are graphs representing the evolution over time of different voltages and currents during the addressing process performed by the device according to the invention; in particular, FIG. 2A is a graph representing the selection voltage applied to a first selection electrode; - Figure 2B is a graph showing the voltage applied to a second selection electrode; - Figure 2C is a graph showing
• FIG. 2D is a graph representing the voltage applied to the terminals of a first storage capacity and the voltage applied to the terminals of a second storage capacity
• FIG. 2E is a graph representing the drain current passing through a first current modulator and the drain current passing through a second current modulator
• - Figure 2F is a graph showing the current flowing through a transmitter
• - Figure 3 is a schematic view showing a transmitter and means for controlling the transmission of this transmitter from the screen according to a second embodiment of the invention
• - Figures 4A to 4F are graphs representing the evolution over time of different voltages and currents during the addressing process performed by the device according to the second embodiment of the invention; in particular, FIG.
• FIG. 4A is a graph representing the selection voltage applied to a selection electrode
• - Figure 4B is a graph showing the voltage applied to a first addressing electrode
• - Figure 4C is a graph showing the voltage applied to a second addressing electrode
• - Figure 4D is a graph showing the voltage across a first storage capacity and the voltage across a second storage capacity
• FIG. 4E is a graph representing the drain current passing through a first current modulator and the drain current passing through a second current modulator
• FIG. 4F is a graph representing the current passing through a transmitter.
• the display screen according to the invention is an active matrix screen comprising light emitters distributed in rows and columns to form a network of emitters.
• the display screen emitters are organic light emitting diodes known by the acronym OLED.
• FIG. 1 represents means 2 for controlling the transmission of transmitters 4 from the network according to a first embodiment of the invention.
• the control means 2 comprise a first addressing circuit 6 connected to a transmitter 4 of the network, addressing control means 8 of a column of transmitters, selection control means 10 of a line of transmitters, a control system 11 and a second addressing circuit 12 also connected to a transmitter 4.
• the first addressing circuit 6 comprises a current modulator 14, a storage capacity 16 and a selection switch 18.
• the modulator 14 and the switch 18 are thin film transistors made of hydrogenated amorphous silicon. More precisely, these are n-type transistors.
• the transistors 14 and 18 are capable of being traversed by a current flowing from their source to their drain.
• the drain of the modulator 14 is connected to the cathode of the emitter 4.
• the anode of the emitter 4 is connected to a DC voltage generator V dd capable of supplying it with power.
• the source of the modulator 14 is connected to a ground electrode or to a negative voltage.
• the gate of the modulator 1.4 is connected to the source of the switch 18 and to a terminal of the storage capacity 16.
• the other terminal of the capacity 16 is connected to a ground electrode.
• the gate of the switch 18 is connected to the selection control means 10 and its drain is connected to the addressing control means 8.
• the addressing control means 8 of a column of transmitters comprise an electrode addressing 20 by column of transmitters and an addressing control unit 22.
• the electrode 20 is connected on the one hand to the control unit 22 and, on the other hand to the drain of the switch 18 of the first circuits addressing 6 of a column of transmitters.
• the selection control means 10 comprise a first selection electrode 24 and a second selection electrode 26 for each row of transmitters as well as a selection control unit 28.
• the first selection electrode 24 is connected to the control unit 28 and to the grid of the switch 18 of the first addressing circuits 6 of a line of transmitters.
• the second electrode 26 is connected to the control unit 28 and to the grid of the switch 38 of the second addressing circuits 12 of a line of transmitters.
• the control system 11 is connected to the addressing control unit 22 and to the selection control unit 28.
• the second addressing circuit 12 comprises the same components as the first addressing circuit 6, namely a current modulator 34, a storage capacity 36 and a selection switch 38. These components are connected together in the same way as in the first addressing circuit 6 and will not be described in detail.
• the current modulator 34 of the second addressing circuit 12 is connected to the cathode of the emitter 4 at node 32.
• the drain of the switch 38 is connected to the same addressing electrode 20 as the switch 18 and its grid is connected to the second selection electrode
• the control system 11 is able to transmit digital image data and data relating to the bias voltage to the control unit 22 and a periodic selection signal to the control unit 28 at a predefined frequency.
• the addressing control unit 22 is capable of transmitting an addressing voltage V D representative of image data to all of the emitters of a column via the electrode 20.
• the control unit d addressing 22 is also capable of applying to the electrode 20 a voltage, called the bias voltage V p , from a reverse bias to the bias of the addressing voltage.
• This voltage is a predefined negative voltage of a predetermined duration.
• the bias voltage V p is between - 2 Volts and - 25 Volts.
• a reverse or negative bias voltage is called a potential difference V gs between the gate and source electrodes of the modulator which is less than 0 Volt: V gs ⁇ 0V. ⁇
• the control unit 28 is able to apply a periodic selection voltage Vsi, V S 2 to the grid of the switch 18 of the first addressing circuits 6 of a row of transmitters or to the grid of the switch 38 of the second addressing circuits 12 of the same line of transmitters to authorize the application of the addressing voltage V D or of the bias voltage V p to the gate of the modulator 14 of the first addressing circuit 6 or to the gate of the modulator 34 second addressing circuit 12.
• FIGS. 2A to 2F illustrate the method of addressing a display screen according to the first embodiment of the invention. This method includes a polarization programming step.
• the selection control unit 28 transmits to the second electrode 26, a selection voltage V s2, as illustrated in FIG. 2B.
• the selection switch 38 is released by applying this selection voltage V S2 to its gate.
• the addressing control unit 22 applies to the addressing electrode 20 a bias voltage V p of a negative polarity (V gs ⁇ 0).
• the bias voltage V p is applied to the grid of the current modulator 34 and to a terminal of the storage capacity 36.
• the drain current Id2 which passed through the modulator 34 to supply the transmitter 4 during the previous frame, now tends towards 0 during this new frame as shown by the dotted curve in FIG. 2E.
• the storage capacity 36 having previously stored a voltage V D applied during the previous frame, is biased at the bias voltage V P ⁇ as illustrated in FIG. 2D; as indicated by the dotted curve in this figure, the storage capacity 36 maintains this bias voltage at the gate of the modulator 34 during a bias phase of the second addressing circuit 12 and until the end of the next step programming the modulator 34.
• the steps B, C and D together constitute a phase of polarization of the second addressing circuit 12.
• the triggering threshold voltage of the modulator 34 having undergone a drift by the application of a voltage of addressing during the previous image frame, is again derived during the polarization phase and throughout the duration of the new frame, by applying the bias voltage V p but in a direction opposite to its previous drift.
• the bias voltage applied to the gate of the modulator 34 during the new frame makes it possible to reverse the drift of its trigger threshold voltage and to return it to its initial value, that is to say to the value that 'it had before being derived by applying an addressing voltage to its grid in the previous frame.
• the selection control unit 28 generates a selection voltage Vsi and applies it to the first electrode 24.
• the addressing control unit 22 transmits to the addressing electrode 20 an addressing voltage V Da representative of an image datum.
• the selection switch 18, at the intersection of the addressing electrode 20 and the first selection electrode 24, is released and transmits the addressing voltage V Da to the modulator 14 and to the storage capacity 16 of the first circuit as the addressing voltage Vo a is greater than the triggering threshold voltage of the modulator 14, a drain current Idi is established between the drain and the source of the modulator 14 and therefore crosses the emitter 4 as shown in Figure 2F.
• the capacitor 16 stores a potential representative of the addressing voltage V Da at the gate of the modulator 14 to maintain the luminance of the transmitter 4 during a time interval corresponding to the duration of an image frame.
• the emitter 4 emits light during step C until the end of the image frame.
• steps B, C and D it can therefore be seen that the transmitter 4 is supplied with current by the first addressing circuit 6. Steps B, C and D therefore together form an activation phase of the first circuit addressing 6.
• the selection control unit 28 transmits to the first electrode 24 a selection voltage Vsi.
• the addressing control unit 22 applies a bias voltage V p to the electrode 20.
• the selection switch 18, at the intersection of the first electrode 24 and the addressing electrode 20, is released and this time transmits the bias voltage V p to the modulator 14 and to the storage capacity 16.
• the capacity of storage discharges and stores the charges transmitted by the bias voltage during a bias phase E, F of the first addressing circuit 6, as illustrated in FIG. 2D.
• the drain current lai of the previous frame stops passing through the modulator 14.
• the threshold voltage for triggering the modulator 14 which has drifted and increased during the image frame will decrease during the new frame and in particular during from step F.
• the following image frame starts with an addressing programming step E of the modulator 34 of the second addressing circuit 12.
• the selection control unit 28 applies to the electrode 26 a selection voltage V s2 .
• the addressing control unit 22 applies in parallel to the electrode 20 an addressing voltage V Db -
• the switch 38 of the second addressing circuit 12 is released and the addressing voltage V D t > , representative d image data is applied to the grid of the modulator 34 and to the terminal of the storage capacity 36.
• a drain current l d2 is generated between the drain and the source of the modulator 34. This current has a proportional amplitude to the value of the image data to be transmitted during this image frame. This current flows through the light emitter 4 during step F until the end of the image frame. During steps E and F, it can therefore be seen that the transmitter 4 is supplied with current by the second addressing circuit 12. Steps E and F therefore together form an activation phase of the second addressing circuit 12.
• control system 11 and the control units 22 and 28 control the addressing of the selection, addressing and bias voltages so that: - an addressing voltage of positive polarity is applied to the grid of the modulator 14 of the first addressing circuit 6 to supply the transmitter 4 and consecutively, a bias voltage of negative polarity is applied to the gate of the modulator 34 of the second circuit addressing 12 to compensate for the derivation of its trigger threshold voltage; - then inversely, an addressing voltage of positive polarity is applied to the gate of the modulator 34 of the second addressing circuit 12 to supply the transmitter 4 and, consecutively, a bias voltage of negative polarity is applied to the gate of the modulator 14 of the first addressing circuit 6 to compensate for the derivation of its trigger threshold voltage.
• the transmitter 4 is supplied with current in turn by the first modulator 14 during an activation phase of the first addressing circuit, then by the second modulator 34 during a phase activation of the second addressing circuit.
• the trigger threshold voltages of the modulator 14 of the first addressing circuit and of the modulator 34 of the second addressing circuit are increased and then decreased in turn at each image frame.
• Such a device therefore advantageously makes it possible to compensate for the drift in the triggering threshold voltage of the panel modulators.
• a transmitter 4 and the control means 40 for its transmission according to a second embodiment of the invention, are shown in FIG. 3.
• control means 40 comprise first addressing circuits 6 and second addressing circuits 12, each connected to a transmitter 4 of the network, addressing control means 42 of a column of transmitters, selection control means 44 of a row of transmitters and a system 56.
• the first 6 and the second 12 addressing circuits comprise the same components, connected in the same way as the addressing circuits described in connection with FIG. 1. They are identified by the same references as in the FIG. 1 and will no longer be described below.
• the addressing control means 42 comprise an addressing control unit 46, a first addressing electrode 48 and a second addressing electrode 50 for each column of transmitters.
• the first addressing electrode 48 is connected to the control unit 46 and to the drain of the switch 18 of all of the first addressing circuits 6 of a column of transmitters.
• the second addressing electrode 50 is connected to the control unit 46 and to the drain of the switch 38 of all of the second addressing circuits 12 of a column of transmitters.
• the addressing control unit 46 is able to send an addressing voltage V D ⁇ to the first electrode 48 and concomitantly an addressing voltage V D2 to the second electrode 50.
• the control means 44 for selection comprise a selection control unit 54 and for each row of transmitters a single selection electrode 52.
• the selection electrode 52 is connected to the control unit 54, to the grid of the switch 18 of the first addressing circuits 6 and to the grid of the switch 38 of the second addressing circuits 12 of a line of transmitters.
• the control system 56 is connected to the control unit 54 as well as to the control unit 46. This control system 56 is able to transmit to the control unit 46 digital image data and data relating to the bias voltage. It is also able to transmit to the control unit 54 a periodic selection signal.
• FIGS. 4A to 4F The method for addressing a display screen according to the second embodiment of the invention is illustrated in FIGS. 4A to 4F. This method comprises a step G for programming the addressing of the capacitor 16 and for programming the simultaneous polarization of the modulator 34.
• the control unit 46 transmits an addressing voltage V Da representative of an image datum at the first electrode 48 and a bias voltage V p at the second electrode 50.
• the control unit 54 transmits a selection voltage V s on the selection electrode 52.
• the switch 18 of the first addressing circuit and l switch 38 of the second programming circuit are released so that on the one hand, the bias voltage V p is applied to the gate of the modulator 34 and to the terminal of the capacitor 36 and on the other hand, the voltage of Voa addressing is applied to the grid of the modulator 14 and to a terminal of the storage capacity 16.
• the storage capacity 36 discharges and then charges at a negative potential equal to the bias voltage V p .
• the drain current I 2 is canceled and remains zero during step H.
• the capacitor 16 charges at the potential VD 3 and a drain current I d i is established between the drain and the source of the modulator 14.
• L emitter 4 is supplied with current I d i during step H until the end of the image frame.
• the transmitter 4 is therefore supplied with current by the first addressing circuit 6; steps G and H therefore together form an activation phase of the first addressing circuit.
• Steps G and H the bias voltage is applied to the gate of the modulator 34 to compensate for the drift of its trigger threshold voltage. Steps G and H therefore also form a phase of polarization of the second addressing circuit.
• the control unit 46 transmits a bias voltage V p to the first electrode 48 and an addressing voltage V Db representative of an image datum at the second electrode 50.
• the switches 18 and 38 are simultaneously open by applying the selection voltage V s to the electrode 52.
• the bias voltage V p is transmitted to the gate of the modulator 14 and to the terminal of the capacitor 16.
• the capacitor 16 discharges and then charges negatively.
• the drain current l d1 is canceled out and remains zero during step J.
• the bias voltage V p is applied to the gate of the modulator 14. Steps I and J therefore together form a phase of polarization of the first addressing circuit 6.
• the addressing voltage V D is applied to the gate of the modulator 34 and to a terminal of the capacitor 36 This voltage, maintained at the gate of the modulator 34 by the capacitor 36, generates a drain current I d2 which supplies the transmitter 4 during step J and until the next step of programming new image data.
• the transmitter 4 is supplied with current by the second addressing circuit 12; these steps therefore together form an activation phase of the second addressing circuit.
• control system 56 and the control units 46 and 54 control the addressing of the selection, addressing and bias voltages so that: - an addressing voltage of positive polarity is applied to the gate of the modulator 14 of the first addressing circuit 6 to supply the transmitter 4 and simultaneously, a bias voltage of negative polarity is applied to the gate of the modulator 34 of the second addressing circuit 12 to compensate for the drift of its threshold voltage trigger; - then inversely, an addressing voltage of positive polarity is applied to the gate of the modulator 34 of the second addressing circuit 12 to supply the transmitter 4 and simultaneously, a bias voltage of negative polarity is applied to the gate of the modulator 14 of the first addressing circuit 6 to compensate for the drift of its trigger threshold voltage.
• the transmitter 4 is thus supplied in turn by the modulated current, by the modulator 14, then by the modulator 34.
• the first 6 and second 12 addressing circuits are alternately activated to supply current to the transmitter 4.
• the modulator 14 supplies the transmitter 4
• the modulator 34 is biased by application to its grid of a bias voltage corresponding to a high negative voltage so that the trigger threshold voltage of the modulator 34 derived during the previous phase regains its initial value.
• the modulator 34 supplies the transmitter 4
• the modulator 14 is biased by this same negative bias voltage so that its trigger threshold voltage having previously drifted in one direction, drift in an opposite direction.
• the establishment of two circuits address associated with each transmitter helps to compensate for variations in the trigger threshold of the modulators of a display screen.
• the polarization and activation phases are carried out simultaneously and have equal durations.
• the control means are also able to control the modulators 14 and 34 so that the polarization and activation phases of the first and second circuits, although carried out simultaneously, have different durations.
• the bias voltage applied to one or the other of the modulators of a transmitter varies from one image frame to another, depending on the addressing voltage applied to this modulator during the previous frame; preferably, this bias voltage is equal but of opposite sign to said addressing voltage of the previous frame.

Landscapes

• Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• Computer Hardware Design (AREA)
• General Physics & Mathematics (AREA)
• Theoretical Computer Science (AREA)
• Control Of Indicators Other Than Cathode Ray Tubes (AREA)
• Electroluminescent Light Sources (AREA)

Priority Applications (3)

Applications Claiming Priority (2)

Publications (1)

Family

ID=34814552

Family Applications (1)

Country Status (5)

Cited By (6)

Families Citing this family (5)

Citations (2)

Family Cites Families (10)

• 2004
  • 2004-12-02 KR KR1020067012112A patent/KR101205912B1/ko active IP Right Grant
  • 2004-12-02 CN CNB2004800391974A patent/CN100456346C/zh not_active Expired - Fee Related
  • 2004-12-02 EP EP04805623.8A patent/EP1700290B1/fr not_active Expired - Fee Related
  • 2004-12-02 WO PCT/FR2004/003104 patent/WO2005073948A1/fr not_active Application Discontinuation
  • 2004-12-02 JP JP2006546220A patent/JP5074769B2/ja not_active Expired - Fee Related

Patent Citations (2)

Also Published As

Similar Documents

Legal Events