WO2005059978A3 - Couche semiconductrice monocristalline a macroreseau heteroatomique - Google Patents

Couche semiconductrice monocristalline a macroreseau heteroatomique Download PDF

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Publication number
WO2005059978A3
WO2005059978A3 PCT/FR2004/050713 FR2004050713W WO2005059978A3 WO 2005059978 A3 WO2005059978 A3 WO 2005059978A3 FR 2004050713 W FR2004050713 W FR 2004050713W WO 2005059978 A3 WO2005059978 A3 WO 2005059978A3
Authority
WO
WIPO (PCT)
Prior art keywords
network
heteroaromatic
macro
semiconductor layer
crystal semiconductor
Prior art date
Application number
PCT/FR2004/050713
Other languages
English (en)
Other versions
WO2005059978A2 (fr
Inventor
Daniel Bensahel
Yves Campidelli
Olivier Kermarrec
Original Assignee
St Microelectronics Sa
St Microelectronics Crolles 2
Daniel Bensahel
Yves Campidelli
Olivier Kermarrec
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Sa, St Microelectronics Crolles 2, Daniel Bensahel, Yves Campidelli, Olivier Kermarrec filed Critical St Microelectronics Sa
Priority to US10/583,235 priority Critical patent/US7884352B2/en
Priority to EP04816566A priority patent/EP1702354A2/fr
Publication of WO2005059978A2 publication Critical patent/WO2005059978A2/fr
Publication of WO2005059978A3 publication Critical patent/WO2005059978A3/fr
Priority to US13/004,384 priority patent/US8263965B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B1/00—Optical elements characterised by the material of which they are made; Optical coatings for optical elements
    • G02B1/02—Optical elements characterised by the material of which they are made; Optical coatings for optical elements made of crystals, e.g. rock-salt, semi-conductors
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B5/00—Optical elements other than lenses
    • G02B5/18—Diffraction gratings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02513—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/29—Coated or structually defined flake, particle, cell, strand, strand portion, rod, filament, macroscopic fiber or mass thereof

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Nanotechnology (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electromagnetism (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

L'invention concerne une couche monocristalline d'un premier matériau semiconducteur (5) comportant des nanostructures monocristallines d'un second matériau semiconducteur (3), les nanostructures étant réparties selon un réseau cristallographique régulier à maille tétragonale centrée.
PCT/FR2004/050713 2003-12-16 2004-12-16 Couche semiconductrice monocristalline a macroreseau heteroatomique WO2005059978A2 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US10/583,235 US7884352B2 (en) 2003-12-16 2004-12-16 Single-crystal semiconductor layer with heteroatomic macronetwork
EP04816566A EP1702354A2 (fr) 2003-12-16 2004-12-16 Couche semiconductrice monocristalline a macroreseau heteroatomique
US13/004,384 US8263965B2 (en) 2003-12-16 2011-01-11 Single-crystal semiconductor layer with heteroatomic macro-network

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0351073 2003-12-16
FR0351073 2003-12-16

Publications (2)

Publication Number Publication Date
WO2005059978A2 WO2005059978A2 (fr) 2005-06-30
WO2005059978A3 true WO2005059978A3 (fr) 2005-08-18

Family

ID=34684868

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FR2004/050713 WO2005059978A2 (fr) 2003-12-16 2004-12-16 Couche semiconductrice monocristalline a macroreseau heteroatomique

Country Status (3)

Country Link
US (2) US7884352B2 (fr)
EP (1) EP1702354A2 (fr)
WO (1) WO2005059978A2 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8446779B2 (en) * 2009-08-21 2013-05-21 Globalfoundries Singapore Pte. Ltd. Non-volatile memory using pyramidal nanocrystals as electron storage elements

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10019712A1 (de) * 2000-04-20 2001-10-25 Max Planck Gesellschaft Verfahren zur Herstellung von periodischen Materialstrukturen
WO2001080311A1 (fr) * 2000-04-17 2001-10-25 Virginia Commonwealth University Reduction des defauts du gan et de matieres associees
FR2812763A1 (fr) * 2000-08-04 2002-02-08 St Microelectronics Sa Formation de boites quantiques
US20030073258A1 (en) * 1998-12-25 2003-04-17 Fujitsu Limited Semiconductor device and method of manufacturing the same

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6037614A (en) * 1997-03-07 2000-03-14 California Institute Of Technology Methods for manufacturing group IV element alloy semiconductor materials and devices that include such materials
JP3854731B2 (ja) * 1998-03-30 2006-12-06 シャープ株式会社 微細構造の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030073258A1 (en) * 1998-12-25 2003-04-17 Fujitsu Limited Semiconductor device and method of manufacturing the same
WO2001080311A1 (fr) * 2000-04-17 2001-10-25 Virginia Commonwealth University Reduction des defauts du gan et de matieres associees
DE10019712A1 (de) * 2000-04-20 2001-10-25 Max Planck Gesellschaft Verfahren zur Herstellung von periodischen Materialstrukturen
FR2812763A1 (fr) * 2000-08-04 2002-02-08 St Microelectronics Sa Formation de boites quantiques

Also Published As

Publication number Publication date
EP1702354A2 (fr) 2006-09-20
US7884352B2 (en) 2011-02-08
US8263965B2 (en) 2012-09-11
WO2005059978A2 (fr) 2005-06-30
US20070248818A1 (en) 2007-10-25
US20110108801A1 (en) 2011-05-12

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