WO2005029933A1 - Carte de circuits imprimes multicouches et procede de fabrication - Google Patents

Carte de circuits imprimes multicouches et procede de fabrication Download PDF

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Publication number
WO2005029933A1
WO2005029933A1 PCT/JP2003/011937 JP0311937W WO2005029933A1 WO 2005029933 A1 WO2005029933 A1 WO 2005029933A1 JP 0311937 W JP0311937 W JP 0311937W WO 2005029933 A1 WO2005029933 A1 WO 2005029933A1
Authority
WO
WIPO (PCT)
Prior art keywords
wiring board
printed wiring
multilayer printed
positioning
layer
Prior art date
Application number
PCT/JP2003/011937
Other languages
English (en)
Japanese (ja)
Inventor
Tetsuo Motomiya
Toru Tateishi
Original Assignee
Mitsubishi Denki Kabushiki Kaisha
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Denki Kabushiki Kaisha filed Critical Mitsubishi Denki Kabushiki Kaisha
Priority to PCT/JP2003/011937 priority Critical patent/WO2005029933A1/fr
Priority to TW092128979A priority patent/TW200513158A/zh
Publication of WO2005029933A1 publication Critical patent/WO2005029933A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4679—Aligning added circuit layers or via connections relative to previous circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern

Definitions

  • the present invention relates to a printed wiring board and a method of manufacturing the same, and more particularly, to a multilayer printed wiring board that can be easily densified / reduced and reduced in cost, and a method of manufacturing the same. . Background art
  • the lamination process of a multilayer printed wiring board consists of a lamination (lay-up) process of an insulating material and a forming press process, and a mass lamination method and a pin lamination method are well known as lamination molding. ing.
  • the mass lamination method is suitable for the production of low-cost printed wiring boards, since large-sized fixed-size ones can be laminated and formed, so that a large number of printed wiring boards can be obtained.
  • it is usually difficult to align the inner layer pattern and the outer layer pattern, and there is a problem that it is becoming difficult to mass-produce a multilayer printed wiring board with high alignment accuracy between the layers.
  • it requires high lamination accuracy and is difficult to apply to the production of multilayer printed wiring boards with small diameter vias, inner via holes (IVH) or fine patterns. Therefore, the mass laminating method is usually used during molding. It is used when it is not necessary to align the layers, and when alignment between the layers is necessary, it is used in the manufacture of multilayer printed wiring boards with four or less layers.
  • a mass lamination method and a pin lamination method are used in combination.
  • a lamination method There is a lamination method.
  • the pin lamination method a core material formed by a mass lamination method having four or less layers is used.
  • the pin lamination method enables multilayering with high lamination accuracy, but has the problem of increasing the number of manufacturing steps and increasing the cost of multilayer printed wiring boards. This is because the manufacturing and material costs are higher than in the case of the mass laminating method, and the reference pins are removed after heating, pressing and forming, and the resin adhering around the reference pins is removed. This is because workability deteriorates and productivity improvement is limited.
  • the present invention has been made in order to solve the above problems, and has as its object to facilitate high-density multilayer printed wiring boards, and to easily reduce the size and cost. Disclosure of the invention
  • the multilayer printed wiring board according to the present invention has six or more wiring layers aligned with each other, and is laminated and formed only by a mass luminescence method.
  • a double-sided copper-clad laminate having a structure in which copper foil is adhered to the front and back surfaces of the insulating substrate is included as a core material for mass lamination.
  • multilayer printed wiring boards with high lamination accuracy between wiring layers can be mass-produced at low cost, and electronic devices, particularly mobile devices such as mobile phones, can be made smaller, thinner, and lower in cost. This has the effect of greatly progressing.
  • the multilayer printed wiring board As a hole for connecting each wiring layer, a build-up via for connecting to the outermost wiring layer, a through hole for penetrating the wiring board and connecting each wiring layer are provided. Only holes are formed. Further, the multilayer printed wiring board is used as a core material of mass lamination and is laminated and formed by mass lamination to form a multilayer. This has the effect of further increasing the density or miniaturization of the multilayer printed wiring board.
  • the multilayer printed wiring board according to the present invention has, as a core material, an inner layer board provided with a positioning pattern used for positioning between wiring layers on a surface, and has a structure formed by lamination molding only by a mass lamination method. I have.
  • the inner plate is formed of a double-sided copper-clad laminated plate having a structure in which a copper foil is adhered to the front and back surfaces of the insulating substrate.
  • the wiring layers, vias or through holes of the wiring board are minutely formed. Even if the thickness is reduced, the positioning between the wiring layers can be performed with high accuracy, and an effect that a high-density multilayer printed wiring board can be manufactured at low cost is produced.
  • the prepreg used for the insulating substrate or the mass lamination is a glass epoxy resin or a glass epoxy resin containing a glass cloth made of S glass fiber or E glass fiber.
  • It is composed of a BT resin that includes a glass-like glass.
  • the insulating substrate or the inner layer plate is strengthened, and in lamination molding using the mass lamination method, distortion due to heating and pressure or plastic deformation of the substrate that has expanded and contracted unevenly is significantly reduced. For this reason, in the alignment between the wiring layers in the process of forming the wiring layer, the area where the alignment shift occurs on the large-sized substrate is reduced, and the production yield of the multilayer printed wiring board of the present invention is reduced. The improvement is greatly improved. In addition, it is possible to further reduce the thickness of the inner layer board, and it is possible to obtain the effect of increasing the density and reducing the size of the multilayer printed wiring board.
  • the positioning pattern is formed by etching a copper foil, and a plurality of types of positioning patterns corresponding to alignment between wiring layers are arranged on the insulating substrate surface. .
  • the above-mentioned deformation of the wiring board becomes larger as the multilayer printed wiring board becomes more multilayered. Therefore, in the positioning between the wiring layers, the effect of the deformation is reduced by sequentially using the positioning patterns arranged inside the insulating substrate in accordance with the multilayering. Then, the production yield of the multilayer printed wiring board of the present invention is improved.
  • the method of manufacturing a multilayer printed wiring board according to the present invention is a method of manufacturing a multilayer printed wiring board that is formed by lamination only using a mass lamination method, and in which copper foil is adhered to the front and back surfaces of an insulating substrate.
  • Above structure of double-sided copper-clad laminate A process of forming a desired wiring pattern and a positioning pattern by etching a copper foil to form an inner layer plate, and sequentially laminating and forming a prepreg and an outer layer copper foil by mass lamination using the above inner layer plate as a core material. And multi-layering.
  • the method for manufacturing a multilayer printed wiring board according to the present invention includes:
  • a reference hole is formed in the copper foil for the outer layer or a part of the pre-preder below it based on the above positioning pattern. Then, using the reference holes for positioning between the wiring layers, the outer layer copper foil is etched to form a wiring pattern.
  • the positioning pattern is detected by X-rays, and a through-hole for connecting the wiring layers is formed based on the positioning pattern. Also, the through-hole is used for positioning between wiring layers, and the outer layer copper foil is etched to form a wiring pattern.
  • FIG. 1 is a cross-sectional view of a multilayer printed wiring board according to Embodiment 1 of the present invention in the order of manufacturing steps.
  • FIG. 2 is a cross-sectional view of a multilayer printed wiring board in the order of the manufacturing process following the above manufacturing process.
  • FIG. 3 is a sectional view of a multilayer printed wiring board according to Embodiment 2 of the present invention in the order of manufacturing steps.
  • FIG. 4 is a cross-sectional view of the multilayer printed wiring board following the above manufacturing steps in the order of the manufacturing steps.
  • FIG. 5 is a cross-sectional view of a multilayer printed wiring board according to Embodiment 3 of the present invention in a manufacturing process order.
  • FIG. 6 is a cross-sectional view of a multilayer printed wiring board following the above manufacturing steps in the order of the manufacturing steps.
  • FIG. 1 and 2 are cross-sectional views illustrating a first embodiment of the present invention in the order of manufacturing steps. In this description, the structure of the multilayer printed wiring board of the present invention is also shown.
  • a two-layer core substrate 1 is formed from a double-sided copper-clad laminate as follows.
  • the base material 2 which is an insulating substrate of the double-sided copper-clad laminate used in the present invention, is an epoxy material containing glass cloth made of glass fiber or BT resin.
  • a copper foil having a thickness of about 20 m on the surface of the base material 2 is selectively etched using a resist mask formed by a well-known photolithography technique to form and position the first wiring pattern 3. Patterns 3 a and 3 b are formed on at least three places of the substrate 2.
  • the copper foil on the back surface of the base material 2 is Using a resist mask formed by the luffy technique, selective etching is performed to form the second wiring pattern 4 and the positioning patterns 4a and 4b.
  • the second wiring pattern 4 and the positioning patterns 4a and 4b are formed by using a well-known CCD camera alignment method in the exposure of the photolithography technology, so that the first wiring pattern 3 and the positioning patterns 3a and 3b Formed in alignment with.
  • the prepregs 5 and 6 are made of an epoxy resin material having a glass cloth made of S glass fiber or E glass fiber and having a thickness of 0.03 mm or more or BT resin.
  • the thickness of the copper foils 7 and 8 is arbitrary.
  • the four-layer plate is seen through the copper foil 7 with X-rays to detect the positioning pattern 3a.
  • the plurality of positioning plates 3a are aligned with each other to form corresponding reference holes 9 respectively.
  • the reference hole is formed by well-known laser processing, X-ray processing, or the like.
  • a third wiring pattern 11 is formed by selectively etching the copper foil 7 using a resist mask formed by a known photolithography technique.
  • the third wiring pattern 11 is different from the first wiring pattern 3. Positioning can be performed with high accuracy. The same can be said for patterns 4 and 12.
  • a four-layer core substrate 13 having a wiring pattern with high accuracy of alignment between the layers is formed.
  • the mass lamination method was used again. And laminate molding. Here, your material is the four-layer core substrate 13.
  • Two prepregs 14 a and 14 b and a copper foil 15 for the outer layer are laminated on the surface of the four-layer core substrate 13, and two prepregs are also provided on the back surface of the four-layer core substrate 13.
  • 16 a, 16 b and copper foil 17 for the outer layer are laminated.
  • This laid-up insulating material is heated and pressed to form and press, and as shown in Fig. 2B, a six-layer board consisting of a four-layer core substrate 13, prepregs 14, 16 and copper foils 15, 17
  • the prepregs 14 and 16 are made of an epoxy resin material or a BT resin having a glass cloth made of S glass fiber or E glass fiber and having a thickness of 0.03 mm or more.
  • the thickness of the copper foils 15 and 17 is arbitrary.
  • FIG. 2C drilling is performed based on the positioning pattern 3b or 4b as a position reference, and the first wiring pattern 3, the second wiring pattern 4, the third wiring pattern 11 and the fourth wiring pattern 11 are formed.
  • a through hole 18 penetrating the wiring pattern 12 and the copper foils 15 and 17 is formed.
  • a mask alignment with a photomask is performed based on the through hole 18 in the exposure transfer of the photolithography technology, (1)
  • a fifth wiring pattern (19) and a sixth wiring pattern (20) aligned with the second wiring pattern (3), the second wiring pattern (4), the third wiring pattern (11), and the fourth wiring pattern (12) are formed.
  • surface treatment using a solder resist is performed to complete a 6-layer printed wiring board with 6-layer through-holes.
  • the first major feature of the present invention is that a two-layer core board is formed from a double-sided copper-clad laminate, and this is used as a core material to perform lamination molding by a mass lamination method to form a four-layer core board.
  • the lamination molding by the mass lamination method is sequentially applied, such that the lamination molding by the mass lamination method using the four-layer core substrate as a core material to form a six-layer material.
  • the second major feature of the present invention is that a positioning pattern is provided on an initial core material (in this case, a double-sided copper-clad laminate to a two-layer core substrate) in order to perform alignment between layers.
  • the point is that a reference hole for alignment is formed based on this positioning pattern.
  • the point is that all of the wiring layers to be multi-layered are positioned through the positioning pattern arranged on the surface of the core material at the earliest stage.
  • the above-mentioned positioning pattern is used as a mask alignment mark that is detected by X-rays by exposure transfer of the pattern on the photomask to the photo resist in the photolithography technology, and the photomask is directly used. There is a method of aligning the position.
  • the accuracy of the alignment between the multilayer wirings is greatly improved as compared with the conventional method.
  • the above effects are remarkable as compared with the conventional method.
  • the material containing glass cloth is used for the inner layer plate, the plastic deformation of the substrate that has been unevenly expanded and contracted in the lamination molding is greatly reduced, and misalignment occurs in the alignment between the wiring layers in the process of forming the wiring layer. Area to be reduced. Therefore, the production yield of the multilayer printed wiring board is improved. Then, the thickness of the inner layer plate can be further reduced. In this way, the multi-layer printed wiring board can be easily densified, miniaturized, and inexpensively combined with the above-described effect of the multi-printed wiring board in the mass lamination method. Mass production will be possible.
  • FIG. 3 and FIG. 4 are cross-sectional views in the order of manufacturing steps for describing the second embodiment. It is.
  • an eight-layer printed wiring board is formed.
  • up to the six-layer plate 13 described in the first embodiment is formed in the same manner. That is, the six-layer plate 21 shown in FIG. 3A is almost the same as the six-layer plate 13 of FIG. 2B described in the first embodiment.
  • the thickness of the copper foils 15 and 17 is as thick as about 20 ⁇ m.
  • positioning patterns 3c, 4c are formed further inside positioning patterns 3b, 4b.
  • the above-mentioned six-layer plate 21 is seen through the copper foil 15 with X-rays, and a positioning pattern 3b different from the positioning pattern 3a is detected.
  • the reference holes 22 are respectively formed by aligning the plurality of positioning patterns 3b.
  • the positioning patterns 3b and 4b are preferably formed on the same layer as the above-described positioning patterns 3a and 4a, and provided on the inner side away from the periphery of the six-layer plate 21.
  • the inner layer board or the wiring board undergoes plastic deformation that is unevenly expanded and contracted by heating or pressing. Furthermore, such deformation increases as the wiring board is multi-layered, and particularly increases nearer the periphery of the wiring board. Therefore, when the positioning patterns 3b and 4b arranged farther from the periphery than the positioning patterns 3a and 4a arranged on the peripheral side of the insulating substrate are used in the alignment between the wiring layers, the above-described deformation alignment is achieved. This is because the effect on the environment can be reduced.
  • the mask is aligned with the photomask based on the reference hole 22 and the copper foil 15 is etched as shown in FIG. 3C. 5 Form a wiring pattern 24.
  • a mask is aligned with a photomask based on the reference hole 22, and the copper foil 17 is etched to form a sixth wiring pattern 25. In this way, between each layer A six-layer core substrate 26 having wiring patterns with high alignment accuracy is formed.
  • the laminate is formed again using the mass lamination method.
  • the core material is a six-layer core substrate 26.
  • the subsequent steps are the same as those described in FIG. That is, the prepregs 27a and 27b and the copper foil 28 for the outer layer are laminated on the six-layer core substrate 26, and the prepregs 29a and 29b and the copper foil 30 for the outer layer are laminated on the back surface. Laminate. Then, forming and pressing are performed to form an eight-layer plate including a six-layer core substrate 26, prepregs 27 and 29, and copper foils 28 and 30.
  • the prepregs 27 and 29 are made of an epoxy resin material having a glass cloth made of S glass fiber or E glass fiber and having a thickness of not less than 0.03 mm or BT resin. The thickness of the copper foil 28, 30 is arbitrary.
  • FIG. 4C drilling is performed based on the positioning pattern 3c or 4c as a position reference, and the first wiring pattern 3, the second wiring pattern 4, the third wiring pattern 11, and the fourth wiring pattern are formed.
  • a through hole 31 penetrating through the wiring pattern 12, the fifth wiring pattern 24, the sixth wiring pattern 25, and the copper foils 28, 30 is formed.
  • a mask alignment with a photomask is performed based on the above-mentioned through hole 31 in the exposure transfer of the photolithography technology, and the first Wiring pattern 3, 2nd wiring pattern 4, 3rd wiring pattern 11, 4th wiring pattern 12, 5th wiring pattern 24, 7th wiring aligned with 6th wiring pattern 25
  • the pattern 32 and the eighth wiring pattern 33 are formed. In this way, an eight-layer printed wiring board having eight through-holes is completed.
  • another feature of the present invention is that the alignment between the layers is most important.
  • Initial core material in this case, double-layer copper clad laminate
  • a plurality of types of positioning patterns are arranged and provided on a substrate, and the core material becomes multilayered and the positioning patterns used from the periphery of the above-mentioned initial core material are used sequentially as the positioning patterns to be used. .
  • the above-mentioned deformation of the wiring board increases.
  • the inside of the insulating substrate is adjusted from the periphery of the insulating substrate in accordance with the multilayering.
  • FIG. 5 and FIG. 6 are cross-sectional views in the order of the manufacturing steps for explaining the third embodiment.
  • an 8-layer printed wiring board having a plurality of through holes, a one-stage build-up structure, and a method of manufacturing the same will be described.
  • FIG. 5A is the same as that of FIG. 2C described in the first embodiment, which is referred to as a six-layer core substrate 41.
  • the six-layer core substrate 41 is used as an inner layer plate and laminated by a mass lamination method using a core material.
  • the prepreg in the lay-up stage is an epoxy resin material having a glass cloth made of S glass fiber or E glass fiber and BT resin, and is also filled in the inner via hole 18. I do.
  • the prepregs 42, 43 which fill the inner via hole 18, sandwiching the six-layer core substrate 41, and the copper foils 44, 45 for the outer layer are formed.
  • An eight-layer plate formed by lamination is formed.
  • the thickness of the copper foils 44 and 45 is arbitrary, and the thickness of the prepregs 42 and 43 is not less than 0.03 mm.
  • a drilling process is performed with the positioning pattern 3b or 4b as a position reference, and the copper foils 44, 45 and the inner layer wiring pattern are drilled. Form a through hole 4 6 through the turn.
  • the prepreg is moved to reach the fifth wiring pattern 19a and the sixth wiring pattern 20a, respectively.
  • 4 2 and 4 3 are provided with respective vias for build-up. Thereafter, copper plating with a film thickness of several m to several tens / m is applied.
  • the mask is aligned with the photomask based on the through hole 46, and the first wiring pattern 3, the second wiring pattern 4, the third wiring pattern 11, A seventh wiring pattern 47 and an eighth wiring pattern 48 aligned with the fourth wiring pattern 12, the fifth wiring pattern 19, and the sixth wiring pattern 20 are formed. Also, a seventh wiring pattern 47a, which builds up from the fifth wiring pattern 19a, and an eighth wiring pattern 48a, which builds up from the sixth wiring pattern 20a, are formed thereon. In this way, an eight-layer printed wiring board having a structure having a plurality of through holes and a one-stage build-up is completed.
  • the present invention it is easy to connect through the through holes between the multi-layered wirings or to form a gap between the wirings, and it is possible to further increase the density and miniaturization of the multi-layer printed wiring board with low cost. Can be formed.
  • multilayer printed wiring boards having high alignment accuracy between wiring layers can be manufactured at low cost, and the miniaturization and cost reduction of portable devices such as mobile phones will be greatly advanced.
  • the multilayer printed wiring board according to the present invention enables both high density / miniaturization and low cost. We will also provide inexpensive multilayer printed wiring boards for use in advanced personalized electronic and communication equipment.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

Une carte de circuits imprimés multicouches est formée par stratification de masse. Des schémas de connexions (3, 4) ainsi que des schémas de positionnement (3a, 3b, etc.) sont formés sur les surfaces avant et arrière de la base (2) d'une feuille centrale à deux couches (1). Des feuilles de cuivre (7, 8) sont appliquées sur les deux côtés d'une feuille centrale via des préimprégnés (5, 6). Des trous de positionnement (9, 10) sont formés sur certaines parties des feuilles de cuivre ou des préimprégnés, correspondant aux schémas de connexions de positionnement détectés par rayons X. Enfin, des schémas de câblage (11, 12) sont formés par gravure des feuilles de cuivre, les trous de positionnement étant utilisés pour aligner les couches de câblage. On obtient ainsi une carte de circuits imprimés multicouches à haute densité, de petite taille et de faible coût qui est utilisée dans les dispositifs portatifs de pointe.
PCT/JP2003/011937 2003-09-18 2003-09-18 Carte de circuits imprimes multicouches et procede de fabrication WO2005029933A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/JP2003/011937 WO2005029933A1 (fr) 2003-09-18 2003-09-18 Carte de circuits imprimes multicouches et procede de fabrication
TW092128979A TW200513158A (en) 2003-09-18 2003-10-20 Multilayer printed wiring board and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2003/011937 WO2005029933A1 (fr) 2003-09-18 2003-09-18 Carte de circuits imprimes multicouches et procede de fabrication

Publications (1)

Publication Number Publication Date
WO2005029933A1 true WO2005029933A1 (fr) 2005-03-31

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WO (1) WO2005029933A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2016010083A1 (ja) * 2014-07-18 2017-04-27 三菱瓦斯化学株式会社 積層体及び半導体素子搭載用基板、並びにそれらの製造方法
CN117545198A (zh) * 2024-01-10 2024-02-09 深圳市众阳电路科技有限公司 一种用于生产多层印刷电路板的方法及系统

Citations (5)

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Publication number Priority date Publication date Assignee Title
JPS5516479B2 (fr) * 1974-04-15 1980-05-02
JPH02197192A (ja) * 1989-01-26 1990-08-03 Toshiba Corp 多面取り多層型プリント配線基板の製造法
JPH0327595A (ja) * 1989-06-23 1991-02-05 Toshiba Chem Corp 多層積層板の基準穴あけ法
JPH05206652A (ja) * 1992-08-31 1993-08-13 Hitachi Ltd 多層プリント基板の加工方法
JP2002329964A (ja) * 2001-04-27 2002-11-15 Mitsubishi Paper Mills Ltd 多層プリント配線板の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5516479B2 (fr) * 1974-04-15 1980-05-02
JPH02197192A (ja) * 1989-01-26 1990-08-03 Toshiba Corp 多面取り多層型プリント配線基板の製造法
JPH0327595A (ja) * 1989-06-23 1991-02-05 Toshiba Chem Corp 多層積層板の基準穴あけ法
JPH05206652A (ja) * 1992-08-31 1993-08-13 Hitachi Ltd 多層プリント基板の加工方法
JP2002329964A (ja) * 2001-04-27 2002-11-15 Mitsubishi Paper Mills Ltd 多層プリント配線板の製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2016010083A1 (ja) * 2014-07-18 2017-04-27 三菱瓦斯化学株式会社 積層体及び半導体素子搭載用基板、並びにそれらの製造方法
US10964552B2 (en) 2014-07-18 2021-03-30 Mitsubishi Gas Chemical Company, Inc. Methods for producing laminate and substrate for mounting a semiconductor device
CN117545198A (zh) * 2024-01-10 2024-02-09 深圳市众阳电路科技有限公司 一种用于生产多层印刷电路板的方法及系统
CN117545198B (zh) * 2024-01-10 2024-05-07 深圳市众阳电路科技有限公司 一种用于生产多层印刷电路板的方法及系统

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