WO2005024773A1 - Circuit de pilotage d'un affichage a cristaux liquides - Google Patents

Circuit de pilotage d'un affichage a cristaux liquides Download PDF

Info

Publication number
WO2005024773A1
WO2005024773A1 PCT/IB2004/051618 IB2004051618W WO2005024773A1 WO 2005024773 A1 WO2005024773 A1 WO 2005024773A1 IB 2004051618 W IB2004051618 W IB 2004051618W WO 2005024773 A1 WO2005024773 A1 WO 2005024773A1
Authority
WO
WIPO (PCT)
Prior art keywords
current
driver circuit
data
circuit according
liquid crystal
Prior art date
Application number
PCT/IB2004/051618
Other languages
English (en)
Inventor
Antonius Petrus Gerardus Welbers
Francesco Maone
Milen Penev
Seraphin Nicaise Itoua
Original Assignee
Koninklijke Philips Electronics N. V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics N. V. filed Critical Koninklijke Philips Electronics N. V.
Publication of WO2005024773A1 publication Critical patent/WO2005024773A1/fr

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0272—Details of drivers for data electrodes, the drivers communicating data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only

Definitions

  • the invention relates to a driver circuit for a liquid crystal display and a method for driving a liquid crystal display.
  • Liquid crystal display systems having thin film transistors (TFTs) are being used more and more in applications which require a visual representation of images and/or data. Since the color depth of such TFTs systems is increasing steadily and the associated liquid crystal technology is getting more and more sophisticated, a very accurate control of the voltages needed for the TFT driving scheme is becoming compulsory.
  • TFTs thin film transistors
  • One of the critical blocks in the chain of subsystems involved in the panel driving in the current TFT source driver architecture is the resistor ladder for the digital- analog (D/A) conversion. This ladder shall be abbreviated as RDAC in the following.
  • Fig. 1 shows a conventional architecture for a TFT display driver.
  • the RDAC shown comprises multiple resistors Rl to Rn+1 forming a voltage divider with multiple voltage outputs, providing output voltages VI to Vn corresponding thereto.
  • the RDAC forms a simple digital to analog converter creating n discrete voltages VI to Vn.
  • the output voltages VI to Vn in the following also called reference voltages, create the shape of the gamma curve, wherein the gamma curve is a representation of the electrical and optical performance of the TFT display. It describes the transmission of the liquid crystal when applying a voltage to it.
  • Each of the outputs of the RDAC is fed to a switch matrix SMI to SMn.
  • Data signals are also fed to the switch matrixes SMI to SMn, wherein the data is mapped to the corresponding reference voltage.
  • the magnitude of the data determines the reference voltage VI - Vn which is then switched to the output of the switch matrix SMI to SMn. Afterwards, the voltages switched through are buffered in the output buffers Bl to Bn.
  • the resistances of the contacts in the head structures of the resistor, shown in Fig. 3, are considered as parts of the resistor.
  • the whole resistor chain i.e. the whole RDAC, has to be redesigned. Often the redesign of the resistor chain ends up in a complete product redesign.
  • Matsueda shows in US patent application publication 2002/0149556 a liquid crystal display with thin film transistors.
  • a driver circuit for the liquid crystal display is described in figure 1 of this publication.
  • signal lines and scanning lines are disposed in a matrix manner, and at an intersection thereof a pixel TFT, a hold capacitor, and a liquid crystal capacitor are connected.
  • a shift register and a level shifter form the scanning lines.
  • the level shifter is provided with a buffer circuit at its output section.
  • a data driver section for sending an image signal to the signal lines is formed by a shift register, latches for reading data from a (n+m)-bit digital image signal according to the output timing of the shift register, latches for writing the data stored in the latches at a batch, and by a D/A converter for converting the (n+m)-bit digital image data stored in the latches to an analog signal.
  • the D/A converter operates with the data stored in the second-stage latch while data is rewritten into the first-stage latch.
  • sufficient time is available for driving the signal lines.
  • the driver circuit works with a resistor-division-type D/A converter, i.e. a RDAC as explained above. Therefore, this driver circuit shows also the problems mentioned above.
  • An object of the invention is to provide an improved driver circuit and an associated method for driving a liquid crystal display.
  • This novel driver circuit/method allows easy adaption of the image data control signals to the characteristics of the liquid crystal display used without the necessity of redesigning the whole driver circuit.
  • a desired gamma curve can easily be achieved, or a given curve adjusted.
  • the solution according to the invention is a driver circuit for a liquid crystal display with the features according to the independent apparatus claim 1 and a method for driving a liquid crystal display with the features according to independent method claim 13.
  • the novel driver circuit according to the invention is a current-driven device wherein appropriately controlled current switches provide the necessary input for the dot generation on the display.
  • the method for driving a liquid crystal display comprises the following steps: - Digital image data are converted by means of a lookup table into digital control data. - Then, using these digital control data, controllable current sources are adjusted to deliver corresponding currents for generating image dots on the liquid crystal display.
  • a reference current source is provided and connected to the controllable current sources/switches to supply them with a reference current.
  • the reference current source is a programmable reference current source.
  • the driver circuit according to the invention can comprise a pipeline connected between the lookup table and the controllable current sources.
  • the control data are stored intermediately and than dispatched to the programmable current sources in parallel.
  • the pipeline comprises data latches, in which the data are intermediately stored before they are forwarded for example to a shift register.
  • the lookup table of the driver circuit according to the invention may be stored in an electrically erasable programmable read only memory (EEPROM), a Flash memory, a read only memory (ROM), or a random access memory (RAM).
  • the driver circuit can comprise a shift register, which is connected with its input to the pipeline and with its outputs to the controllable current sources.
  • the liquid crystal display comprises means for generating image dots, and each controllable current source of the driver circuit is connected to one of the means for generating image dots.
  • the driver circuit according to the invention comprises a clock generator for generating a clock signal which defines when the means for generating image dots of the liquid crystal display are charged.
  • the driver circuit according to the invention is preferably applicable to a liquid crystal display wherein the image dots are generated by thin film transistors (TFTs).
  • TFTs thin film transistors
  • a suitable clock signal is provided for controlling the timing when the means for generating image dots are supplied with the current from the current sources.
  • Fig. 1 a conventional embodiment of a driver circuit for a thin film transistor display
  • Fig. 2 a block diagram of a display driver circuit according to the invention for driving a liquid crystal display
  • Fig. 3 a resistor layout including the head structure of the resistor.
  • Fig. 1 shows a block diagram of a conventional driver circuit for a liquid crystal display.
  • This conventional driver circuit is explained above in this description in the section "Background of the invention".
  • the novel source driver architecture using a current based approach is proposed in order to overcome the limitations of the conventional implementation shown in Fig. 1.
  • Fig. 2 shows the principal structure of an embodiment of the driver circuit 8 for driving a liquid crystal display.
  • the liquid crystal display itself is not fully shown, only parts thereof, namely the means for generating image dots 4.1, 4.2 ... 4.N. These form the loads for the display driver outputs.
  • three image dots are combined to one pixel, wherein each image dot is driven by one current switch. The number of pixels and thus the number of current switches depends on the resolution of the liquid crystal display.
  • Digital image data DATA entering the driver circuit 8 are fed to a lookup table 5 and control data CD resulting from this lookup operation are stored intermediately in a data pipeline.
  • This data pipeline comprises a series of data latches 6, the number of data latches depending on the number of current switches 2.1, 2.2 to 2.N.
  • a clock generator 3 creates an internal clock signal CLK from an external clock signal EXTCLK, which synchronizes the current switches 2.1 to 2. N and determines the time during which the loads, i.e. the means for generating image dots 4.1 ... 4.N, are charged. Therefore, the internal clock signal CLK is conducted to a clock input of each of the current switches 2.1 to 2. N.
  • An address generator 9 selects the address of the memory in which the lookup table 5 is stored which is necessary to convert the incoming digital data DATA with the help of the parameters stored in the look-up table 5. By means of a read/write signal R W it is decided whether the parameters stored in the lookup table 5 shall be read out or not. Programming of the look-up table 5 is done by hard-programming, the look-up table can be seen as a ROM type. There are of coarse other possible types of memory so that soft programming is possible (SRAM, EEPROM, etc.)
  • the driver circuit 8 further comprises a programmable reference current source 1 which can produce different reference currents Iref.
  • the set point of the desired current intensity of the current Iref is provided by the incoming digital data DATA, which are also, lead to the programmable reference current source 1.
  • the principal idea of the driver circuit 8 according to the invention consists in driving the output loads 4.1 to 4.N by means of various currents II, 12 ... LN.
  • the necessary reference current Iref is provided by the programmable reference current source 1 and delivered to the column drivers 2.1 to 2. N.
  • the current Iref is replicated and partitioned by a current switch.
  • Each column driver 2.1 to 2.N comprising a current switch and a current replicator produces a current II, 12 to IN, which, according to the timing imposed by the internal clock generator 3, charges the loads 4.1 to 4.N for a well-defined interval.
  • This interval must be chosen in order to drive the correct voltage onto the load 4.1 to 4.N by means of the partitioned current II, 12 to IN.
  • How the reference current Iref is split, is stored in the lookup table 5.
  • the incoming digital data DATA are re-mapped into the configuration to be provided to the current switches 2.1 to 2. N.
  • this re-mapping allows converting the incoming data DATA into a data format required by the current switches 2.1 to 2.N.
  • the data are adjusted to implement a desired specific gamma curve.
  • the novel architecture allows to drive different loads, giving thus the benefit of being independent from the load conditions once the display panel is chosen.
  • the out coming control data CD is temporarily stored in the data latches 6 of the pipeline to interface the internal and the external time domains.
  • the shift-register 7 stores and delivers the latch signal for each column driver 2.1 to 2. N, and here the image data are stored. After a complete scan of all the columns, an additional pulse is produced, the duration of which being controlled by the clock generator 3. The duration of the pulse accords with the current driving scheme described above. These steps are repeated for all the columns.
  • the current switch and the current replicator can jointly form a controllable current mirror.
  • the controlable current-mirror is based on a current division technique which allows a basic reference current to be binary weighted and split up so that the output current coming out of driver 2.1 to 2.
  • N is a binary weighted part of the basic current.
  • the current switch and the current replicator are also called column driver or controllable current source.
  • the lookup table 5 is in principle a [MxN] matrix, where M is the number of bits composing the data and N the required resolution for the current switches 2.1 to 2.N. Since N can be chosen wide enough to implement more then one mapping, simply imposing N > M one can benefit of a digital representation of the gamma curve with the following ad-vantages: 1. The implemented gamma curve can easily be adapted/changed. 2. Production-process-related inaccuracies can easily be corrected by an appropriate adaptation of the parameters stored in the lookup table. 3. The match between the driver output and the load environment can be improved.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

Ce circuit d'attaque pour un affichage à cristaux liquides est essentiellement un dispositif commandé par courant et comprend de préférence des sources de courant ou des commutateurs (2.1 2.N) à commande numérique qui servent de circuits de pilotage de colonnes ou de rangées et sont connectés aux charges (4.1 4.N) de l'affichage. Les commutateurs sont commandés par des données numériques de commande (CD) dérivées de données d'image d'entrée (DATA) par l'intermédiaire d'une table de consultation (5). Le circuit peut en outre comprendre un registre à décalage.
PCT/IB2004/051618 2003-09-10 2004-08-31 Circuit de pilotage d'un affichage a cristaux liquides WO2005024773A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP03103339 2003-09-10
EP03103339.2 2003-09-10

Publications (1)

Publication Number Publication Date
WO2005024773A1 true WO2005024773A1 (fr) 2005-03-17

Family

ID=34259274

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2004/051618 WO2005024773A1 (fr) 2003-09-10 2004-08-31 Circuit de pilotage d'un affichage a cristaux liquides

Country Status (1)

Country Link
WO (1) WO2005024773A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007034360A2 (fr) * 2005-09-19 2007-03-29 Koninklijke Philips Electronics N.V. Ecrans a matrice active et leurs procedes d'excitation

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6384817B1 (en) * 1999-12-21 2002-05-07 Philips Electronics North America Corporation Apparatus for applying voltages to individual columns of pixels in a color electro-optic display device
US20020145584A1 (en) * 2001-04-06 2002-10-10 Waterman John Karl Liquid crystal display column capacitance charging with a current source
US6466189B1 (en) * 2000-03-29 2002-10-15 Koninklijke Philips Electronics N.V. Digitally controlled current integrator for reflective liquid crystal displays

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6384817B1 (en) * 1999-12-21 2002-05-07 Philips Electronics North America Corporation Apparatus for applying voltages to individual columns of pixels in a color electro-optic display device
US6466189B1 (en) * 2000-03-29 2002-10-15 Koninklijke Philips Electronics N.V. Digitally controlled current integrator for reflective liquid crystal displays
US20020145584A1 (en) * 2001-04-06 2002-10-10 Waterman John Karl Liquid crystal display column capacitance charging with a current source

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007034360A2 (fr) * 2005-09-19 2007-03-29 Koninklijke Philips Electronics N.V. Ecrans a matrice active et leurs procedes d'excitation
WO2007034360A3 (fr) * 2005-09-19 2007-07-05 Koninkl Philips Electronics Nv Ecrans a matrice active et leurs procedes d'excitation

Similar Documents

Publication Publication Date Title
TWI395183B (zh) 液晶顯示器之源極驅動器
KR100375309B1 (ko) 감마 보정 특성을 변경시킬 수 있는 계조표시 기준전압발생회로 및 그를 이용한 액정구동장치
US7034797B2 (en) Drive circuit, electro-optical device and driving method thereof
US6100879A (en) System and method for controlling an active matrix display
KR100742804B1 (ko) 표시 소자 구동 장치, 그 표시 소자 구동 장치를 포함한표시 장치 및 표시 소자 구동 방법
US7944458B2 (en) Digital-analog converter, data driver, and flat panel display device using the same
US7403145B2 (en) Data driver and driving method of organic light emitting display device using the same
US8022971B2 (en) Data driver, organic light emitting display, and method of driving the same
US11004379B2 (en) Display apparatus and method for generating enable signal used in the same
US7239567B2 (en) Light emitting display and data driver there of
JPH09505904A (ja) 液晶ディスプレイの信号駆動回路
US20040090409A1 (en) Gamma correction voltage generation device, and gamma correction device and display device using the same
JP4401376B2 (ja) デジタル−アナログ変換器、デジタル−アナログ変換器を採用したデータ駆動回路、および平板ディスプレイ装置
JPH06314080A (ja) 液晶表示装置
US8228317B2 (en) Active matrix array device
US20060050837A1 (en) Source driver with multi-channel shift register
CN112216239A (zh) 源极驱动器和显示装置
WO2005024773A1 (fr) Circuit de pilotage d'un affichage a cristaux liquides
EP0544427B1 (fr) Circuit de contrÔle pour un système d'affichage avec un circuit d'attaque de source numérique, capable de générer des tensions d'attaque à plusieurs niveaux en partant d'une seule source d'énergie externe
US7079065B2 (en) Digital-to-analog converter and the driving method thereof
KR100236332B1 (ko) 액정표시장치의 데이터 구동회로 및 방법
KR20200079129A (ko) 레벨쉬프터 및 이를 포함하는 표시장치
JPH04237090A (ja) フラットディスプレイの階調駆動回路
JP2004246087A (ja) 表示装置とその駆動回路、駆動装置および駆動方法

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase