WO2005022756A1 - 復号装置および方法、プログラム記録媒体、並びにプログラム - Google Patents
復号装置および方法、プログラム記録媒体、並びにプログラム Download PDFInfo
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
- G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2957—Turbo codes and decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/6343—Error control coding in combination with techniques for partial response channels, e.g. recording
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
- G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
- G11B2020/1453—17PP modulation, i.e. the parity preserving RLL(1,7) code with rate 2/3 used on Blu-Ray discs
Definitions
- the present invention relates to a decoding apparatus and method, a program recording medium, and a program, and more particularly, to a decoding apparatus and method that can improve the decoding performance of a modulation code encoded based on a variable-length table.
- Program recording medium, and program Background art
- modulation coding is performed in advance so that amplitude control of the read signal and clock reproduction operate properly at the time of reproduction, and then recording is performed. Then, for reproduction in such a case, for example, the original waveform is reproduced even in consideration of the media characteristic that the reproduction signal is affected by the previous signal, and based on the characteristics of the recording signal, the reproduction signal is Reproduction processing such as PRML (Partial Response Maximum-Likes) that reads the most likely data is used.
- PRML Partial Response Maximum-Likes
- FIG. 1 shows a configuration example of a recording / reproducing apparatus 1 based on the conventional PR M L.
- the recording / reproducing apparatus 1 includes a modulation and coding unit 1 1, a PR communication channel 1 2, and a decoding unit 13.
- the modulation coding unit 11 has a coding table 4 1-1 of a predetermined modulation code for adding a predetermined restriction to the input signal.
- the modulation encoding unit 1> 1 encodes the input signal into a predetermined modulation code based on the coding table 41 1 1 1 (Part i a l Response) passing output to the signal line 1 2.
- the restriction for example, the number of 0s and 1s of the code can be equalized in a sufficiently long range, and the DC freeness restriction and the minimum and maximum lengths of the number of consecutive 0s become d and k, respectively (d , K) restrictions etc. are used.
- the PR channel 12 is composed of a recording / reproducing unit 21 and an equalization processing unit 22.
- the recording / reproducing unit 21 is an NRZI (non return to zero inverted) encoding of the encoded signal input from the modulation unit 11 and a NRZI encoded recording medium or a built-in recording medium. On a recording medium using the Mark Edge Recording method. Further, the recording / reproducing unit 21 reads out the encoded signal recorded on the recording medium by PR 2 channel, and supplies the read encoded signal to the equalization processing unit 22. The equalization processing unit 22 performs PR equalization using waveform interference on the supplied encoded signal so as to obtain a predetermined target equalization characteristic, and supplies the PR signal to the decoding unit 13.
- the decoding unit 13 includes a PR-Viterbi decoding unit 31 and a modulation decoding unit 32.
- the decoding unit 13 decodes the signal supplied from the equalization processing unit 22.
- the PR-Viterbi decoding unit 31 is a trellis that develops a state transition table representing an encoding process every time based on NRZI coding and PR 2 channel from the signal from the PR channel 12 in time series. A representation is determined, and based on the determined NRZI coding and trellis representation of the PR 2 channel, Viterbi decoding is performed, and a Viterbi-decoded signal is supplied to the modulation decoding unit 32.
- the modulation / decoding unit 32 has the same coding table 4 1 1 2 as the coding table 4 1 1 1 possessed by the modulation coding unit 1 1 (note that the coding table 4 1 -1 and 4 1 1 2 If there is no need to distinguish, it appropriately includes a coding table 41), and modulates and decodes the signal supplied from the PR-Viterbi decoding unit 31 based on the coding table 41. , The modulation-decoded signal is output to the subsequent stage not shown.
- turbo coding is added to the front stage of the modulation coding unit 11, and the turbo coding is decoded on the rear stage of the modulation decoding unit 32.
- the turbo decoding unit to be added to the subsequent stage of the modulation decoding unit 32 is 0, It is necessary to input not only information (hard information) of 1 but also information (soft information (soft decision information)) of how certain these hard information are.
- Soft-Input needs to be given to the decoding part of turbo code and LD PC code. Therefore, when decoding by using the modulation code in the modulation / decoding unit 32 in the previous stage, it is necessary to obtain its soft-output (Soft-Output).
- the BCJR Bit-Cocke-Jeine k_Raviv
- S OVA S OVA
- a trellis expression in which a state transition table representing an encoding process at each time is expanded in time series. It is generally determined by (Soft-Output Viterbi Algorithm). Note that this trellis representation is easily possible when decoding the input signal using a convolutional code, but it is not always easy when decoding using a non-linear code modulation code. Absent.
- the modulation code for example, the (1, 7) RLL (Run Length Limited) code (Standa d ECMA (R) is used for recording and reproducing a magneto-optical disc (MO) by recent research.
- RLL Random Length Limited
- RLL code Spin Length Limited
- MCA magneto-optical disc
- the modulation decoding unit using RLL code is a turbo decoding unit.
- Turbo Decoding with Run Length Limited Code for Optical Stage E. Yamada et al., The Japan Society of Applied Physics, 'Vol. 41, pp. 1753 to 1756, 2002 3 2 (Issued monthly) (hereinafter referred to as non-patent document 1) where RLL code is sandwiched between "1" and "1" in modulation code.
- FIG. 2 shows a configuration example of a conventional recording / reproducing apparatus 51 in which turbo codes are concatenated.
- an encoding unit 61 is disposed instead of the modulation encoding unit 11 of FIG. 1, and a decoding unit 62 is disposed instead of the decoding unit 13.
- the description of FIG. 1 and FIG. 2 is also cited in the description of the present invention described later.
- the coding unit 61 includes a turbo coding unit 71, an interleaver 72, and a RLL (Run Length Limited) coding unit 73.
- the turbo coding unit 71 includes an element coding unit 91, an interleaving unit 92, an element coding unit 93, and a decimation processing unit 94.
- the input signal is turbo-coded and output to the interleaver 72.
- An external signal is simultaneously input to an element coding unit 91 and an interleaver 92.
- the element encoding unit 91 generates a parity bit string 1 from the input signal and outputs the parity bit sequence 1 to the thinning processing unit 94.
- the interleaver 92 rearranges the order of the signals input simultaneously with the element coding unit 91, and inputs it to the element coding unit 93.
- the element coding unit 93 generates a parity bit string 2 from the signal rearranged by the interleaver 92, and outputs the parity bit sequence 2 to the thinning processing unit 94.
- the decimation processing unit 94 outputs a turbo-encoded signal to the interleaver 72 by multiplexing while parity bit strings 1 and 2 are decimated.
- the interleaver 72 rearranges the order of the signals input from the turbo coding unit 71, and outputs the rearranged signals to the R L L coding unit 73.
- the 1 ⁇ coding unit 73 has a coding table 101 of (1, 7) RLL, and based on the RLL coding table 1 0 1, the signal input from the interleaver 72 (1, 7 ) R L encoding and output to PR channel 1 2.
- the decoding unit 62 is composed of a PR-SI SO (Soft-Input Soft-Output) decoding unit 81, an RLL-SISO decoding unit 82, a digital decoder 83 and a turbo decoding unit 84, and is supplied from the equalization processing unit 22.
- the decoded signal is processed. From the signal from PR channel 12 to PR-SI SO decoding unit 81, based on NR ZI coding and PR 2 channel, a state transition table representing an encoding process at each time is arranged in time series.
- SISO Soft-Input Soft-Output
- the RL L-SI SO decoding unit 82 based on the (1, 7) RL L encoding table 101 of the PLL encoding unit 73, represents a state transition table representing an encoding process at each time.
- the trellis representation expanded along the time series is determined, and based on the determined (1, 7) RLL trellis representation, the signal from the PR-SISO decoder 81 is SISO-decoded and the SISO-decoded signal is Supply to Dinta Rivera 83.
- FIG. 3 shows an example of the configuration of the (1, 7) R L state transition table
- FIG. 4 shows an example of a trellis expression in which the state transition table of FIG. 3 is expanded in time series. Ru.
- the state transition table in FIG. 3 represents an encoding process for one time of the previous time and the current time
- the (1, 7) RLL encoding table 101 State information on “state” and “current state” is added to make the transition of the state easier to understand.
- “Current time output” 0 1 0 is output and “current time status” S 3 is indicated. Also, in the case of “previous time status” S3, when “current time input” 00 is input, “current time output” 0 1 0 is output to become “current time status” SO, and “current time” “Input” 0 1 is input, “current time output” 1 00 is output, “current time state” S 1 is set, “current time input” 1 0 is input, “current time output” When 1 0 0 is output and “current time status” S 2 is entered and “current time input” 1 1 is input,
- “Current time output” 0 1 0 is output and “current time status” S 3 is indicated. Also, in the case of “previous time status” S 5, when “current time input” 0 0 is input, “current time output” 0 1 0 is output and “current time status” SO is set, and “current time” “Time input” 0 1 is input, “current time output” 0 0 0 is output and “current time status” S 1 is set, and “current time input” 1 0 is input, “current time” “Output” 0 0 0 is output to “current time state” S 2 and “current time input” 1 1 is input.
- the (1, 7) RLL trellis representation (state transition table) can indicate the transition state for one time period by the six states S 0 to S 5, and in each state When a signal is input, one signal is required for that input signal. Therefore, the R L L-S I S O decoder 82 can easily perform S I so decoding based on this (1, 7) R L L trellis representation.
- the R L L—S I S O decoding unit 82 supplies the S I S O decoded signal to the deinterleaver 83.
- the deinterleaver 83 restores the reordering performed by the interleaver 72 of the signal supplied from the R L L-S I S O decoding unit 82, and outputs the result to the turbo decoding unit 84.
- the turbo decoding unit 84 includes an interpolation processing unit 11 1, an element decoding unit 1 12, an interleaver 1 13, an element decoding unit 1 14 and an interleaver 1 15, and the signal from the deinterleaver 8 3 Information is turbo-decoded and output to the outside (not shown).
- the interpolation processing unit 1 1 1 1 performs interpolation processing on the signal from the digital decoder 8 3, and outputs it to the element decoding unit 1 1 2 and the element decoding unit 1 1 4.
- the element decoding unit 1 1 2 performs SI 2 SO 3 decoding on the signal from the interpolation processing unit 1 1 1 1, and together with the signal so decoded, the reliability information via the interleaver 1 1 3 to the element decoding unit 1 1 4 Output.
- the element decoding unit 1 1 4 SISO-decodes the signal from the interpolation processing unit 1 1 1 1 using the reliability information from the element decoding unit 1 1 2 2, and is SISO-decoded via the interleaver 1 1 5
- the signal and the reliability information are output to the element decoding unit 1 1 2.
- the element decoding unit 114 performs final determination processing, and outputs the result to the subsequent stage not shown.
- the RL L-SISO decoding unit 82 the element decoding unit 112 and the element decoding unit 114 shown in FIG. Etc. are used. '
- the trellis representation of (1, 7) RLL is obtained from the (1, 7) RLL encoding table 101 by the RLL-SISO decoding unit 82.
- Soft information is easily output. Therefore, the tarpo decoding unit 84 can be connected to the subsequent stage of the R L L-S I S O decoding unit 82.
- variable-length coding table for example, since the bit length of “input” is not the fixed bit length of “00” or “0 1” as in (1, 7) RLL code, for example “Input” 0 “0,” “output” may not be one. Therefore, even when trying to obtain a trellis expression using a variable-length coding table like this 1 7 PP code, as in the (1, 7) R L code described above, the bit length of the input is a fixed bit length. Therefore, it is difficult to easily obtain the trellis representation of the 1 7 PP code, and temporarily, it is possible to obtain the trellis representation by directly developing the state transition table representing the encoding process at each time. However, since the total number of states is very large and complicated, it is practically difficult to perform SISO decoding using a modulation code having a variable length table such as 17 PP.
- the present invention has been made in view of such a situation, and is based on a variable-length table. Therefore, it is possible to improve the decoding performance of the coded modulation code.
- the decoding apparatus comprises code input means for inputting a modulation code, and decoding means for decoding the modulation code inputted by the code input means, the decoding means comprising: It is characterized in that the modulation code is decoded based on the trellises of the modulation code represented by each state transition in the entire encoding process and the path corresponding to one-to-one.
- the modulation code can be made to be a 17 P P (Parity Preserve / Prohibited Repeated Minimum Run Run Time) modulation code.
- the decoding means can perform decoding using soft input.
- the decoding means may perform decoding using soft decision Viterbi algorithm.
- the decoding means may perform soft output decoding.
- the decoding means can perform decoding using B CJ R (Bahl-Cocke-Je inek-Ravi v) algorithm.
- the decoding means can perform decoding using Soft-Output Viterbi Algorithm (SOA).
- SOA Soft-Output Viterbi Algorithm
- the code input means inputs the modulation code equalized to the PR (Partial Response) characteristic
- the decoding means decodes the modulation code based on the combined trellis combining the trellis of the PR characteristic and the trellis of the modulation code. It can be done.
- the decoding method of the present invention includes: a code input step of inputting a modulation code; decoding of the modulation code input by the processing of the code input step; and a decoding step;
- the modulation code is decoded according to each state transition in the whole coding process of the modulation code and a trellis of the modulation code represented by a path corresponding to one-to-one.
- the program recorded on the program recording medium of the present invention comprises a code input step of inputting a modulation code, and a modulation code of the modulation code input by the processing of the code input step. And a decoding step of performing decoding.
- a decoding step of performing decoding.
- the processing of the decoding step based on a variable length table, based on a trellis of a modulation code represented by a path corresponding to each state transition in the entire coding process of the modulation code. It is characterized in that the modulation code is decoded.
- the program according to the present invention includes a code input step of inputting a modulation code, and a decoding step of decoding the modulation code inputted by the processing of the code insertion step, and in the processing of the decoding step, modulation is performed according to a variable length table. It is characterized in that the modulation code is decoded based on each state transition in the coding process of the code and the trellis of the modulation code represented by a path corresponding to one-to-one.
- the modulation code is decoded based on each state transition in the whole coding process of the modulation code according to the variable length table and a trellis of the modulation code represented by a one-to-one corresponding path.
- the decoding apparatus may be an independent apparatus, may be a block that performs the decoding process of the recording and reproducing apparatus, or may be a block that performs the decoding process of the communication apparatus.
- FIG. 1 is a block diagram showing a configuration example of a conventional recording and reproducing apparatus.
- FIG. 2 is a block diagram showing another configuration example of the conventional recording and reproducing apparatus.
- FIG. 3 is a diagram showing a configuration example of the state transition table of FIG.
- FIG. 4 is a diagram showing a configuration example of a trellis expression corresponding to the state transition table of FIG.
- FIG. 5 is a block diagram showing a configuration example of the recording and reproducing apparatus of the present invention.
- FIG. 6 is a diagram showing a configuration example of the coding table of FIG.
- FIG. 7 is a diagram showing a configuration example of a state transition table in which the coding table of FIG. 6 is expanded.
- FIG. 8 is a diagram showing another configuration example of the state transition table in which the coding table of FIG. 6 is expanded.
- FIG. 9 is a diagram showing still another configuration example of the state transition table in which the encoding table of FIG. 6 is expanded.
- FIG. 10 is a diagram showing a configuration example of trellis representation of the area correspondence table corresponding to the state transition table of FIGS. 7 to 9.
- FIG. 11 is a diagram showing another configuration example of the trellis representation of FIG.
- FIG. 12 is a diagram showing another configuration example of the state transition table in which the coding table of FIG. 6 is expanded. ⁇
- FIG. 13 is a diagram showing another configuration example of the state transition table in which the coding table of FIG. 6 is expanded.
- FIG. 14 is a diagram showing a configuration example of a trellis representation of the area correspondence table corresponding to the state transition table of FIG. 12 and FIG.
- FIG. 15 is a flow chart for explaining the recording process of the recording / reproducing apparatus of FIG.
- FIG. 16 is a flow chart for explaining reproduction processing of the recording and reproduction apparatus of FIG.
- FIG. 17 is a flowchart illustrating the 17 P S I S O decoding process of step S 24 in FIG. 16.
- FIG. 18 is a diagram for explaining comparison of bit error rates between the conventional decoding processing result and the decoding processing result executed based on the trellis representation of FIG.
- FIG. 19 is a block diagram showing another configuration example of the recording and reproducing apparatus of the present invention.
- FIG. 20 is a block diagram showing still another configuration example of the recording and reproducing apparatus of the present invention.
- FIG. 21 is a block diagram showing another configuration example of the recording / reproducing apparatus of FIG.
- FIG. 22 is a diagram showing a configuration example of a state transition table in which a combined trellis representation of a 17 P P code and a P R 12 21 channel is represented by a table.
- FIG. 23 is a diagram showing an example of the configuration of a state transition table in which the combined trellis representation of the 17 P P code and the P R 1 2 2 1 channel is represented by a table. '
- FIG. 24 is a diagram showing a configuration example of a composite trellis expression corresponding to the state transition tables of FIG. 22 and FIG.
- FIG. 25 is a diagram showing an output list of the combined trellis representation of FIG.
- FIG. 26 is a flowchart for explaining reproduction processing of the recording and reproduction apparatus of FIG. 27 shows the result of the decoding process of the recording and reproducing apparatus of FIG. 5, and FIG. It is a figure for demonstrating the comparison of the bit error rate of the number process result.
- FIG. 28 is a diagram showing a configuration example of a state transition table in which a combined trellis representation of 17 PP codes and PR 1 2 1 channels is represented by a table.
- FIG. 29 is a diagram showing a configuration example of a state transition table in which a combined trellis representation of a 17 P P code and a P R 1 2 1 channel is represented by a table.
- FIG. 30 is a block diagram showing another configuration example of the recording and reproducing apparatus of the present invention.
- FIG. 5 shows a configuration example of a recording and reproducing apparatus 151 to which the present invention is applied.
- the recording and reproducing apparatus 1 51 records and reproduces a signal on a recording medium such as an optical disc by using a 1 7 P P (Parity Preserve / Prohibit RMTR (Repeated Minimum Transition Run Length)) code as a modulation code.
- a 1 7 P P Parity Preserve / Prohibit RMTR (Repeated Minimum Transition Run Length) code
- FIG. 5 parts corresponding to the case in FIG. 2 are given the corresponding reference numerals, and the description thereof will be omitted, as appropriate.
- the encoding unit 1 61 of the recording / reproducing apparatus 15 1 in FIG. 5 is replaced by the 1 7 PP encoding unit 1 71 instead of the RLL encoding unit 7 3, and the decoding of the recording / reproducing apparatus 1 5 1
- the part 16 2 is the encoding of the recording / reproducing apparatus 5 1 described above with reference to FIG. 2 except that 1 7 PP-SISO decoding part 1 8 1 is added in place of the RLL-SISO decoding part 8 2. It has the same configuration as that of the unit 61 or the decoding unit 62.
- the interleaver 72 rearranges the order of the signals turbo-coded by the turbo coding unit 71, and outputs the rearranged signals to the 17? -Coding unit 1 7 1.
- the 1 7 ⁇ coding section 1 7 1 has a variable-length 1 7 ⁇ code encoding table 2 0 1 as shown in FIG. 6, and the 1 7 ⁇ code encoding table 2 Based on 0 1, the signal input from interleaver 7 2 is subjected to 1 7 ⁇ coding and output to PR channel 1 2.
- FIG. 6 shows a configuration example of the coding table 201 of 1 7 PP code.
- the coding table 2 0 1 of the 1 7 PP code is configured by a coding table 2 1 1 for normal use and a coding table 2 1 2 for replacement.
- the normal encoding table 2 1 1 is composed of “input bit string”, “output bit string” and “condition” from the left in the figure. This “condition” is a condition that is applied only when the input bit string shown at the bottom is “1 1”.
- the replacement encoding table 2 1 2 is configured by “replacement input bit string”, “replacement output bit string”, and “replacement condition”.
- the coding process of the 1 7 PP code is performed based on the normal coding table 2 1 1.
- the 1 1 PP code encoding process is performed based on the replacement encoding table 2 1 2 only when the output bit string at the next time is “0 1 0” in 1 1 0 1 1 1 ”. ⁇
- the number of bits to be determined is any one of 1 to 4 and is not constant (that is, variable-length), and is encoded. Otherwise, the number of bits to be encoded is unknown.
- the decoding unit 16 2 is configured of a P R -S I S O decoding unit 81, a 17 P P -S I SO decoding unit 1 81, a Din-leaver 83, and a turbo decoding unit 84.
- the PR-SISO decoder 81 developed a state transition table representing an encoding process at each time according to time series from the signal from the PR channel 12 based on the NR ZI encoding and the PR 2 channel.
- Trellis representation is determined, SISO decoding is performed based on the determined NRZ I coding and PR 2 channel trellis representation, and 'SI SO decoded signal (soft information) is decoded by 1 7 PP— SIS ⁇ ⁇ decoding Supply to section 1 8 1
- 1 7 P P-SISO decoding unit 1 8 1 finds a trellis representation of 1 7 PP code based on 1 7 PP code encoding table 2 0 1 possessed by 1 7 PP encoding unit 1 7 1 (generation ), Based on the trellis representation of the 1 7 PP code found, using the BCJR algorithm, S OVA, etc., the signal from the PR-SISO decoder 81 is SI The SO-decoded and SISO-decoded signal is supplied to the deinterleaver 83.
- the PR communication channel 12 and the decoding unit 126 constitute a decoding apparatus or a reproduction apparatus that reproduces and decodes the encoded signal recorded on the recording medium. It goes without saying that it is acceptable.
- FIGS. 7 to 10 show the encoding table 201 of 17 PP code of FIG. 6 expanded so that the transition of the state can be seen.
- Fig. 10 shows an example of the configuration of a trellis expression in which the state transition tables of Fig. 7 to Fig. 9 are expanded in time series.
- FIG. 7 to FIG. 9 “current time status”, “current time input”, “next time status” and “current time output” are shown in order from the right side of the figure.
- the state transition table of FIG. 7 shows the cases of “current state” S 0 to S 2 in order from the upper stage, and the state transition table of FIG. 8 shows “current time state” S 3 to the upper order.
- the case of S 16 is shown, and the state transition table of FIG. 9 shows the cases of “current time state” S 17 to S 20 sequentially from the top. That is, when the 17 P P code encoding table 2 0 1 in FIG. 6 is expanded, the “current time state” is formed of 21 states of states S 0 to states S 20.
- “Current time output” 01 0 is output to be “next time state” S 6 or “current time output” 000 is output to be “next time state” S 9 or “current time output” 0 00 is output to indicate that “next time status” S 7 is to be displayed, and in the case of “current time status” S 3, “current time input” 1 1 is input, “current time “Output” 1 0 1 is output and “next time state” S 2 is entered, or “current time output” 001 is output and “next time state” S 16 is indicated.
- a circle represents a state
- an alternate long and short dash line arrow is an arrow showing a state transition when the input signal is "0 0"
- the dot-and-dash arrow indicates the state transition when the input signal is “0 1”
- the dashed arrow indicates the state transition when the input signal is “1 0”
- the dotted arrow indicates the state transition when the input signal is “1 1” It is an arrow shown.
- the labels attached to each arrow indicate the bit string of the output signal.
- the state transition tables of the 1 7 PP code of FIGS. 7 to 9 and the trellis representation of the 1 7 PP code of FIG. 10 have possible inputs for each state of the encoding process at a certain time.
- the state SO six patterns corresponding to “current time input” 0 0 (one-dot chain arrow in FIG. 10) Time input "0
- One pattern corresponding to 1 is one, and one pattern" current time input "1 0 (the dashed arrow in Fig. 10) is one way.
- FIG. 11 shows another configuration example of the trellis representation of FIG. That is, the trellis representation in FIG. 11 does not represent the entire encoding process at one time, but the trellis representation for one time in FIG. It represents a state transition.
- FIG. 11 for convenience of explanation, although only three times are connected, a trellis expression in which the times from the beginning to the end of the encoding process are actually used is used.
- the thick arrow P 1 indicates that the signal input at state S 0 at time t 1 is “0 0”, and the thick arrow P 2 is input at state S 6 at time t 2.
- Signal is “0 0”
- the thick arrow P 3 indicates the state S 10 at time t 3 This is an arrow indicating a series of state transitions when the input signal is “0 1”. Therefore, the bold arrows P 1 to P 3 indicate that “current time input” 0 0 is input at state S 0 at time t 1 and “current time output” 0 1 0 is output at time t 2.
- next time state S6 is set, and “current time input” 0 0 is input at state S 6 at time t 2, “current time output” 1 0 0 is output, and time t 3 is output.
- “Next time state” S1 0 is set, and at time t3 state S1 0 "current time input” 0 1 is input, “current time output” 1 0 0 is output, time t 4 It shows the state transition to become “next time state” S 1 in.
- the Viterbi decoding algorithm and the BCJR decoding algorithm are described in “GD For ney,“ The Viterbi Al gorithm ” ⁇ Proc. IEEE, Vol. 61, No. 3, 1 9 7 3), or“ Shi R. Bahl As shown in “Others, ⁇ Optimal Decoding, of Linear Codes f or Minimizing Symbology Error Rate”, IEEE Trans. Inform. Theory, Vol.
- Viterbi decoding or B CJ R decoding can be performed even in 17 P P code.
- the coding process of the 1 7 PP code can be expressed by a 21-state trellis representation as shown in FIG. 10, and this trellis representation is performed at successive times as shown in FIG.
- this 21-state trellis representation is large enough to handle both hardware and software.
- the trellis representation of the 1 7 PP code is not limited to the trellis representation shown in FIG. 11; for example, as will be described later with reference to FIG.
- the continuous time is connected as shown in Figure 11 using transformations such as dividing the input and reducing the input pattern (arrows) for each state. It is also possible to make it a squirrel expression.
- FIGS. 12 to 14 show other examples of trellis representations of 17 P P codes.
- Figure 12 and Figure 13 are the codes of 1 7 PP code in Figure 6 expanded so that the transition of the state can be seen, the code for one time between the current time and the next time
- Fig. 14 shows another configuration example of the state transition table representing the transformation process (the example of the configuration of the state transition table in which the 21 states in Figs. 7 to 9 are reduced to 15 states).
- surface of 2 and FIG. 13 according to time series is shown.
- FIG. 12 shows the cases of “current time state” S 0 to S 4 in order from the upper stage
- the state transition table of FIG. 13 shows “current time state” S 5 in order from the upper stage.
- the case of S14 is shown. That is, in FIG. 12 and FIG. 13, the “current time state” is reduced from the 21 state of FIG. 7 to FIG. 9 and configured by the 15 states of the state S 0 to the state S 14. .
- “Current time input” 1 0 is input, “current time output” 0 0 1 is output, indicating that “next time state” S 0 will be established.
- “current time state” SO “current time output” 0 0 0 is output when “current time input” 0 0 is input, or “next time state” S 5 is entered, or “Current time output” 0 1 0 is output to indicate that “Next time state” S 4 is to be displayed
- “current time state” SO “current time input” 1 1 is input , “Current time output” 0 0 0 is output to “next time state” 'S 3 or “current time output” 0 0 1 is output to “next time state” S 1 0' Or is shown.
- “current time state” S 3 if “current time input” 0 0 is input, “current time output” 0 0 0 is output and “next time state” S 5 is entered, or Or “current time output” 0 1 0 is output to indicate whether “next time state” S 4 is to be set, and in the case of “current time state” S 3, “current time input” 1 1 is input When it is output, “current time output” 1 0 1 is output and “next time state” S 2 force or “current time output” 0 0 1 is output and “next time state” S 1 0 Is shown.
- a circle represents a state
- an alternate long and short dash line indicates a state where the input signal is “00”.
- An arrow indicating a transition, and a two-dot dashed line arrow indicates that the input signal is
- the broken arrow indicates the state transition in the case of “01”, the broken arrow indicates the state transition in the case of the input signal strength S “10”, and the dotted arrow indicates the input signal It is an arrow which shows the state transition in the case of being "1 1". Also, the labels attached to each arrow indicate the bit string of the signal to be output.
- the encoding process of the 17 PP code can be expressed also by the trellis representation of the 15 states, and furthermore, the trellis representation of the 15 states is also described above with reference to FIG.
- the trellis representation of the state it is possible to connect at successive times Can. Therefore, as in the example of FIG. 11, since a trellis representation represented by a path corresponding to each state transition of the entire encoding process is obtained one by one, 1 7 PP code Even when using the trellis representation of the state, Viterbi decoding and BCJR decoding can be easily performed.
- the hardware and software are treated more than the trellis representation of 1 states. Cheap.
- step S1 the turbo coding unit 71 turbo-codes the input signal and outputs it to the 17 P P coding unit 1 71 via the interleaver 72. Then, the process proceeds to step S2. Specifically, an external signal is simultaneously input to the element encoding unit 91 and the interleaver 92.
- the element encoding unit 91 generates a parity bit sequence 1 from the input signal and outputs the parity bit sequence 1 to the thinning processing unit 94.
- the interleaver 92 rearranges the order of the signals input simultaneously with the element coding unit 91, and inputs it to the element coding unit 93.
- the element coding unit 93 generates a parity bit string 2 from the signal rearranged by the interleaver 92, and outputs the parity bit sequence 2 to the thinning processing unit 94.
- the decimation processing unit 94 multiplexes the parity bit strings 1 and 2 while decimating, and outputs the multiplexed data to the 17 P P encoding unit 1 71 via the interleaver 72.
- 1 7 PP encoding section 1 7 1 performs 1 7 PP encoding of the signal input through the interleaver 7 2 based on the 1 7 PP code encoding table 2 0 1 in step S 2, Output to PR channel 12 and go to step S3.
- step S3 the recording / reproducing unit 21 performs NRZI (non return to zero inverted) coding on the coded signal input from the 17 PP coding unit 1 7 1 1 and mounts the NRZI coded signal. Recording is performed using the Mark Edge Recording method on the recorded recording medium or the built-in recording medium, and the recording process is terminated.
- NRZI non return to zero inverted
- step S21 the recording / reproducing unit 21 reads out the encoded signal recorded on the recording medium using the PR 2 channel, and supplies the read encoded signal to the equalization processing unit 22. Proceed to 22.
- step S22 the equalization processing unit 22 performs PR equalization using waveform interference on the supplied encoded signal so as to obtain a predetermined target equalization characteristic, and the decoding unit 1 Supply to 62 and proceed to step S23.
- step S23 the PR-SI SO decoding unit 81 generates, from the signal from the PR channel 12 a state transition table representing an encoding process every hour based on the NRZ I encoding and the PR 2 channel. Based on the obtained NRZ I coding and PR 2 channel trellis expression, SI SO decoding is performed using the BC JR algorithm, SOVA, etc., and SI SO decoding is performed. The obtained signal (soft information) is supplied to 1 7 PP—SISO decoder 1 8 1 and the process proceeds to step S 24.
- P P _ s I SO decoding unit 1 8 1 executes I S O decoding processing of ⁇ at step S 24.
- the 17 P S I S O decoding process will be described with reference to the flowchart of FIG. 1 7
- PP—SI SO decoding unit 18 1 inputs the signal (soft information) decoded from the SI—SO from PR—SI SO decoding unit 81 in step S 41 in FIG. move on. 1 7 ⁇ ?
- Decoding section 1 8 1 finds (generates) a trellis representation of 1 7 PP in step S 42 based on the coding table 20 1 of 1 7 PP, and proceeds to step S 43,
- the signal from the PR-SI SO decoding unit 81 is SISO decoded using the Viterbi decoding algorithm or the BCJR decoding algorithm based on the determined 17 PP trellis representation, and the process proceeds to step S44.
- 1 7 PP-SI SO decoding unit 1 81 In step S44, the signal (soft information) subjected to the SI SO decoding is supplied to the turbo decoding unit 84 through the inverter 23. Go back to 25.
- the tarpo decoding unit 84 performs the turbo decoding process in step S 25 of FIG. To go. Specifically, the inter-capture processing unit 1 1 1 of the turbo decoding unit 8 4 interpolates the signal (soft information) from the Din-ta-leaver 8 3, and sends it to the element decoding unit 1 1 2 and the element decoding unit 1 1 4. Output.
- the element decoding unit 1 1 2 2 SISO-decodes the signal from the interpolation processing unit 1 1 1 1 and outputs the reliability information to the element decoding unit 1 1 4 through the interleaver 1 1 3 together with the SISO-decoded signal. Do.
- the element decoding unit 1 1 4 SISO-decodes the signal from the interpolation processing unit 1 1 1 1 using the reliability information from the element decoding unit 1 1 2 2, and is SISO-decoded via the interleaver 1 1 5 Output signal and reliability information to element decoder 1 1 2. Then, after these processes are repeated several times, the element decoding unit 114 performs final determination processing, outputs the result to the subsequent stage not shown, and ends the reproduction processing.
- the trellis representation of the 1 7 PP code is obtained, and the Viterbi decoding algorithm and the BCJR decoding algorithm are used based on the trellis representation, so that the signal is SISO-decoded. 17 PP code and turbo code can be used together. This can improve decoding performance, as shown in FIG.
- FIG. 18 shows the comparison results of the decoding performances of the recording / reproduction device 151 to which the present invention is applied and the conventional recording / reproduction device 1.
- the 17 PP code and the turbo code are used in combination in the recording / reproducing apparatus 15 1 to which the present invention is applied.
- the modulation code of 1 7 PP is used in the conventional recording / reproducing apparatus 1. Only the code is used.
- the vertical axis represents bit error rate
- the horizontal axis represents signal to noise power ratio
- the solid line is the bit error when the present invention is applied
- the dotted line is the conventional one. 1 7 Bit error rate when using only PP code.
- the number of information bits per turbo code is 1 174 bits
- the coding rate of the turbo code is 1 9/2 0, and the number of iterative decodings is 1 0 There is.
- decoding performance can be improved by using the 17 P P code and the turbo code in combination.
- FIG. 19 shows a configuration example of a recording and reproducing apparatus 251 to which the present invention is applied.
- parts corresponding to the case in FIG. 5 are given the corresponding reference numerals, and the description thereof will be omitted, as appropriate.
- the decoding unit 262 of the second embodiment is the encoding unit 1 61 or the decoding unit of the recording / reproducing apparatus 151 described above with reference to FIG. 5 except that the LDPC decoding unit 281 is added instead of the tarpo decoding unit 81. It has the same configuration as part 1 62.
- the encoding unit 261 is configured by an LDP C encoding unit 271, an interleaver 72 and a 17 P P encoding unit 171.
- the LD PC coding unit 2 71 performs LDPC coding on the input signal, and outputs the coded signal to the 1 7 PP coding unit 1 7 1 via the interleaver 72.
- 1 7 PP coding section 1 7 1 has coding table 201 of variable length 1 7 PP code, and based on coding table 20 1 of 1 7 PP code, input from interleaver 72 This signal is output to the PR channel 1 2 by 1 7 PP code.
- the decoding unit 262 is composed of an RP-SISO decoding unit 81, a PP-SISO decoding unit 181, a Din-leaver 83, and an LD PC decoding unit 281.
- the 1 7 PP-SI SO decoding unit 1 8 1 obtains the trellis representation of the 1 7 PP code based on the 1 7 PP code encoding table 201 possessed by the 1 7 PP coding unit 1 7 1.
- the signal from the PR-SI SO decoder 81 is SISO-decoded using the BCJR algorithm or S OV A, etc., and the SI SO-decoded signal (soft information) It is output to the LDPC decoding unit 2 8 1 through D in tally 8 3.
- the LD PC decoding unit 2 8 1 executes back decoding using SPA (Sum-Product Algorithm) based on the signal (soft information) input from 1 7 PP-SISO decoding unit 1 8 1 , The result of execution is output to the latter stage not shown.
- SPA Sud-Product Algorithm
- the trellis representation of the 1 7 PP code is obtained in the 1 7 PP-SISO decoding unit 1 8 1, and based on the trellis representation of the 1 7 PP code, using the BC JR algorithm, SOVA, etc. Since it is simply SISO decoded, it is possible to concatenate LD PC codes instead of the tarpo codes. As described above, the recording / reproducing process may be performed using the LDPC code instead of the turbo code. Also in the case of FIG. 19, the decoding performance is improved as compared with the case of using only the 17 PP code.
- FIG. 20 shows a configuration example of a recording and reproducing apparatus 301 to which the present invention is applied.
- the recording / reproducing apparatus 301 performs signal recording / reproduction on a recording medium such as an optical disc by using the 17 P P code as a modulation code, similarly to the recording / reproducing apparatus 151.
- a recording medium such as an optical disc
- 17 P P code as a modulation code
- the 17 PP coding section 171 of FIG. 5 is added in place of the modulation coding section 11, and the decoding section 31 of the recording / reproducing apparatus 301 is added. 5 except that the PR-SISO decoder 81 in FIG. 5 is added in place of the PR-Viterbi decoder 31 and the 17 PP Viterbi decoder 321 is substituted in place of the modulation decoder 32.
- the PR-SISO decoder 81 in FIG. 5 is added in place of the PR-Viterbi decoder 31 and the 17 PP Viterbi decoder 321 is substituted in place of the modulation decoder 32.
- the 1 7 PP coding unit 1 7 1 has the variable length 1 7 PP code coding table 2 0 1, and based on the 1 7 PP code coding table 20 1, the interleaver 7 PP encoding of the signal input from 2 7 is output to PR channel 1 2.
- the decoding unit 31 1 is configured by a PR-SISO decoding unit 8 1 and 17 PP Viterbi decoding unit 3 21. From the signal from PR channel 12 to PR-SI SO decoding unit 81, based on NR ZI coding and PR 2 channel, the state transition table representing the coding process at each time is developed in time series. Based on the determined NR ZI coding and the trellis representation of the PR 2 channel, SI SO decoding is performed, and the SISO-decoded signal (soft information) is calculated. 17 PP Viterbi Decoding Unit 32 Supply to 1.
- 1 7 PP Viterbi decoding unit 3 2 1 obtains a trellis representation of 1 7 PP code based on 1 7 PP encoding table 20 1 possessed by 1 7 PP encoding unit 1 7 1 7 Based on the trellis representation of the PP code, the PR-SISO decoder 81 performs soft decision Viterbi decoding on the signal, and outputs the soft decision Viterbi decoded signal to the subsequent stage not shown.
- the 1 7 PP code is used as the modulation code, the trellis representation of the 1 7 PP code is obtained, and based on the trellis representation of the obtained 1 7 PP code, Since soft decision Viterbi decoding can be easily performed, higher decoding performance can be achieved than the recording / reproducing apparatus 1 of FIG.
- a trellis representation can be obtained, and the determined trellis representation can be easily used, so that soft decision Viterbi decoding can be performed with a realistic amount of calculation. Decoding performance is improved.
- the state of trellis representation of 1 7 PP code and PR communication as in Non-Patent Document 1 Decoding using Trellis representation integrated with the state of Trellis representation of Path 1 2
- the soft information may be output to the decoding unit of the concatenated turbo code or LD PC code. That is, in FIG. 5 and FIG. 19, even if the PR-SISO decoding unit 8 1 and 1 7 PP-SISO decoding unit 1 8 1 are configured as one block as shown in FIG. Good.
- FIG. 21 shows an example of the configuration of a recording / reproducing apparatus 351 to which the present invention is applied.
- the parts corresponding to the case in FIG. 5 are given the corresponding reference numerals, and the description thereof will be omitted, as appropriate.
- the decoding unit 3 6 1 of the recording / reproducing apparatus 3 5 1 in FIG. 2 1 is replaced with the PR 7 SI 7 decoding unit 8 1 and the 1 7 PP 2 SI 1 decoding unit 18 1.
- the configuration is the same as that of the decoding unit 1 62 of the recording and reproducing apparatus 15 1 described above with reference to FIG. 5 except that the SI SO decoding unit 3 7 1 is added.
- the PR communication path 12 shown in FIG. 21 performs the recording / reproducing process not on the recording / reproducing channel of PR 2 (PR 1 2 1) but on the recording / reproducing channel of PR 1 2 21.
- the PR communication path 12 in FIG. 21 is composed of a recording / reproducing unit 21 and an equalization processing unit 22.
- the recording / reproducing process is performed on the recording / reproducing channel of PR 1 212.
- the recording / reproducing unit 21 performs NRZ I encoding on the encoded signal input from the 1 7 PP encoding unit 1 1 1 and applies the NRZ I encoded signal to a recording medium or a recording medium incorporated therein. Recording is performed using the mark edge recording method.
- the recording / reproducing unit 21 reads out the coded signal recorded on the recording medium by the PR 12 21 channel, and supplies the read coded signal to the equalization processing unit 22.
- the equalization processing unit 22 performs PR equalization using waveform interference on the supplied encoded signal so as to obtain a predetermined target equalization characteristic, and supplies the result to the decoding unit 361. '
- the decoding unit 3 61 is composed of 1 7 PP-PR-SIS ⁇ ⁇ decoding unit 3 7 1, Dinta Lever 8 3, and turbo decoding unit 8 4.
- 1 7 PP-PR-SI SO decoding unit 3 71 developed in chronological order a state transition table representing an encoding process at each time obtained based on NR ZI encoding and PR 1 2 2 1 channel Based on trellis representation and coding table of 1 7 PP code that 1 7 PP coding section 1 7 1 has 2 0 1
- the BCJR algorithm is based on a combined trellis representation (hereinafter referred to as a combined trellis representation of 17 PP and PR 12 21 channels (channels)) in which the trellis representation of the 1 7 PP code obtained is integrated.
- the signal from the PR channel 12 is SISO-decoded using S-OVA or the like, and the signal (soft information) subjected to SISO-decoding is output to the tarpo decoder 84 via the de
- this synthetic trellis representation is the trellis representation of the 1 7 PP code consisting of the 15 states described above with reference to FIGS. 1 2 to 4 and, for example, the PR channel 12 of FIG.
- the trellis representation of the 6 states PR 1 22 1 1 channel which is not shown, used by the PR-SI SO decoding unit 81 in FIG. United) and expressed.
- FIG. 24 shows an example of construction of a synthetic trellis representation in which the state transition tables of FIG. 2 2 and FIG. 3 3 are expanded along time series
- FIG. 25 shows the output of the synthetic trellis representation of FIG. It shows a list.
- each state S on the left or right side in the figure represents the state of the 1 7 PP code
- the symbol s in the circle represents the state of the PR 1 2 2 1 channel
- the two-dot chain arrow indicates the state when the input signal is “01”.
- the dashed arrow indicates the state transition
- the dashed arrow indicates the state transition when the input signal is “1 0”
- the dotted arrow indicates the input signal is “1 1”
- the signals output in the synthetic trellis representation of FIG. 24 are shown in FIG. 25 for the convenience of description.
- FIG. 25 shows a list of output signals in the synthetic trellis representation of FIG.
- the symbol s in a circle represents the state of the PR 1 2 2 1 channel
- the labels attached to each arrow represent each of the PR 1 2 2 1 channels of the synthetic trellis expression of FIG. It represents a signal output when transitioning from one state to another.
- symbols in parentheses on the left side indicate the states of the three registers of the PR communication path 1 2 in each state of the PR 1 212 channel.
- the three registers of PR channel 1 2 are (one, one, one) when the PR 1 2 2 1 channel is in the state s 0, and the PR 1 2 2 1 channel is in the state s 1 If it is in the (+,-,-) state and the PR 1 2 2 1 channel is in the state s 2, it is in the (+, +,-) state, and the PR 1 2 2 1 channel is in the state s 3 If the state is (—, —, +) and PR 1 2 2 1 is in state s 4, then it is in the state (one, +, +), and PR 1 2 2 1 is in state s In the case of 5, it is shown that the state is (+, +, +).
- the current 1 7 PP code state is S 0, and PR 1 2 2 If the state of one channel is si (that is, the state of the register of PR channel 12 is (ten, one, one)), 0, 2, 0 are output when 0 1 is input. It is shown that the state of the 1 7 PP code at the next time becomes S 1 and the state of the PR 1 2 2 1 channel becomes s 3. When 1 0 is input, 0, 4, and 4 are output. Then, it is shown that the state of the 1 7 PP code of the next time becomes S 0 and the state of the PR 1 2 2 1 channel becomes s 4.
- the current state of the 1 7 PP code is SO and the state of the PR 1 2 2 1 channel is s 1, when 1 1 is input, 0, 4, 6 are output and the next time
- the state of the 1 7 PP code becomes S 3 and the state of the PR 1 2 2 1 channel becomes s 5 or 0, 4, 4 are output, and the state of the 1 7 PP code of the next time It is shown that the state of the PR 1 2 2 1 channel becomes s 4 when S 1 0 is obtained.
- the current state of the 1 7 PP code is S 1 and the state of the PR 1 2 2 1 channel is s 0, when 0 0 is input, one 1, one 6, one 6 is output.
- the current 1 7 PP code state is S 1 and the PR 1 2 2 1 channel state is s 0, when 1 1 is input, one 4, 0, 2 is output and The next time 1 7 PP code state becomes S 2 and PR 1 2 2 1 channel state becomes s 4, or one 6, 6 and 4 are output and the next It is shown that the state of the 1 1 7 PP code of the time becomes S 1 0 and the state of the PR 1 2 2 1 channel becomes s 1.
- the current state of the 1 7 PP code is S 1 and the state of the PR 1 2 2 1 channel is s 2, when 1 1 is input, 2, 0,-2 is output, and the next The time of 1 1 PP code state becomes S 2 and PR 1 2 2 1 channel state becomes s 1 or 4, 6, 4 are output, and the next time 1 7 PP It is shown that the state of the code becomes S 1 0 and the state of the PR 1 2 2 1 channel becomes s 4.
- the state of PR channel 1 2 register is (one, one, +) state
- 0 When 1 is input, 1 4, 1 4, 0 are output, and the state of the 17 PP code of the next time becomes S 1 and the state of PR 1 221 channel becomes s 2 is indicated.
- 1 0 When 1 0 is input, 1 1 4 1 6 1 4 is output, and the state of 1 7 PP code at the next time becomes SO, and the state of PR 1 221 channel may become s 1 It is shown.
- the current 1 7 PP code state is S 1 and the PR 1 22 1 channel state is s 3
- one four one one 6 – 6 is output and the next
- the state of the time 1 1 PP code becomes S 5 and the state of the PR 1 221 channel becomes s 0 ⁇ or 1 4 1 4 0 is output and 1 7 of the next time It is shown that the state of the PP code becomes S 4 and the state of the PR 1 22 1 channel becomes s 2.
- the PR 1 221 channel state is s 1 (ie, the state of the PR channel 1 2 register is (+, 1, _)) 0
- the state of the 1 7 PP code at the next time becomes S 1 1 and it is shown that the state of the PR 1 22 1 channel becomes s 3 , 10 are output, 0, 4, 4 are output, and the state of the 1 7 PP code at the next time is S
- the state of the PR 1 221 channel becomes s 4 by becoming 0. If the current 1 7 PP code state is S 2 and the PR 1 22 1 channel state is s 1 and 00 is input, 0, 4, 6 are output and the next time The state of the 1 7 PP code becomes S 5 and the state of the PR 1 221 channel becomes s 5 or 0, 2, 0 is output, and the state of the 1 7 PP code of the next time is S 4 .
- the state of channel 221 is s3. If the current 1 7 PP code state is S 2 and the PR 1 221 channel state is s 1 and 1 1 is input, 0, 4, 6 will be output and the next time The state of 1 PP code becomes S 3 and the state of PR 1 2 2 1 channel becomes s 5 ⁇ or 0, 4, 4 are output, and the state of 1 7 PP code at the next time Becomes S 10 and the state of PR 1 22 1 channel becomes s 4.
- the current state of the 1 7 PP code is S 2 and the state of the PR 1 2 2 1 channel is s 4, when 0 0 is input, 0, 1, 4 and 1 6 are output, The state of the 1 7 PP code at the next time becomes S 5 and the state of the PR 1 2 2 1 channel becomes s 0 or 0, 2 and 0 are output, and 1 7 of the next time It is shown that the state of the PP code becomes S 4 and the state of the PR 1 2 2 1 channel becomes s 2.
- the current 1 7 PP code state is S 2 and the PR 1 2 2 1 channel state is s 4, when 1 1 is input, 0, ⁇ 4 and 1 6 are output, The state of 1 PP code of next time becomes S 3 and the state of PR 1 2 2 1 channel becomes s 0, or 0, 1 or 4 is output, and 1 of the next time 7 It is shown that the state of the PP code becomes S 1 0 and the state of the PR 1 2 2 1 channel becomes s 1.
- the state of the PR 1 2 2 1 channel is s 0 (ie, the state of the PR channel 1 2 register is (one, one, one))
- the state of the 1 7 PP code of the next time becomes S 1 1
- the state of the PR 1 2 2 1 channel becomes s 2
- 1 0 is input, 1 6, 1 6 _ 4 is output, and the state of 1 7 PP code at the next time becomes S 0, and PR 1 2 2 1 channel
- the state is shown to be s 1.
- the current state of the 1 7 PP code is S 3 and the state of the PR 1 2 2 1 channel is s 0, when 1 1 is input, one 4, 0, 2 is output and the next The state of the 1 PP code at time 7 becomes S 2 and the state of PR 1 2 2 1 channel becomes s 4 or one 6,-6-4 is output, and the next time 1 7 It is shown that the state of the PP code becomes S 1 0 and the state of the PR 1 2 2 1 channel becomes s 1.
- the current 1 7 PP code status is S 3 and the PR 1 2 2 1 channel status is s 5 (Ie, when the register of PR channel 12 is (+, +, +) state), when 0 1 is input, 6, 4 and 0 are output and 1 7 of the next time It is shown that the state of the PP code becomes S 1 1 and the state of the PR 1 2 2 1 channel becomes s 3; when 1 0 is input, 6, 6, 4 are output and the next time It is shown that the state of the 1 PP code of 1 7 becomes S 0 and the state of the PR 1 2 2 1 channel becomes s 4.
- the current state of the 1 7 PP code is S 3 and the state of the PR 1 2 2 1 channel is s 5, when 0 0 is input, 6, 6, 6 are output, and the next The state of the time 1 7 PP code becomes S 5 and the state of the PR 1 2 2 1 channel becomes s 5 or 6, 4, 0 is output, and the 1 7 PP code of the next time It is shown that the state becomes S 4 and the state of the PR 1 2 2 1 channel becomes s 3.
- the current 1 7 PP code state is S 4 and PR 1 2 2 1 bits
- the channel state is s 2 (that is, the state of the register of PR channel 12 is (+, +, one))
- the state of the 1 7 PP code of the next time becomes S 6 and the state of the PR 1 2 2 1 channel becomes s 0 when the next time becomes 0, 4, 6, 6 Is output
- the state of the 1 PP code of the next time becomes S 1 and the state of the PR 1 2 2 1 channel becomes s 5 at the next time, and when 1 1 is input, 2, It is shown that 0,-4 are output, and the state of the 1 7 PP code of the next time becomes S 1 and the state of the PR 1 2 2 1 channel becomes s 0.
- the current state of the 1 7 PP code is S 4 and the state of the PR 1 2 2 1 channel is s 3 (ie, if the registers of PR channel 1 2 are (one, one, +) state)
- the state of the PP code becomes S 6 and the state of PR 1.2 2 1 channel becomes s 5; when 1 0 is input, 1 4 1 1 6 1 is output and the next It is shown that the state of the time 1 PP code becomes S 1 and the state of the PR 1 2 2 1 channel becomes s 0, and when 1 1 is input, one 2, 0, 4 are output. It is shown that the state of the 1 7 PP code at the next time is S 1 and the state of the PR 1 2 2 1 channel is s 5.
- the current state of the 1 7 PP code is S 5 and the state of the PR 1 2 2 1 channel is s 5 (ie, the state of the register of PR channel 1 2 is (+, +, +))
- the state of the register of PR channel 1 2 is (+, +, +)
- 0 0 is input, 4, 0, 4 are output, and the state of the 1 7 PP code at the next time becomes S 7 and the state of the PR 1 2 2 1 channel is s 0
- 0 1 is input, 4, 0, 14 are output, and the state of the 1 7 PP code at the next time becomes S 1 and the state of PR 1 2 2 1 channel Is shown to be s 0.
- the current state of the 1 7 PP code is S 6 and the state of the PR 1 2 2 1 channel is s 5 (ie, PR channel 1 2 When the register is (+, +, +)), when 0 1 is input, 4, 0, -4 are output, and the state of the 1 7 PP code at the next time is S 1
- the PR 1 2 2 1 channel state is indicated to be s 0, and when 00 is input, 4, 0 and 1 4 are output, and the state of the 1 7 PP code at the next time is S
- the state of PR 1 2 2 1 channel becomes s 0, or 6, 6, 6 is output, and the state of the 1 7 PP code of the next time becomes S 9, and becomes PR It is shown that the state of the 1 2 2 1 channel is s 5.
- the state of the register of PR channel 1 2 is (1, 1, 1)
- the state of the register of PR channel 1 2 is (1, 1, 1)
- the state of the 1 7 PP code of the next time becomes S 1 and the state of the PR 1 2 2 1 channel becomes s 5
- the state of the 1 7 PP code at the next time becomes S 8 and the state of the PR 1 2 2 1 channel is s That the power to be 5 ⁇ or 1 6,-6, 1 6 is output, the state of the 1 7 PP code at the next time becomes S 9 and the state of the PR 1 2 2 1 channel becomes s 0 It is shown.
- the current 1 7 PP code status is S 10 and the PR 1 22 1 channel status is s 1 (ie, when the register of PR channel 12 is (+,-,-) state), when 0 1 is input, 0, 4, 6 are output and 1 of the next time 7
- the state of the PP code becomes S 1 2 and the state of the PR 1 2 2 1 channel becomes s 5.
- the current state of the 1 7 PP code is S 1 0 and the state of the PR 1 2 2 1 channel is s 4 (ie, the state of the register of PR channel 1 2 is (—, +, +))
- 0 1 is input, 0, 1 4 and 1 6 are output, and the state of 1 7 PP code at the next time becomes S 1 2 and the state of PR 1 22 1 channel becomes s 0. It has been shown that
- the state of the P R 1 2 2 1 channel becomes s 1. If the current state of the 1 7 PP code is S 1 1 and the state of the PR 1 2 2 1 channel is s 2, when 00 is input, 4, 6, 6 are output and The state of 1 7 PP code of time becomes S 5 and the state of PR 1 2 2 1 channel becomes s 5 ⁇ or 4, 4, 0 is output, 1 7 PP code of the next time Status becomes S4, PR 1
- the current 1 7 PP code state is S 1 1 and the 1 state of PR 1 2 2 1 channel is s
- the current 1 7 PP code state is S 1 1 and the PR 1 2 2 1 channel state is s 3
- the state of the 1 PP code at the next time becomes S 5 and the state of the PR 1 2 2 1 channel becomes s 0, or one four, one, four, zero are output, and the next time 1 7 It is shown that the state of the PP code becomes S 4 and the state of the PR 1 2 2 1 channel becomes s 2.
- the current state of the 1 7 PP code is S 1 3 and the state of the PR 1 2 2 1 channel is s 1 (ie, the state of the register of PR channel 1 2 is (+, —, —))
- the state of the 1 7 PP code at the next time becomes SO
- the state of the PR 1 2 2 1 channel may become s 4
- the state of the 1 7 PP code at the next time becomes S 5 and the state of the PR 1 2 2 1 channel becomes s 5 It is shown.
- the current state of the 1 7 PP code is S 1 3 and the state of the PR 1 2 2 1 channel is s 1, when 1 1 is input, 0, 4, 6 are output.
- the state of 1 PP code of next time becomes S 3 and the state of PR 1 2 2 1 channel becomes s 5 ⁇ or 0, 4, 4 are output, and 1 7 of next time It is shown that the state of the PP code becomes S 10 and the state of the PR 12 21 channel becomes s 4.
- the current state of the 1 7 PP code is S 14 and the state of the PR 1 22 1 channel is s 5 (ie, the state of the register of PR channel 12 is (+, +, +))
- the state of the 1 7 PP code at the next time becomes S 1 and the state of the PR 1 22 1 channel becomes s 3
- the state of the 17 PP code at the next time becomes S 4, indicating that the state of the PR 1 221 channel becomes s 3
- the combined trellis representation of the 1 7 PP code and the PR 1 22 1 channel is (17 PP code state, PR 1 22 1 channel state in the order shown in the state transition tables of FIG.
- the trellis representation can be configured by 32 states of (S14, s5), and this trellis representation is also connected at successive times in the same manner as the 21-state trellis representation described above with reference to FIG.
- a trellis representation can be obtained which is expressed by paths corresponding to each state transition of the entire encoding process and one-on-one. Therefore, it is possible to easily perform Viterbi decoding and BC J R decoding.
- the trellis representation of the 17 PP code is composed of 15 states
- the trellis representation of the NRZ I coded and PR 1 221 channels is composed of 6 states. If the trellis representation of the 1 7 PP code and the trellis representation of the PR 1 22 1 channel are simply combined, the 90 states have the trellis representation of the 1 7 PP code, N RZ I encoding, and so on. By combining the trellis representation of the PR1 221 channel, it is reduced to 32 states. That is, although all the state transitions have been calculated in the PR-decoding unit 81 in FIG.
- the recording / reproducing unit 21 reads out the encoded signal recorded on the recording medium by the PR 1 22 1 channel in step S 1 2 1, and outputs the read encoded signal to the equalization processing unit 22. Supply and go to step S122.
- the equalization processing unit 22 performs PR equalization using waveform interference to obtain a predetermined target equalization characteristic with respect to the supplied encoded signal in step S 122, and then performs a decoding unit 36 1 Supply to the Go to S 1 2 3
- 1 7 P P P P-P R-S I S O decoding unit 3 71 receives a signal from PR communication channel 12 in step S 1 2 3 and proceeds to step S 1 24.
- 1 7 PP-PR-SI SO decoding unit 371 in step S124 based on NR ZI coding and PR 2 channel, state transition table representing coding process every time according to time series 1 7 PP and 17 7 are a combination of the expanded trellis representation and the 1 7 PP code trellis representation obtained based on the 1 7 PP code encoding table 201 of 1 7 PP encoding section 1 7 1
- the PR 1 22 2 1 chiane is determined using a synthetic trellis representation, for example, using the Viterbi decoding algorithm or the BCJR decoding algorithm.
- the signal from channel 12 is SISO decoded, and the process proceeds to step S125.
- PP—PR—SISO decoding unit 3 71 supplies the signal (soft information) decoded SIS in step S 125 to turbo decoding unit 84 via Dinta Lever 83, and step S 125 Proceed to 1 2 6
- the turbo decoding unit 84 executes turbo decoding processing in step S 1 2 6. It is to be noted that since this turbo decoding process is the same as step S 25 shown in FIG. 16, the detailed description thereof will be omitted since it is repeated.
- the synthesized trellis representation of 17 PP and PR 12 21 channels is determined, and the Viterbi decoding algorithm and the BCJR decoding algorithm are calculated based on the synthesized trellis representation of 17 PP and PR 12 21 channels. Used to SISO-decode the signal. As a result, as shown in FIG. 27, the decoding performance can be improved. '
- FIG. 27 shows the comparison results of the decoding performances of the recording / reproduction device 15 1 of FIG. 5 and the recording / reproduction device 35 1 of FIG. 21.
- the decoding process of the recording / reproducing apparatus 151 is executed by using the trellis representation of the 17 PP code in combination with the trellis representation of the NRZ I coding and PR 12 21 channels.
- the decoding process of the recording / reproducing device 351 is a combined trellis table of 17 PP codes and PR 12 21 channels. It is executed using the current.
- the vertical axis represents bit error rate
- the horizontal axis represents signal to noise power ratio
- the solid line represents the trellis representation of the NRZ I coding and PR 1 221 channel
- the dotted line is a combined trellis representation of the 1 7 PP code and the PR 1 221 channel.
- This is a bit error rate representing the decoding performance of the recording and reproducing apparatus 3 5 1 on which the decoding process is performed based on the above.
- the number of information bits per turbo code is 1 1 74 bits
- the coding rate of the turbo code is 1 9 Z 20
- the number of times of iterative decoding is 10 times.
- the signal-to-noise power ratio of the recording / reproducing apparatus 1 51 in FIG. 5 is approximately 10. 7 (d B).
- the signal-to-noise power ratio of the recording / reproducing device 351 of Fig. 2 1 is shown to be approximately 10. 2 (d B).
- 1 7 PP By using the combined trellis representation of the code and the PR 1 221 channel, the NR ZI coding and the trellis representation of the 1 channel of PR 1 22 and the trellis representation of the 1 7 PP code are combined more than 0 1 0 It can be seen that a coding gain of about 5 (dB) can be obtained.
- the PR-SISO decoding unit 81 and the PP-SISO decoding unit 181 are one block (17 PP-PR-SI SO decoding unit 371 as shown in FIG. 21).
- 17 PP code and the combined trellis representation of 1 channel with 1 PR code it becomes impossible to calculate the state transition that can not be achieved by the output of 1 7 PP code or the same result. Therefore, arithmetic processing is reduced, hardware and software become more manageable, and optimal decoding is performed. This further improves the decoding performance than decoding the signal using the trellis representation of the PR 1 221 channel and the trellis representation of the 17 PP code, respectively.
- the recording / reproducing process is performed in the recording / reproducing channel of the PR 12 21 in the PR communication channel 12 1 17 PP-PR-SISO decoder 3 7 It has been described in 1 that SI SO decoding processing is performed based on the combined trellis representation of the 1 7 PP code and the PR 1 2 2 1 channel.
- the recording and reproduction channel of the PR channel 1 2 is PR 1 2 2 Not limited to 1 channel.
- the 17 PP-PR-SIS ⁇ decoding unit 3 7 1 The SISO decoding process is performed based on the combined trellis representation of the 17 PP code and the PR 1 2 1 channel.
- the combined trellis representation of the 17 P P code and P R 1 2 1 channel will be described with reference to FIGS. 2 8 and 2 9.
- the combined trellis representation of the 1 7 PP code and the PR 1 2 1 channel is the trellis representation of the 1 7 PP code consisting of the 15 states described above with reference to FIGS. 12 to 14 and, for example, FIG.
- the PR channel 12 performs the recording / reproducing process on the recording / reproducing channel of the PR 1 21
- the PR—SISO decoding unit 81 shown in FIG.
- the trellis representation of the channel is synthesized and represented.
- Figures 28 and 29 show a state transition table in which the combined trellis representation of the 17 P P code and P R 1 2 1 channel is shown in the table.
- the combined trellis representation of the 1 7 PP code and the PR 1 '2 1 channel is also similar to the composite trellis representation of the 1 7 PP code and the PR 1 2 2 1 channel described with reference to FIG. 24 and FIG. Although it is shown in, it is omitted for the convenience of explanation.
- the state of the PP code becomes S 0 and the state of the PR 1 2 1 channel becomes s 1.
- the current 1 7 PP code state is S 0 and the state of PR 1 2 1 channel If the status is s 2 and 0 0 is input, then 1, 2 – 4 and 4 are output and the status of the 1 7 PP code at the next time becomes S 5 and PR 1 2 1
- the state of the channel becomes s 0 ⁇ or 1 2 1 2 2 is output, and the state of the 1 7 PP code of the next time becomes S 4 and the state of the PR 1 2 1 channel is s It is shown to be three.
- the current 1 7 PP code state is S 0 and the PR 1 2 1 channel state is s 2
- the state of the 1 7 PP code changes to S 3
- the state of the PR 1 2 1 channel changes to s 0, or one, two, four, and one two are output, and the next It is shown that the state of the 1 1 7 PP code of time becomes S 1 0 and the state of the PR 1 2 1 channel becomes s 1.
- the current state of the 1 7 PP code is S 1 and the state of the PR 1 2 1 channel is s 0, when 0 1 is input, one four one two 2 is output, and the next It is shown that the state of the 1 PP code at time 1 becomes S 1 and the state of the PR 1 2 1 channel becomes s 3; when 1 0 is input, one four, one four, one two are output It is shown that the state of the 1 7 PP code at the next time becomes S 0 and the state of the PR 1 2 1 channel becomes s 1 at the next time.
- the current 1 7 PP code state is S 1 and the PR 1 2 1 channel state is s 3, when 00 is input, 4, 4 and 4 are output, and the next time
- the state of the 1 7 'PP code becomes S 5 and the state of the PR 1 2 1 channel becomes s 3 or 4, 2, 2 are output, and the 1 7 PP code of the next time It is shown that the state becomes S 4 and the state of the PR 1 2 1 channel becomes s 0.
- the current 1 7 PP code state is S 2 and the PR 1 2 1 channel state is s 2, and 0 1 is input,-2,-2, 2 are output and It is shown that the state of the 1 PP code at time 1 becomes S 1 1 and the state of the PR 1 21 channel becomes s 3; when 10 is input, 1 2 1 1 4 1 2 are output. It is shown that the state of the 1 7 PP code at the next time becomes S 0 and the state of the PR 1 2 1 channel becomes s 1 at the next time.
- the current 1 7 PP code state is S 2 and the PR 1 21 channel state is s 2, when 1 1 is input, one, two, four and one four are output, The state of the 1 PP code at the next time becomes S 3 and the state of the PR 1 2 1 channel becomes s 0, or — 2, 1, 4 and 1 are output, and the next time It is shown that the state of the PP code of 1 7 becomes S 1 0 and the state of the PR 1 2 '1 channel becomes s 1.
- the current 1 7 PP code state is S 3 and the PR 1 2 1 channel state is s 0, and 0 1 is input, -4,-2, 2 are output, and It is indicated that the state of the 1 PP code at time 1 becomes S 1 1 and the state of the PR 1 21 channel becomes s 3; when 10 is input, one four, one four, one two are output. It is shown that the state of the 1 7 PP code at the next time becomes S 0 and the state of the PR 1 2 1 channel becomes s 1 at the next time. If the current state of the 1 7 PP code is S 3 and the state of the PR 1 2 1 channel is s O, when 00 is input, one 4, 4 and 4 are output.
- the state of the 1 PP code at the next time becomes S 5 and the state of the PR 1 2 1 channel becomes s 0 ⁇ or 1 4 1 2 2 are output, 1 of the next time 7 It is shown that the state of the PP code becomes S 4 and the state of the PR 1 2 1 channel becomes s 3. If the current 1 7 PP code state is S 3 and the PR 1 21 channel state is s 0, and 1 1 is input, -2, 2 and 2 are output and the next 1 7 P of the time The state of P code becomes S 2 and the state of PR 1 2 1 channel becomes s 2 or-4,-4,-2 is output, and the state of 1 7 PP code of the next time is It is shown that the state of the PR 1 2 1 channel becomes s 1 by becoming S 1 0.
- the current state of the 1 7 PP code is S 3 and the state of the PR 1 2 1 channel is s 3, when 0 1 is input, 4, 2, and 2 are output and the next It is shown that the time of 1 7 PP code state is S 1 1 and the state of PR 1 2 1 channel is s 0. When 1 0 is input, 4, 4 and 2 are output, It is shown that the state of the 1 7 PP code at the next time becomes S 0 and the state of the PR 1 2 1 channel becomes s 2. If the current 1 7 PP code state is S 3 and the PR 1 2 1 channel state is s 3, when 0 0 is input, 4, 4 and 4 are output and the next time 1 of
- the state of the PP code becomes S 6 and the state of the PR 1 2 1 channel becomes s 3, and when 1 0 is input, one, four, four and one four are output and the next It is shown that the time of 1 1 7 PP code becomes S 1 and the state of PR 1 2 1 channel becomes s 0, and when 1 1 is input, one 2, 2 and 4 are output, It is shown that the state of the 1 7 PP code at the next time is S 1 and the state of the PR 1 2 1 channel is s 3.
- the current 1 7 PP code status is S 4 and the PR 1 2 1 channel status is s 3
- the state of the 1 7 PP code at the next time becomes S 6 and the state of the PR 1 2 1 channel becomes sO
- the state of the 1 7 PP code at the next time becomes S 1 and the state of PR 1 2 1 channel is s 3
- 1 1 is input, 2 1 2 4 1 are output, and the state of the 1 7 PP code at the next time becomes S 1 and the state of PR 1 2 1 channel Is shown to be s 0.
- the state of the PP code becomes S 1 and the state of the PR 1 2 1 channel becomes s 3, and when 00 is input, one 2, 2 and 4 are output and one of the following times 7
- the state of the PP code becomes S 8 and the state of the PR 1 2 1 channel becomes s 3 or 1, 1, 4 and 1 4 are output and 1 7 PP code of the next time
- the state becomes S 9 and the state of the PR 1 2 1 channel becomes s 0.
- the current 1 7 PP code state is S 7 and the PR 1 2 1 channel state is s 0, when 1 1 is input, one 2, 2 and 4 are output and the next It is shown that the time of 1 7 PP code state is S 1 and the state of PR 1 2 1 channel is s 3; when 1 0 is input, ⁇ 2, 2 and 4 are output, The state of the 1 7 PP code at the next time becomes S 8 and the state of the PR 1 2 1 channel becomes s 3 or or one, four, four and one are output, and the next time 1 7 It is shown that the state of the PP code becomes S 9 and the state of the PR 1 2 1 channel becomes s 0.
- the current 1 7 PP code state is S 8 and the PR 1 2 1 channel state is s 0, when 0 0 is input, one 2, 2 and 4 are output, and the next It is shown that the state of the 1 1 7 PP code of the time becomes S 1 and the state of the PR 1 2 1 channel becomes s 3 '. If the current 1 7 PP code state is S 8 and the PR 1 2 1 channel state is s 3, when 0 0 is input, 2 1 2 4 are output, It is shown that the state of the 1 7 PP code of the next time becomes S 1 and the state of the PR 1 2 1 channel becomes s 0.
- the current 1 ⁇ PP code status is S 9 and the PR 1 2 1 channel status is s 0
- the state of the 1 7 PP code at the next time becomes S 1 and the state of the PR 1 2 1 channel is s. It is shown that it becomes 3 and when 1 0 is input, -4, 1 and 4-2 are output, and the state of the 1 7 PP code at the next time becomes SO, and PR 1 2 1 channel It is shown that the state is s 1.
- the current 1 7 PP code state is S 9 and the PR 1 21 channel state is s 0, and 1 1 is input,-2, 2 and 2 are output and the next The state of 1 7 PP code of time becomes S 2 and the state of PR 1 21 channel becomes s 2 or 1, 1, 4 and 1 2 are output and 1 7 PP of the next time It is shown that the state of the code becomes S 1 0 and the state of the PR 1 2 1 channel becomes s 1. If the current 1 7 PP code state is S 9 and the PR 1 21 channel state is s 3, when 0 1 is input, 4, 2, 1 2 are output and the next time It is shown that the state of 1 7 PP code becomes S 1 and the state of PR 1 2 1 channel becomes s 0.
- the current 1 7 PP code state is S 1 0 and PR 1 21 channel state is s 1, when 0 1 is input, 2, 2 and 4 are output and the next time It is shown that the state of the PP code of 1 7 becomes S 1 2 and the state of the PR 1 2 1 channel becomes s 3. If the current state of the 1 7 PP code is S 1 0 and the state of PR 1 2 1 Cyanene is s 2, when 0 1 is input, one, two, four, one four are output. At the next time, it is shown that the state of the 1 7 PP code becomes S 1 2 and the state of the PR 1 21 channel becomes s 0.
- the current 1 7 PP code status is S 1 1 and the PR 1 21 channel status is s 0 BO
- the current 1 7 PP code state is S 1 1 and the PR 1 2 1 channel state is s 0, when 00 is input, one four one four four one is output,
- the state of 1 7 PP code at the next time becomes S 5 and the state of PR 1 2 1 channel becomes s 0, or-4,-2, 2 is output, and 1 of the next time 7 It is shown that the state of the PP code becomes S 4 and the state of the PR 1 2 1 channel becomes s 3.
- the current 1 7 PP code state is S 1 1 and the P 1 2 1 channel state is s 3, when 0 0 is input, 4, 4 and 4 are output, and The state of 1 7 PP code of time becomes S 5 and PR 1 2 1 channel state power becomes S s 3 or 4, 2, 2 are output, 1 7 PP code of the next time It is shown that the state of S becomes S 4 and the state of the PR 1 2 1 channel becomes s 0. If the current state of the 1 7 PP code is S 1 2 and the condition of the PR 1 2 1 channel is s 0, when 1 1 is input, 1 1, 1 4, 1 4 are output.
- the state of the 1 7 PP code at the next time becomes S 1 4 and the state of the PR 1 2 1 channel becomes s 0 at the next time. If the current 1 7 PP code state is S 1 2 and the PR 1 2 1 channel state is s 3, when 1 1 is input, 4, 4 and 4 are output, and the next It is shown that the state of the 1 7 PP code at time 1 becomes S 1 4 and the state of the PR 1 2 1 channel becomes s 3.
- the current state of the 1 7 PP code is S 1 3 and the state of the PR 1 2 1 channel is s 2, when 1 0 is input, ⁇ 2, ⁇ 4, and 1 2 are output.
- the state of the 1 7 PP code becomes S 0 and the state of the PR 1 2 1 channel becomes s 1; when 0 0 is input, one, two, four, one It is shown that 4 is output, and the state of the 1 7 PP code of the next time becomes S 5 and the state of the PR 1 2 1 channel becomes s 0 '.
- the current 1 7 PP code state is S 1 3 and PR 1 2 1 channel state is s 2 and 1 1 is input,-2-4-1 4 are output.
- the state of the 1 PP code at the next time becomes S 3, and the state of the PR 1 2 1 channel becomes s 0, or — 2, 4 or 1 2 is output, and the next time 1 7 It is shown that the state of the PP code becomes S 1 0 and the state of the PR 1 2 1 channel becomes s 1.
- the combined trellis representation of the 1 7 PP code and the PR 1 2 1 channel is in the order shown in the state transition tables of FIG. 2 8 and FIG. 2 9 ((1 7 PP code state, PR 1 2 1 channel State) force (S 0, s 1), (S 0, s 2), (S l, s O), (S 1, s 3), (S 2, sl), (S 2, s 2) , (S 3, s O), (S 3, s 3), (S 4, s 0), (S 4, s 3), (S 5, s 0), (S 5, s 3), ( S 6, s 0), (S 6, s 3), (S 7, s 0), (S 7, s 3), (S 8, s 0), (S 8, s 3), (S 9) , S 0), (S 9, s 3), (S 10, s 1), (S 10, s 2), (S 11, s 0), (S 11, s 3), ( S 1 2, s 0), (S 1 2,
- This trellis representation can also be constructed by the three states of (S 1 3, s 2), (S 1 4, s 0), and (S 1 4, s 3). Similarly to the 21 1 state trellis representation described above, by linking at successive times, each state transition of the entire encoding process corresponds one to one as in the example of FIG. A trellis expression expressed by a path is required. Therefore, it is possible to easily perform Viterbi decoding and B C J R decoding.
- the trellis representation of the 1 7 PP code consists of 15 states, NRZ I
- the trellis representation of the channelization and PR 1 2 2 1 channels consists of 4 states. If the trellis representation of the 1 7 PP code and the trellis representation of the PR 1 2 2 1 channel are simply combined, the states with 6 0 states are the trellis representation of the 1 7 PP code, NRZI coding and PR
- each decoding unit is described to obtain a trellis expression when performing SI so decoding, but of course, it is possible to perform SIS ⁇ decoding based on a trellis expression obtained in advance. Good.
- the encoding and decoding processes are performed in the recording and reproducing apparatus.
- the present invention is not limited to the case of performing the recording and reproducing processes, and the encoding through the network may be performed.
- the present invention can also be applied to encoding processing and decoding processing performed in a transmission system that transmits a signal.
- the series of processes described above can be performed not only by hardware but also by software.
- the recording and reproducing apparatus 15 of FIG. 5 the recording and reproducing apparatus 25 of FIG. 19, the recording and reproducing apparatus 301 of FIG. 20, and the recording and reproducing apparatus 351 of FIG.
- FIG 3 0 This is a central processing unit (C PU) 4 1 1 ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ , program stored in ROM (read only memory) 4 1 2 or storage unit 4 1 8 Access Memory 4) Executes various processing according to the program loaded in 1-13.
- the RAM 43 also stores data necessary for the CPU 41 to execute various processes.
- CPU 4 1 1 ROM 4 1 2 and RAM 4 1 3 are connected to each other via bus 4 1 4. Also connected to this bus 4 1 4 is an input / output interface 4 1 5.
- the input / output interface 415 has an input unit 416 comprising a keyboard, a mouse, etc., a display such as a CRT (Cathode Ray Tube), an LCD (Liquid Crystal Display) etc., and an output unit 417 comprising a speaker, etc.
- a storage unit 418 comprising a hard disk etc., and a communication unit 419 comprising a modem, terminal adapter etc. are connected.
- the communication unit 4 1 9 performs communication processing via a network (not shown).
- the drive 4 20 is also connected to the input / output interface 4 15 if necessary, and a magnetic disk 4 21, an optical disk 4 22, a magneto-optical disk 4 2 3, or a semiconductor memory 4 2 4 etc. are appropriately provided.
- the computer program that has been installed and read out is installed in the storage unit 4 18 as necessary.
- various functions can be implemented by installing a computer that includes the program that configures the software on dedicated hardware or various programs. For example, it is installed from a network or recording medium on a general-purpose personal computer that can execute.
- This recording medium is, as shown in FIG. 30, separately from the main body of the apparatus, a magnetic disc 4 21 (including a flexible disc) on which the program is recorded, which is distributed to provide the program to the user.
- Optical disc 4 2 2 including CD-ROM (Compact Disk-Read Only Memory), DVD (including Digital Versatile Disk) 1 ), and optical disc 4 2 3 (including MD (Mini-Disk) (trademark)
- the ROM M 4 12 in which the program is recorded and provided to the user in a state of being incorporated in advance in the device main body It consists of a hard disk etc. included in 8.
- modulation codes coded based on a variable-length table can be S I S ⁇ ⁇ decoded, and decoding performance can be improved. Furthermore, according to the present invention, it is possible to use modulation code based on a variable-length table and turbo code or L D P C code in combination, and it is possible to improve decoding performance.
Abstract
Description
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US10/532,858 US7388525B2 (en) | 2003-08-28 | 2004-07-05 | Decoding device and method, program recording medium, and program using modulation code encoded in accordance with a variable length table |
EP04747345A EP1659696B1 (en) | 2003-08-28 | 2004-07-05 | Trellis decoding of run-length limited codes having a code table of variable input length |
ES04747345T ES2384617T3 (es) | 2003-08-28 | 2004-07-05 | Descodificación reticular de códigos limitados en longitud de marcha que tienen una tabla de códigos de longitud de entrada variable |
CN2004800011551A CN1701517B (zh) | 2003-08-28 | 2004-07-05 | 译码装置和方法 |
AT04747345T ATE550760T1 (de) | 2003-08-28 | 2004-07-05 | Trellisdecodierung von lauflängenbegrenzten codes mit codetabelle variabler eingangslänge |
KR1020057007290A KR101165865B1 (ko) | 2003-08-28 | 2004-07-05 | 복호 장치 및 방법과 프로그램 기록 매체 |
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US (1) | US7388525B2 (ja) |
EP (1) | EP1659696B1 (ja) |
KR (1) | KR101165865B1 (ja) |
CN (1) | CN1701517B (ja) |
AT (1) | ATE550760T1 (ja) |
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US7916605B2 (en) * | 2009-03-30 | 2011-03-29 | General Electric Company | Joint DC minimization and bit detection |
US9318145B2 (en) * | 2009-03-30 | 2016-04-19 | General Electric Company | Method for decoding under optical and electronic noise |
US11330046B2 (en) | 2010-03-01 | 2022-05-10 | Tybalt, Llc | Content delivery in wireless wide area networks |
US10419533B2 (en) * | 2010-03-01 | 2019-09-17 | Genghiscomm Holdings, LLC | Edge server selection for device-specific network topologies |
US8599959B2 (en) * | 2010-12-30 | 2013-12-03 | Lsi Corporation | Methods and apparatus for trellis-based modulation encoding |
WO2013150774A1 (ja) | 2012-04-04 | 2013-10-10 | パナソニック株式会社 | 復号装置及び復号方法 |
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Also Published As
Publication number | Publication date |
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ATE550760T1 (de) | 2012-04-15 |
CN1701517A (zh) | 2005-11-23 |
KR101165865B1 (ko) | 2012-07-13 |
ES2384617T3 (es) | 2012-07-09 |
EP1659696A1 (en) | 2006-05-24 |
MY143128A (en) | 2011-03-31 |
EP1659696B1 (en) | 2012-03-21 |
US7388525B2 (en) | 2008-06-17 |
KR20060113350A (ko) | 2006-11-02 |
CN1701517B (zh) | 2010-11-24 |
US20060120244A1 (en) | 2006-06-08 |
EP1659696A4 (en) | 2008-08-27 |
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