WO2005017970A2 - Module for epas/ehpas applications - Google Patents

Module for epas/ehpas applications Download PDF

Info

Publication number
WO2005017970A2
WO2005017970A2 PCT/US2004/026527 US2004026527W WO2005017970A2 WO 2005017970 A2 WO2005017970 A2 WO 2005017970A2 US 2004026527 W US2004026527 W US 2004026527W WO 2005017970 A2 WO2005017970 A2 WO 2005017970A2
Authority
WO
WIPO (PCT)
Prior art keywords
module according
power
power module
lead
base portion
Prior art date
Application number
PCT/US2004/026527
Other languages
French (fr)
Other versions
WO2005017970A3 (en
Inventor
Sergio Fissore
William Grant
Original Assignee
International Rectifier Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Rectifier Corporation filed Critical International Rectifier Corporation
Priority to JP2006523438A priority Critical patent/JP4336713B2/en
Priority to EP04781246.6A priority patent/EP1654761B1/en
Publication of WO2005017970A2 publication Critical patent/WO2005017970A2/en
Publication of WO2005017970A3 publication Critical patent/WO2005017970A3/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861Lead-frames fixed on or encapsulated in insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901Structure
    • H01L2224/4903Connectors having different sizes, e.g. different diameters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494Connecting portions
    • H01L2224/4943Connecting portions the connecting portions being staggered
    • H01L2224/49431Connecting portions the connecting portions being staggered on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494Connecting portions
    • H01L2224/4943Connecting portions the connecting portions being staggered
    • H01L2224/49433Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/202Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern

Definitions

  • the power semiconductor devices of power systems are typically integrated to form a power module.
  • Most power modules thus include power semiconductor devices, such as power diodes and power MOSFETs.
  • a power semiconductor device generates heat during operation. The heat so generated affects the operation of the semiconductor device, and also may have an adverse effect on the structural integrity of the power module by for example creating thermal stresses which may lead to fractures and other mechanical damage.
  • the heat generated by the power semiconductor devices must, therefore, be extracted and dissipated. Otherwise the continued operation of the power semiconductor devices may be jeopardized.
  • the generated heat is typically passed to a heatsink for dissipation.
  • a thermal conduit Serving as a thermal conduit is usually a thermally conductive substrate which is interposed between the heat generating power semiconductor devices and the heatsink.
  • a known thermally conductive substrate is referred to as insulated metal substrate ( S).
  • Another known thermally conductive substrate is direct bonded copper (DBC).
  • TMS or a DBC is undesirable due to cost, increase in the thermal resistance of the entire stack in the application, thermal capacitance at the die, and typically higher electrical loop resistance of the power module. Due to the less than ideal heat extractive capabilities of a design that includes and LMS or a DBC, the reaching of the maximum rating of a power semiconductor device is avoided to prevent overheating. Thus, the use of an LMS or a DBC may hinder the designers to take full advantage of the capability of a power semiconductor device, which may lead to inefficient power designs, among other disadvantageous results.
  • Power modules are prevalently used in the automotive industry, particularly for the driving and the control of electric motors, among other uses.
  • the increase in the number of features in an average automobile has caused and continues to cause an increased demand for generic or function-specific power modules.
  • the market place demands reduction of cost per module as well as module efficiency so that the final cost of the car remains competitive and electric power used by the extra features requires as little extra power demand as possible on the automobile's electric system.
  • a power module according to the present invention is adapted to include the power elements for an Electric Power Assisted Steering (EPAS)/Electro-Hydraulic Power Assisted Steering (EHPAS).
  • EPAS Electric Power Assisted Steering
  • EHPAS Electric Power Assisted Steering
  • a power module includes a molded shell having a plurality of walls defining a space, and a base portion.
  • the molded shell further includes a lead frame having a plurality of leads extending from the defined space through the walls of the molded shell, and a plurality of conductive pads each integrally connected with at least one lead.
  • Each conductive pad has at least one power semiconductor device electrically and mechanically attached thereto by, for example, a layer of solder, whereby the heat generated by the device is transferred to the conductive pad. The heat so transferred is partially dissipated by the leads integral with the conductive pad.
  • a module according to the present invention does not require a thermally conductive substrate.
  • a module according to the present invention exhibits improved thermal resistance.
  • the improvement in the thermal resistance is advantageous in that it allows the designer to select smaller die than the die used in an application using an LMS or DBC. Such an option can, among other advantages, lead to cost reduction.
  • the lead frame in a module according to the present invention includes a plurality of die pads each for receiving at least one power semiconductor device arranged along one line, and a plurality of die bond pads arranged along another parallel and opposing line.
  • the arrangement of the die pads and the wire bonds along parallel and opposing lines simplifies manufacturing.
  • mounting a semiconductor die such as a power MOSFET on a conductive pad of a lead frame may also result in the lowering of the overall resistance of the module in that the conductive pads used may be thicker than those used when an LMS or a DBC is used.
  • the coefficient of thermal expansion of the metal layer and the coefficient of thermal expansion of the substrate require the thickness of the metal layer to be kept below a certain minimum in order to prevent thermal strains (usually resulting from thermal cycling) to cause the conductive pad to peel off.
  • the conductive pads may be only 10- 12 mils thick.
  • the conductive pads in a module according to the present invention may be made thicker, which results in reduced resistance and improved heat dissipation.
  • the arrangement of the die pads and the wire bonds along parallel and opposing lines allows for generally parallel wire bonds for connecting the power semiconductor devices to respective die pads, which also simplifies manufacturing.
  • a large percentage of the overall resistance is contributed by the wire bonds.
  • five wire bonds are used per die to reduce resistance.
  • the five wire bonds are staggered, and three out of the five wire bonds are along a larger curvature.
  • a power module according to the present invention includes a shunt resistor which is electrically connected to external leads without the use of wire bonds to reduce the parasitic inductance and resistance which may affect the proper reading of the current passing therethrough. Furthermore, a module according to the preferred embodiment also includes a thermistor and has room for a high frequency bus capacitor as well.
  • a module according to the preferred embodiment of the present invention includes other unique and advantageous features which are described in detail in the following description and shown in the accompanying drawings.
  • Figure 1 is an exploded view of a module according to the present invention.
  • Figure 2 is a top plan view of a lead frame as used in a module according to the present invention.
  • Figure 3 is a bottom plan view of the lead frame shown in Figure 2.
  • Figure 4 is a top isometric view of the lead frame shown by Figure 2.
  • Figure 5 is an isometric bottom view of the lead frame shown in Figure 2.
  • Figure 6 shows an isometric top view of a molded shell of a module according to the present invention.
  • Figure 7 shows an isometric bottom view of the molded shell shown in Figure
  • Figure 8 shows a circuit diagram of the preferred embodiment of a module according to the invention.
  • Figure 9A shows a top plan view of a module according to the present invention with its lid removed to show the internal arrangement of its elements.
  • Figure 9B illustrates the internal connection of elements of a module according to the present invention.
  • Figure 10 is a top plan view of a module according to the present invention.
  • Figure 11 is a side plan view of a module according to the present invention as seen in the direction of arrows 11-11.
  • a module according to the present invention includes molded shell 1, a plurality of power semiconductor devices 6, a shunt resistor 3, thermistor 4, a plurality of large diameter bondwires 7 (e.g. 20 mils thick), a plurality of small diameter bondwires 8 (e.g. 8 mils thick), encapsulant 9, solder layers 2, thermally conductive adhesive body 11, heatsink 13, and lid 15.
  • molded shell 1 includes a lead frame and a molded body 10.
  • the lead frame includes a plurality of leads and a plurality of conductive pads all molded in molded body 10.
  • lead frame 12 as used in the preferred embodiment of the present invention includes power input lead 14, ground lead 16, first output lead 18, second output lead 20, third output lead 22, and a plurality of pin leads 24.
  • Lead frame 12 further includes a plurality of conductive pads.
  • lead frame 12 includes a plurality of die pads 26, and a plurality of wire bond pads 28.
  • each output lead 18, 20, 22 is integral with at least one wire bond pad 28, and one die pad 26.
  • power input lead 14 is integral with the remaining die pads 26, while the remaining wire bond pads 28 are integral with the tie bar 30, which itself is integral with one pin lead 24.
  • Tie bar 30 is preferably in the same plane as wire bond pads 28 and extends below output leads 18, 20, 22.
  • wire bond pads 28 are arranged along a first line, and die bond pads 26 are arranged along a second line opposite and parallel to the first line.
  • die bond pads 26 are arranged along a common line, which advantageously simplifies manufacturing.
  • Molded shell 1 includes a plurality of walls 32 extending from and defining a space over base portion 34.
  • base portion 34 includes and is formed with at least spaced conductive pads 26, 28 and mold compound which is disposed in spaces between conductive pads 26, 28.
  • the mold compound disposed in spaces between conductive pads 26, 28 electrically insulates conductive pads 26, 28, and mechanically binds the same, whereby the mold compound and conductive pads 26 adj 28 form base portion 34 of molded shell 1.
  • base portion 34 includes bumps 36 formed on the exterior surface thereof.
  • Bumps 36 are formed from the mold compound, are preferably 0.1 mm tall, and are scattered over the exterior surface of base portion 34. Bumps 36 are intended as spacers to space base portion 34 from heat sink 13 to define the thickness of thermally conductive adhesive bodyl 1 which is used to thermally and mechanically connect heatsink 13 to base portion 34 and electrically insulate heatsink 13 from base portion 34.
  • a module according to the preferred embodiment of the present invention is adapted to include power elements for three half-bridge circuit for providing power preferably to a three-phase motor.
  • a half-bridge circuit includes a high side power semiconductor device series connected to a low side power semiconductor device.
  • the first half-bridge circuit for providing power to a first phase U of a motor includes high side power MOSFET Ql which is connected at its source side to the drain side of low side power MOSFET Q2
  • the second half-bridge circuit for providing power to the second phase V of a motor includes high side MOSFET Q3 which is connected at its source side to the drain side of low side power MOSFET Q4
  • the third half-bridge circuit for providing power to the third phase W of a motor includes high side power MOSFET Q5 which is connected at its source side to the low side power MOSFET Q6.
  • each high side power MOSFET Ql, Q3, Q5 is connected to the power input line B+, while the source side of low side power MOSFETS Q2, Q4, Q6 are connected to ground GND through shunt resistor 3.
  • Each power MOSFET Ql, Q2, Q3, Q4, Q5, Q6 is controlled by a signal which is received at its gate.
  • each power MOSFET Ql , Q2, Q3, Q4, Q5 is a power MOSFET
  • Q6 is electrically and mechanically connected at its drain side to a respective die pad 26 by a layer of solder 2, and at its source side to a respective bondwire pad 28 by a plurality of large diameter bondwires 7 which maybe of any conventional type suitable for power transmissions.
  • large diameter bondwires 7 are staggered so the current densities are evenly distributed on the source metallization of each power MOSFET.
  • two of the five larger diameter wire bonds 7 are shorter than the other three.
  • large diameter wire bonds 7 are generally parallel.
  • the parallel orientation of large diameter wire bonds 7, and the arrangement of all power MOSFETS Ql, Q2, Q3, Q4, Q5, Q6 advantageously simplify and speed up the manufacturing of a module according to the present invention.
  • shunt resistor 3 is electrically comiected to ground lead 16 through conductive pad 38 and to a portion 40 of tie bar 30. It should be noted that each of tie bar 30 and conductive pad 38 is integral with a respective pin lead 24, which can then be used to sense the shunt resistor 3.
  • the remaining pin leads are provided for the following functions. [0040] Q 2 ⁇ e i v i n , to carry source voltage from the source of power MOSFET Q2 via a
  • Q 2gate to send voltage to the gate of power MOSFET Q2 via gate wire 44.
  • Qi e i v i n , l0 carry source voltage from the source of power MOSFET Ql via a
  • Kelvin wire 42 [0043] Qi gate , to send voltage to the gate of power MOSFET Ql via gate wire 44. [0044] Q 4 e i v i n> t0 carr y source voltage from the source of power MOSFET Q4 via a
  • Q 4gate to send voltage to the gate of power MOSFET Q4 via gate wire 44.
  • Q 3gate to send voltage to the gate of power MOSFET Q3 via gate wire 44.
  • Q ⁇ gate to send voltage to the gate of power MOSFET Q6 via gate wire 44.
  • Pin leads T l5 T 2 are connected to respective poles of thermistor 4 by wire bonds 50 to provide information regarding the temperature of power MOSFET Q6. It should be noted that thermistor 4 is disposed on circuit board 46. Circuit board 46 and power MOSFET Q6 are disposed on the same die pad in the preferred embodiment. [0053] Once all wire bond connections are made, the space defined by walls 32 and base 34 of molded shell 1 is filled with encapsulant 9 which is preferably a silicone gel. Thereafter, lid 15 is attached to walls 32, preferably with an adhesive, to enclose the space defined by walls 32 and base 34, as seen in Figure 10.
  • encapsulant 9 is preferably a silicone gel.
  • heatsink 13 is thermally and mechanically attached to the exterior surface of base 34 of molded shell 1 by a thermally conductive adhesive body 11.
  • Thermally conductive adhesive 11 may be an elastomer, such as a silicone-based elastomer, which is loaded with thermally conductive particles such as alumina particles.
  • the elastomer adheres well to both heatsink 13 and base portion 34, and is also capable of electrically insulating the conductive pads 26, 28 of base portion 34 from heatsink 13.
  • molded shell 1 is formed by forming molded body 10 around lead frame 12 in a single injection molding step. Thus, base portion 34 and walls 32 are formed into an integral unit.
  • a module according to the present invention is manufactured by first forming molded shell 1, depositing solder on die pads 26, placing power MOSFETs on solder layers so deposited, and applying heat to raffle the solder.
  • the mold compound used for forming the molded body 10 of molded shell 1 is capable of withstanding at least the applied solder raffle temperature.
  • solder is reflown, flux material is removed, and the wire bonds are connected in two steps.
  • large diameter wire bonds 7 are connected by ultrasonic wire bonding
  • the remaining wire bonds are connected also by ultrasonic wire bonding.
  • a silicone gel is disposed within the space defined by walls 32 of molded shell 1 and cured to form encapsulant 9.
  • lid 15 is attached to enclose the defined space.
  • a preferred material to be used as a mold compound is PPA provided by
  • AMODOEL is AMODOEL.
  • Another preferred material is PPS.
  • lead frame 12 may be formed from copper, which may be plated with nickel to promote reliability of bonding with wire bonds. Aluminum inlay on pin leads may also enhance reliability of bonding with bondwires although pin leads may also be nickel plated. In the preferred embodiment, lead frame 12 may be 1mm thick to reduce thermal and electrical resistance of the module.
  • Pb/Sn, Sn/Ag, and Pb/Sn Ag compositions may be used for solder in the preferred embodiment, although the use of other conductive adhesives such as conductive epoxies or other solder compositions are considered to be within the scope of the present invention.
  • the solder most preferred is Sn/Ag which is lead free and can be automatically dispensed by a solder dispenser. Depending on surface finish of the lead frame, the solder could be Sn/Ag/Cu.
  • a module according to the present invention can include a high frequency (HF) capacitor to improve the module's high frequency EMI characteristics.
  • An HF capacitor can be connected between positive and negative battery te ⁇ ninals (14, 16) inside the module. Referring to Figure 9A, a location for an HF capacitor can be just on the right side of pad 38 and just to the left of the bondwire connected to lead BH1.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

A power module that includes a molded shell having a lead frame molded in a mold body, and a plurality of power semiconductor devices disposed directly on the die pads of the lead frame.

Description

MODULE FOR EPAS/EHPAS APPLICATIONS
RELATED APPLICATION
[0001] This application is based on and claims benefit of United States Provisional
Application No. 60/496,001, filed on August 14, 2003, entitled MODULE FOR EPAS/EHPAS APPLICATIONS, to which a claim of priority is hereby made and the disclosure of which is incorporated by reference.
BACKGROUND OF THE INVENTION
[0002] The power semiconductor devices of power systems are typically integrated to form a power module. Most power modules thus include power semiconductor devices, such as power diodes and power MOSFETs. A power semiconductor device generates heat during operation. The heat so generated affects the operation of the semiconductor device, and also may have an adverse effect on the structural integrity of the power module by for example creating thermal stresses which may lead to fractures and other mechanical damage. The heat generated by the power semiconductor devices must, therefore, be extracted and dissipated. Otherwise the continued operation of the power semiconductor devices may be jeopardized.
[0003] In a conventional power module, the generated heat is typically passed to a heatsink for dissipation. Serving as a thermal conduit is usually a thermally conductive substrate which is interposed between the heat generating power semiconductor devices and the heatsink.
[0004] A known thermally conductive substrate is referred to as insulated metal substrate ( S). Another known thermally conductive substrate is direct bonded copper (DBC). The use of an TMS or a DBC is undesirable due to cost, increase in the thermal resistance of the entire stack in the application, thermal capacitance at the die, and typically higher electrical loop resistance of the power module. Due to the less than ideal heat extractive capabilities of a design that includes and LMS or a DBC, the reaching of the maximum rating of a power semiconductor device is avoided to prevent overheating. Thus, the use of an LMS or a DBC may hinder the designers to take full advantage of the capability of a power semiconductor device, which may lead to inefficient power designs, among other disadvantageous results.
[0005] Power modules are prevalently used in the automotive industry, particularly for the driving and the control of electric motors, among other uses. The increase in the number of features in an average automobile has caused and continues to cause an increased demand for generic or function-specific power modules. Yet, the market place demands reduction of cost per module as well as module efficiency so that the final cost of the car remains competitive and electric power used by the extra features requires as little extra power demand as possible on the automobile's electric system. [0006] Thus, it is desirable to have a power module which can adequately dissipate the generated heat without using a thermally conductive substrate.
SUMMARY OF THE INVENTION
[0007] A power module according to the present invention is adapted to include the power elements for an Electric Power Assisted Steering (EPAS)/Electro-Hydraulic Power Assisted Steering (EHPAS).
[0008] A power module according to the present invention includes a molded shell having a plurality of walls defining a space, and a base portion. The molded shell further includes a lead frame having a plurality of leads extending from the defined space through the walls of the molded shell, and a plurality of conductive pads each integrally connected with at least one lead. Each conductive pad has at least one power semiconductor device electrically and mechanically attached thereto by, for example, a layer of solder, whereby the heat generated by the device is transferred to the conductive pad. The heat so transferred is partially dissipated by the leads integral with the conductive pad. The remainder of the heat is transferred to a heatsink through a body of thermally conductive adhesive, which attaches the heatsink to the conductive pads. Thus, a module according to the present invention does not require a thermally conductive substrate. As a result, a module according to the present invention exhibits improved thermal resistance. [0009] The improvement in the thermal resistance (the lowering of the thermal resistance) is advantageous in that it allows the designer to select smaller die than the die used in an application using an LMS or DBC. Such an option can, among other advantages, lead to cost reduction.
[0010] Furthermore, once an LMS or DBC is eliminated from the design, the number of interconnections and groupings of the wirebonds are reduced, which reduces the overall resistance of the module.
[0011] According to one aspect of the present invention the lead frame in a module according to the present invention includes a plurality of die pads each for receiving at least one power semiconductor device arranged along one line, and a plurality of die bond pads arranged along another parallel and opposing line. The arrangement of the die pads and the wire bonds along parallel and opposing lines simplifies manufacturing. [0012] hi addition, mounting a semiconductor die such as a power MOSFET on a conductive pad of a lead frame may also result in the lowering of the overall resistance of the module in that the conductive pads used may be thicker than those used when an LMS or a DBC is used. Specifically, when an LMS or a DBC is used, the coefficient of thermal expansion of the metal layer and the coefficient of thermal expansion of the substrate require the thickness of the metal layer to be kept below a certain minimum in order to prevent thermal strains (usually resulting from thermal cycling) to cause the conductive pad to peel off. Thus, for example, in a typical LMS the conductive pads may be only 10- 12 mils thick. Whereas, the conductive pads in a module according to the present invention may be made thicker, which results in reduced resistance and improved heat dissipation.
[0013] Furthermore, the arrangement of the die pads and the wire bonds along parallel and opposing lines allows for generally parallel wire bonds for connecting the power semiconductor devices to respective die pads, which also simplifies manufacturing. [0014] hi a power module, a large percentage of the overall resistance is contributed by the wire bonds. In the preferred embodiment five wire bonds are used per die to reduce resistance. According to an aspect of the present invention, the five wire bonds are staggered, and three out of the five wire bonds are along a larger curvature. As a result, when the load is a motor, a module according to the present invention causes lower vibrations and higher torques, i.e. better performance.
[0015] According to another aspect of the present invention, a power module according to the present invention includes a shunt resistor which is electrically connected to external leads without the use of wire bonds to reduce the parasitic inductance and resistance which may affect the proper reading of the current passing therethrough. Furthermore, a module according to the preferred embodiment also includes a thermistor and has room for a high frequency bus capacitor as well.
[0016] A module according to the preferred embodiment of the present invention includes other unique and advantageous features which are described in detail in the following description and shown in the accompanying drawings.
BRLEF DESCRIPTION OF THE FIGURES
[0017] Figure 1 is an exploded view of a module according to the present invention.
[0018] Figure 2 is a top plan view of a lead frame as used in a module according to the present invention.
[0019] Figure 3 is a bottom plan view of the lead frame shown in Figure 2.
[0020] Figure 4 is a top isometric view of the lead frame shown by Figure 2.
[0021] Figure 5 is an isometric bottom view of the lead frame shown in Figure 2.
[0022] Figure 6 shows an isometric top view of a molded shell of a module according to the present invention.
[0023] Figure 7 shows an isometric bottom view of the molded shell shown in Figure
6.
[0024] Figure 8 shows a circuit diagram of the preferred embodiment of a module according to the invention. [0025] Figure 9A shows a top plan view of a module according to the present invention with its lid removed to show the internal arrangement of its elements.
[0026] Figure 9B illustrates the internal connection of elements of a module according to the present invention.
[0027] Figure 10 is a top plan view of a module according to the present invention.
[0028] Figure 11 is a side plan view of a module according to the present invention as seen in the direction of arrows 11-11.
DETAILED DESCRIPTION OF THE FIGURES
[0029] Referring to Figure 1, a module according to the present invention includes molded shell 1, a plurality of power semiconductor devices 6, a shunt resistor 3, thermistor 4, a plurality of large diameter bondwires 7 (e.g. 20 mils thick), a plurality of small diameter bondwires 8 (e.g. 8 mils thick), encapsulant 9, solder layers 2, thermally conductive adhesive body 11, heatsink 13, and lid 15.
[0030] According to one aspect of the present invention, molded shell 1 includes a lead frame and a molded body 10. The lead frame includes a plurality of leads and a plurality of conductive pads all molded in molded body 10.
[0031] Referring now to Figures 2, 3, 4, and 5, lead frame 12 as used in the preferred embodiment of the present invention includes power input lead 14, ground lead 16, first output lead 18, second output lead 20, third output lead 22, and a plurality of pin leads 24. Lead frame 12 further includes a plurality of conductive pads. Specifically, lead frame 12 includes a plurality of die pads 26, and a plurality of wire bond pads 28. As seen in Figure 2, each output lead 18, 20, 22 is integral with at least one wire bond pad 28, and one die pad 26. Furthermore, power input lead 14 is integral with the remaining die pads 26, while the remaining wire bond pads 28 are integral with the tie bar 30, which itself is integral with one pin lead 24. Tie bar 30 is preferably in the same plane as wire bond pads 28 and extends below output leads 18, 20, 22. That is, output leads 18, 20, 22 are bent so that they may extend over tie bar 30. [0032] According to one aspect of the present invention, wire bond pads 28 are arranged along a first line, and die bond pads 26 are arranged along a second line opposite and parallel to the first line. Thus, as will be explained later, all power semiconductor devices disposed on die pads 26 will be arranged along a common line, which advantageously simplifies manufacturing.
[0033] Referring now to Figures 6 and 7, lead frame 12 is molded over with molded body 10 to form molded shell 1. Molded shell 1 includes a plurality of walls 32 extending from and defining a space over base portion 34. According to another aspect of the present invention, base portion 34 includes and is formed with at least spaced conductive pads 26, 28 and mold compound which is disposed in spaces between conductive pads 26, 28. The mold compound disposed in spaces between conductive pads 26, 28 electrically insulates conductive pads 26, 28, and mechanically binds the same, whereby the mold compound and conductive pads 26„ 28 form base portion 34 of molded shell 1. [0034] Referring now to Figure 7 specifically, base portion 34 includes bumps 36 formed on the exterior surface thereof. Bumps 36 are formed from the mold compound, are preferably 0.1 mm tall, and are scattered over the exterior surface of base portion 34. Bumps 36 are intended as spacers to space base portion 34 from heat sink 13 to define the thickness of thermally conductive adhesive bodyl 1 which is used to thermally and mechanically connect heatsink 13 to base portion 34 and electrically insulate heatsink 13 from base portion 34.
[0035] Referring now to Figure 8, a module according to the preferred embodiment of the present invention is adapted to include power elements for three half-bridge circuit for providing power preferably to a three-phase motor. As is well known, a half-bridge circuit includes a high side power semiconductor device series connected to a low side power semiconductor device. In the preferred embodiment, the first half-bridge circuit for providing power to a first phase U of a motor includes high side power MOSFET Ql which is connected at its source side to the drain side of low side power MOSFET Q2, the second half-bridge circuit for providing power to the second phase V of a motor includes high side MOSFET Q3 which is connected at its source side to the drain side of low side power MOSFET Q4, and the third half-bridge circuit for providing power to the third phase W of a motor includes high side power MOSFET Q5 which is connected at its source side to the low side power MOSFET Q6. The drain electrode of each high side power MOSFET Ql, Q3, Q5 is connected to the power input line B+, while the source side of low side power MOSFETS Q2, Q4, Q6 are connected to ground GND through shunt resistor 3. Each power MOSFET Ql, Q2, Q3, Q4, Q5, Q6 is controlled by a signal which is received at its gate.
[0036] Referring now to Figures 9A, 9B, each power MOSFET Ql , Q2, Q3, Q4, Q5,
Q6 is electrically and mechanically connected at its drain side to a respective die pad 26 by a layer of solder 2, and at its source side to a respective bondwire pad 28 by a plurality of large diameter bondwires 7 which maybe of any conventional type suitable for power transmissions. According to an aspect of the present invention, large diameter bondwires 7 are staggered so the current densities are evenly distributed on the source metallization of each power MOSFET. Thus, in the preferred embodiment, two of the five larger diameter wire bonds 7 are shorter than the other three.
[0037] According to another aspect of the present invention, large diameter wire bonds 7 are generally parallel. The parallel orientation of large diameter wire bonds 7, and the arrangement of all power MOSFETS Ql, Q2, Q3, Q4, Q5, Q6 advantageously simplify and speed up the manufacturing of a module according to the present invention. [0038] According to another aspect of the present invention, shunt resistor 3 is electrically comiected to ground lead 16 through conductive pad 38 and to a portion 40 of tie bar 30. It should be noted that each of tie bar 30 and conductive pad 38 is integral with a respective pin lead 24, which can then be used to sense the shunt resistor 3. [0039] The remaining pin leads are provided for the following functions. [0040] Q2κeivin, to carry source voltage from the source of power MOSFET Q2 via a
Kelvin wire 42.
[0041] Q2gate, to send voltage to the gate of power MOSFET Q2 via gate wire 44.
[0042] Qi eivin, l0 carry source voltage from the source of power MOSFET Ql via a
Kelvin wire 42. [0043] Qigate, to send voltage to the gate of power MOSFET Ql via gate wire 44. [0044] Q4 eivin> t0 carry source voltage from the source of power MOSFET Q4 via a
Kelvin wire 42.
[0045] Q4gate, to send voltage to the gate of power MOSFET Q4 via gate wire 44.
[0046] Q3κ vin, to c rry source voltage from the source of power MOSFET Q3 via a
Kelvin wire 42.
[0047] Q3gate, to send voltage to the gate of power MOSFET Q3 via gate wire 44.
[0048] QsKeivin, to carry source voltage from the source of power MOSFET Q5 via a
Kelvin wire 42.
[0049] Q5gate> to send voltage to the gate of power MOSFET Q5 via gate wire 44.
[0050] QβKeivin, to carry source voltage from the source of power MOSFET Q6 via a Kelvin wire 42.
[0051] Qβgate, to send voltage to the gate of power MOSFET Q6 via gate wire 44.
[0052] Pin leads Tl5 T2 are connected to respective poles of thermistor 4 by wire bonds 50 to provide information regarding the temperature of power MOSFET Q6. It should be noted that thermistor 4 is disposed on circuit board 46. Circuit board 46 and power MOSFET Q6 are disposed on the same die pad in the preferred embodiment. [0053] Once all wire bond connections are made, the space defined by walls 32 and base 34 of molded shell 1 is filled with encapsulant 9 which is preferably a silicone gel. Thereafter, lid 15 is attached to walls 32, preferably with an adhesive, to enclose the space defined by walls 32 and base 34, as seen in Figure 10.
[0054] Referring now to Figure 11, according to an aspect of the present invention, heatsink 13 is thermally and mechanically attached to the exterior surface of base 34 of molded shell 1 by a thermally conductive adhesive body 11. Thermally conductive adhesive 11 may be an elastomer, such as a silicone-based elastomer, which is loaded with thermally conductive particles such as alumina particles. Preferably, the elastomer adheres well to both heatsink 13 and base portion 34, and is also capable of electrically insulating the conductive pads 26, 28 of base portion 34 from heatsink 13. [0055] According to an aspect of the present invention, molded shell 1 is formed by forming molded body 10 around lead frame 12 in a single injection molding step. Thus, base portion 34 and walls 32 are formed into an integral unit.
[0056] A module according to the present invention is manufactured by first forming molded shell 1, depositing solder on die pads 26, placing power MOSFETs on solder layers so deposited, and applying heat to raffle the solder. Thus, according to an aspect of the present invention, the mold compound used for forming the molded body 10 of molded shell 1 is capable of withstanding at least the applied solder raffle temperature.
[0057] After, the solder is reflown, flux material is removed, and the wire bonds are connected in two steps. In a first step, large diameter wire bonds 7 are connected by ultrasonic wire bonding, hi the next step, the remaining wire bonds are connected also by ultrasonic wire bonding. Thereafter, a silicone gel is disposed within the space defined by walls 32 of molded shell 1 and cured to form encapsulant 9. In the last step, lid 15 is attached to enclose the defined space.
[0058] A preferred material to be used as a mold compound is PPA provided by
AMODOEL. Another preferred material is PPS.
[0059] Furthermore, lead frame 12 may be formed from copper, which may be plated with nickel to promote reliability of bonding with wire bonds. Aluminum inlay on pin leads may also enhance reliability of bonding with bondwires although pin leads may also be nickel plated. In the preferred embodiment, lead frame 12 may be 1mm thick to reduce thermal and electrical resistance of the module.
[0060] In the preferred embodiment, all 20 mil wire bonds (large diameter wire bonds
7) land on nickel plated portions of the lead frame, and all 8 mil wire bonds (small wire bonds 8) land on nickel plated or aluminum inlay lead frame portions.
[0061] Pb/Sn, Sn/Ag, and Pb/Sn Ag compositions may be used for solder in the preferred embodiment, although the use of other conductive adhesives such as conductive epoxies or other solder compositions are considered to be within the scope of the present invention. [0062] The solder most preferred is Sn/Ag which is lead free and can be automatically dispensed by a solder dispenser. Depending on surface finish of the lead frame, the solder could be Sn/Ag/Cu.
[0063] Furthermore, a module according to the present invention can include a high frequency (HF) capacitor to improve the module's high frequency EMI characteristics. An HF capacitor can be connected between positive and negative battery teπninals (14, 16) inside the module. Referring to Figure 9A, a location for an HF capacitor can be just on the right side of pad 38 and just to the left of the bondwire connected to lead BH1. [0064] Although the present invention has been described in relation to particular embodiments thereof, many other variations and modifications and other uses will become apparent to those skilled in the art. It is preferred, therefore, that the present invention be limited not by the specific disclosure herein, but only by the appended claims.

Claims

WHAT IS CLAIMED IS: 1. A power module comprising: a lead frame, said lead frame including a plurality of spaced conductive pads and a plurality of leads; a molded shell, said molded shell including a plurality of walls defining a space and a base portion, said base portion including said spaced conductive pads and a mold body disposed between said spaces; and a plurality of power semiconductor devices each having one power electrode electrically and mechanically attached to a respective first conductive pad by a layer of conductive adhesive, and an opposing power electrode disposed on an opposing surface thereof electrically attached to a second conductive pad by at least one wire bond; wherein said first conductive pads are arranged along one line and said second conductive pads are arranged along another opposing line.
2. A power module according to claim 1, wherein said at least one wire bonds are generally parallel.
3. A power module according to claim 1 , wherein said opposing power electrode of each power semiconductor device is electrically connected to a second conductive pad by a plurality of wire bonds, said wire bonds being arranged in a staggered manner.
4. A power module according to claim 1, further comprising a plurality of signal leads each designated for sending control signals to a respective control electrode of a respective power semiconductor device, said signal leads being embedded in one of said walls of said molded shell and each including a wire bond pad which is electrically connected to a respective control electrode by a wire bond.
5. A power module according to claim 1, further comprising a thermistor.
6. A power module according to claim 1, further comprising a current detection resistor, said current detection resistor being directly electrically connected to a pair of leads which extend through at least one of said walls to the exterior of said molded shell.
7. A power module according to claim 1 , wherein said defined space is filled with an encapsulant.
8. A power module according to claim 7, wherein said encapsulant is a silicone gel.
9. A power module according to claim 1, wherein said power semiconductor devices are power MOSFETs.
10. A power module according to claim 1, wherein said power semiconductor devices are arranged to form at least one half-bridge.
11. A power module according to claim 1, wherein said power semiconductor devices are arranged to form at least three half-bridges.
12. A power module according to claim 11, wherein said leads include a power input lead, a ground lead and a plurality of output lead, each output lead being designated for carrying power from a respective half-bridge.
13. A power module according to claim 1, wherein at least one of said leads is a power input lead, another lead is a ground lead, and a third lead is an output lead.
14. A power module according to claim 1 , further comprising a lid attached to said walls to enclose said defined space.
15. A power module according to claim 1, wherein said power semiconductor devices are attached to said first conductive pads by solder, and said molded shell is comprised of amolding material that is capable of withstanding the raffle temperature of said solder.
16. A power module according to claim 15, wherein said molding material is PPA.
17. A power module according to claim 1, wherein said base portion includes a plurality of bumps on the exterior thereof to serve as a spacer for spacing a heatsink.
18. A power module according to claim 17, wherein said bumps have a height of 0.1 mm.
19. A power module according to claim 1 , further comprising a heatsink attached to said base portion and in thermal contact with at least said first conductive pads by a thermally conductive adhesive.
20. A power module according to claim 19, further comprising a plurality of bumps on an exterior surface of said base portion to space said heatsink from said base portion.
PCT/US2004/026527 2003-08-14 2004-08-16 Module for epas/ehpas applications WO2005017970A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2006523438A JP4336713B2 (en) 2003-08-14 2004-08-16 Module for EPAS and EHPAS applications
EP04781246.6A EP1654761B1 (en) 2003-08-14 2004-08-16 Power semiconductor module

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US49600103P 2003-08-14 2003-08-14
US60/496,001 2003-08-14
US10/917,976 US6933593B2 (en) 2003-08-14 2004-08-13 Power module having a heat sink
US10/917,976 2004-08-13

Publications (2)

Publication Number Publication Date
WO2005017970A2 true WO2005017970A2 (en) 2005-02-24
WO2005017970A3 WO2005017970A3 (en) 2005-11-17

Family

ID=34139051

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/026527 WO2005017970A2 (en) 2003-08-14 2004-08-16 Module for epas/ehpas applications

Country Status (4)

Country Link
US (1) US6933593B2 (en)
EP (1) EP1654761B1 (en)
JP (1) JP4336713B2 (en)
WO (1) WO2005017970A2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007020618B3 (en) * 2007-04-30 2008-10-30 Danfoss Silicon Power Gmbh Method for producing a solid power module and transistor module made therewith
US10886202B2 (en) 2016-06-10 2021-01-05 Mitsubishi Electric Corporation Semiconductor device

Families Citing this family (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005136264A (en) * 2003-10-31 2005-05-26 Mitsubishi Electric Corp Power semiconductor device and power semiconductor module
US7049171B2 (en) * 2004-06-23 2006-05-23 Delphi Technologies, Inc. Electrical package employing segmented connector and solder joint
US7227198B2 (en) * 2004-08-11 2007-06-05 International Rectifier Corporation Half-bridge package
JP4566678B2 (en) * 2004-10-04 2010-10-20 日立オートモティブシステムズ株式会社 Power module
US7122882B2 (en) * 2004-11-02 2006-10-17 Alpha And Omega Semiconductor Ltd. Low cost power MOSFET with current monitoring
US7884454B2 (en) 2005-01-05 2011-02-08 Alpha & Omega Semiconductor, Ltd Use of discrete conductive layer in semiconductor device to re-route bonding wires for semiconductor device package
US7898092B2 (en) * 2007-11-21 2011-03-01 Alpha & Omega Semiconductor, Stacked-die package for battery power management
US7745930B2 (en) * 2005-04-25 2010-06-29 International Rectifier Corporation Semiconductor device packages with substrates for redistributing semiconductor device electrodes
US20070063333A1 (en) * 2005-09-20 2007-03-22 Texas Instruments Incorporated Semiconductor package with internal shunt resistor
US7863737B2 (en) * 2006-04-01 2011-01-04 Stats Chippac Ltd. Integrated circuit package system with wire bond pattern
JP4564937B2 (en) 2006-04-27 2010-10-20 日立オートモティブシステムズ株式会社 Electric circuit device, electric circuit module, and power conversion device
WO2009069308A1 (en) * 2007-11-30 2009-06-04 Panasonic Corporation Heat dissipating structure base board, module using heat dissipating structure base board, and method for manufacturing heat dissipating structure base board
US7808101B2 (en) * 2008-02-08 2010-10-05 Fairchild Semiconductor Corporation 3D smart power module
US7847391B2 (en) * 2008-07-01 2010-12-07 Texas Instruments Incorporated Manufacturing method for integrating a shunt resistor into a semiconductor package
US8168490B2 (en) * 2008-12-23 2012-05-01 Intersil Americas, Inc. Co-packaging approach for power converters based on planar devices, structure and method
US8164199B2 (en) * 2009-07-31 2012-04-24 Alpha and Omega Semiconductor Incorporation Multi-die package
US9257375B2 (en) 2009-07-31 2016-02-09 Alpha and Omega Semiconductor Inc. Multi-die semiconductor package
JP5067679B2 (en) * 2010-05-21 2012-11-07 株式会社デンソー Semiconductor module and driving device using the same
JP5201171B2 (en) * 2010-05-21 2013-06-05 株式会社デンソー Semiconductor module and driving device using the same
JP5380376B2 (en) * 2010-06-21 2014-01-08 日立オートモティブシステムズ株式会社 Power semiconductor device
DE102010030317B4 (en) * 2010-06-21 2016-09-01 Infineon Technologies Ag Circuit arrangement with shunt resistor
WO2012060123A1 (en) * 2010-11-02 2012-05-10 三菱電機株式会社 Electric power steering power module and electric power steering drive control device employing same
JP5669866B2 (en) 2011-02-09 2015-02-18 三菱電機株式会社 Power semiconductor module
JP5936310B2 (en) 2011-03-17 2016-06-22 三菱電機株式会社 Power semiconductor module and its mounting structure
DE202011100820U1 (en) * 2011-05-17 2011-12-01 Ixys Semiconductor Gmbh Power semiconductor
JP5267959B2 (en) * 2011-05-30 2013-08-21 株式会社デンソー Semiconductor module and driving device using the same
JP5939041B2 (en) * 2012-06-01 2016-06-22 住友電気工業株式会社 Semiconductor module and method for manufacturing semiconductor module
JP5991206B2 (en) * 2013-01-16 2016-09-14 株式会社豊田自動織機 Semiconductor module and inverter module
DE102013008193A1 (en) * 2013-05-14 2014-11-20 Audi Ag Device and electrical assembly for converting a DC voltage into an AC voltage
JP6501360B2 (en) * 2014-08-22 2019-04-17 日本電産株式会社 Module, power converter and motor using the module
JP6345583B2 (en) * 2014-12-03 2018-06-20 ルネサスエレクトロニクス株式会社 Semiconductor device
US9659837B2 (en) 2015-01-30 2017-05-23 Semiconductor Components Industries, Llc Direct bonded copper semiconductor packages and related methods
US10532315B1 (en) 2015-08-27 2020-01-14 Advanced Catalyst Systems Llc System for flameless catalytic destruction of fugitive organics and producing environmentally clean hot gas for other uses of thermal energy
US9698076B1 (en) 2015-12-22 2017-07-04 Ksr Ip Holdings Llc. Metal slugs for double-sided cooling of power module
JP6261642B2 (en) * 2016-04-04 2018-01-17 三菱電機株式会社 Power semiconductor device
US10229861B2 (en) * 2017-04-06 2019-03-12 Sabin Lupan Power semiconductor device and package
US10535579B2 (en) * 2018-04-06 2020-01-14 Sabin Lupan Power semiconductor device and package
JP2020004784A (en) 2018-06-26 2020-01-09 三菱電機株式会社 Power module and power converter
US11830856B2 (en) 2019-03-06 2023-11-28 Semiconductor Components Industries, Llc Semiconductor package and related methods
DE102019220010A1 (en) * 2019-12-18 2021-06-24 Zf Friedrichshafen Ag Half-bridge module of a traction inverter of power electronics of an electric vehicle or hybrid vehicle
JP7286582B2 (en) 2020-03-24 2023-06-05 株式会社東芝 semiconductor equipment
US11682611B2 (en) * 2020-06-22 2023-06-20 Infineon Technologies Ag Power semiconductor module
DE102020209018A1 (en) * 2020-07-20 2022-01-20 Zf Friedrichshafen Ag Method for manufacturing a power module, power module, electrical device and motor vehicle
EP4303916A4 (en) 2021-03-05 2024-04-17 Mitsubishi Electric Corporation Semiconductor module
JP2023044582A (en) * 2021-09-17 2023-03-30 株式会社東芝 Semiconductor device
DE102021210938A1 (en) * 2021-09-30 2023-03-30 Zf Friedrichshafen Ag Inverter with optimized electromagnetic behavior

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010030362A1 (en) 2000-01-12 2001-10-18 International Rectifier Corporation Low cost power semiconductor module without substrate

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5512790A (en) * 1994-07-21 1996-04-30 Delco Electronics Corporation Triaxial double switch module
US6384492B1 (en) * 1995-05-04 2002-05-07 Spinel Llc Power semiconductor packaging
US6359331B1 (en) * 1997-12-23 2002-03-19 Ford Global Technologies, Inc. High power switching module
US6212087B1 (en) * 1999-02-05 2001-04-03 International Rectifier Corp. Electronic half bridge module
DE10109344C1 (en) * 2001-02-27 2002-10-10 Siemens Ag Circuit arrangement with half bridges
JP4540884B2 (en) * 2001-06-19 2010-09-08 三菱電機株式会社 Semiconductor device
US6841852B2 (en) * 2002-07-02 2005-01-11 Leeshawn Luo Integrated circuit package for semiconductor devices with improved electric resistance and inductance

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010030362A1 (en) 2000-01-12 2001-10-18 International Rectifier Corporation Low cost power semiconductor module without substrate

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007020618B3 (en) * 2007-04-30 2008-10-30 Danfoss Silicon Power Gmbh Method for producing a solid power module and transistor module made therewith
DE102007020618B8 (en) * 2007-04-30 2009-03-12 Danfoss Silicon Power Gmbh Method for producing a solid power module and transistor module made therewith
EP2261971A1 (en) 2007-04-30 2010-12-15 Danfoss Silicon Power GmbH Power module fabrication process
US10886202B2 (en) 2016-06-10 2021-01-05 Mitsubishi Electric Corporation Semiconductor device

Also Published As

Publication number Publication date
US20050035434A1 (en) 2005-02-17
JP2007502544A (en) 2007-02-08
JP4336713B2 (en) 2009-09-30
EP1654761A4 (en) 2010-02-17
EP1654761B1 (en) 2017-05-17
EP1654761A2 (en) 2006-05-10
WO2005017970A3 (en) 2005-11-17
US6933593B2 (en) 2005-08-23

Similar Documents

Publication Publication Date Title
EP1654761B1 (en) Power semiconductor module
US7187551B2 (en) Module for solid state relay for engine cooling fan control
US6313598B1 (en) Power semiconductor module and motor drive system
US5920119A (en) Power semiconductor module employing metal based molded case and screw fastening type terminals for high reliability
JP4192396B2 (en) Semiconductor switching module and semiconductor device using the same
KR102585450B1 (en) Molded package with chip carrier comprising brazed electrically conductive layers
US8179688B2 (en) Semiconductor device
US7227198B2 (en) Half-bridge package
US7247929B2 (en) Molded semiconductor device with heat conducting members
US7149088B2 (en) Half-bridge power module with insert molded heatsinks
US9129933B2 (en) Semiconductor module and an inverter mounting said semiconductor module
JP2019506753A (en) Power modules based on multilayer circuit boards
JP2004265931A (en) Semiconductor device driving integrated circuit and power conversion apparatus
US6906935B2 (en) Inverter apparatus and method of manufacturing the same
JP2023544138A (en) Power module with elevated power plane with integrated signal board and its mounting process
JP4906650B2 (en) Power semiconductor module and manufacturing method thereof
CN100483704C (en) Module for EPAS/EHPAS applications
US20220310476A1 (en) Electronic packages with integral heat spreaders
JP2004048084A (en) Semiconductor power module
CN114050134B (en) Semiconductor circuit with a high-voltage power supply
CN215578508U (en) Semiconductor circuit having a plurality of transistors
KR100419051B1 (en) Semiconductor device
EP3770956A1 (en) Power semiconductor module
GB2625785A (en) A modular and scalable power semiconductor module arrangement
CN113314479A (en) Semiconductor circuit having a plurality of transistors

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200480023340.0

Country of ref document: CN

AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
REEP Request for entry into the european phase

Ref document number: 2004781246

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 2004781246

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 2006523438

Country of ref document: JP

WWP Wipo information: published in national office

Ref document number: 2004781246

Country of ref document: EP