WO2004066107A2 - Method and apparatus for digital subscriber line access multiplexer stacking - Google Patents
Method and apparatus for digital subscriber line access multiplexer stacking Download PDFInfo
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- WO2004066107A2 WO2004066107A2 PCT/US2004/000262 US2004000262W WO2004066107A2 WO 2004066107 A2 WO2004066107 A2 WO 2004066107A2 US 2004000262 W US2004000262 W US 2004000262W WO 2004066107 A2 WO2004066107 A2 WO 2004066107A2
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- dslams
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/64—Hybrid switching systems
- H04L12/6418—Hybrid transport
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5603—Access techniques
- H04L2012/5604—Medium of transmission, e.g. fibre, cable, radio
- H04L2012/5606—Metallic
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5603—Access techniques
- H04L2012/5609—Topology
- H04L2012/561—Star, e.g. cross-connect, concentrator, subscriber group equipment, remote electronics
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5625—Operations, administration and maintenance [OAM]
- H04L2012/5627—Fault tolerance and recovery
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5638—Services, e.g. multimedia, GOS, QOS
- H04L2012/5665—Interaction of ATM with other protocols
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/64—Hybrid switching systems
- H04L12/6418—Hybrid transport
- H04L2012/6424—Access arrangements
- H04L2012/6427—Subscriber Access Module; Concentrator; Group equipment
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/64—Hybrid switching systems
- H04L12/6418—Hybrid transport
- H04L2012/6478—Digital subscriber line, e.g. DSL, ADSL, HDSL, XDSL, VDSL
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M11/00—Telephonic communication systems specially adapted for combination with other electrical systems
- H04M11/06—Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors
- H04M11/062—Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors using different frequency bands for speech and other data
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13039—Asymmetrical two-way transmission, e.g. ADSL, HDSL
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/1305—Software aspects
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13109—Initializing, personal profile
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13145—Rerouting upon failure
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13164—Traffic (registration, measurement,...)
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13166—Fault prevention
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13167—Redundant apparatus
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13204—Protocols
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/1329—Asynchronous transfer mode, ATM
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13298—Local loop systems, access network
Definitions
- This invention relates generally to the field of Digital Subscriber Line Access Multiplexers (DSLAMs) and, more particularly, to configuration and interconnection of DSLAMs to allow stacking efficiently with fault tolerance redundancy at low cost.
- DSLAMs Digital Subscriber Line Access Multiplexers
- Digital Subscriber Line Access Multiplexers are required for communications between digital subscriber line (DSL) users and the central office (CO).
- DSLAM digital subscriber line
- CO central office
- the "pizza box" sized DSLAMs are stacked at remote sites to provide higher density and ease of interconnection.
- Conventional stacking configurations of the DSLAMs are shown in FIGs. la and lb of the drawings based on single link daisy chain and star respectively.
- An architecture for stacking DSLAMs employs a master DSLAM having a control circuit and an uplink communication circuit to a central office and two LVDS circuits for communication with two DSLAM boxes in adjacent circuit interconnection to the master DSLAM.
- Multiple slave DSLAMs each having a programmable control circuit and two LVDS circuits for communication with two DSLAM boxes immediately adjacent on either side in the circuit are connected in a ring or split stack arrangement.
- a control circuit in the master selectively programs the control circuits in each slave DSLAM to control the direction of communication in the LVDS circuits as round robin in a first selected mode and a split in a second selected mode to accommodate the desired structure and to provide redundancy for failure by reprogramming from round robin to split to communicate around a failed slave DSLAM.
- FIG. 1 a is a prior art example of a single link daisy chain connection
- FIG. lb is a prior art example of a star interconnection architecture
- FIG. 2a is a schematic diagram of an exemplary embodiment of the present invention employing a ring structure with a round robin data path;
- FIG. 2b is a schematic diagram of an exemplary embodiment of the present invention employing a split stacking with split data path
- FIG. 3 is a schematic diagram illustrating the traffic redirection capability of the redundant structure of the present invention.
- FIG. 4 is a schematic diagram of dual master stacking possible with the present invention
- FIG. 5 is a detailed schematic diagram of the main functional blocks of the master and slave DSLAMs in a configuration according to the present invention
- FIG. 6 is a schematic demonstration of an embodiment for communications between DSLAMs employing the present invention.
- FIG. 7 shows an example of the relay/stacking I/O table in a Slave DSLAM
- FIG. 9 illustrates the communications relaying scheme for the Slaves' downlink path
- FIG. 10 illustrates the communications relaying scheme for the Slaves' uplink path
- FIG. 11 is a flow chart depicting ATM uplink communications in an embodiment of the invention.
- FIG. 12 is is a flow chart depicting ATM downlink communications in an embodiment of the invention.
- FIG. 13 is a state diagram for in-band communications in an embodiment of the invention.
- FIGs. 2a and b show the proposed new method of stacking based on "ring" or “dual link” architecture respectively.
- the stacking link 10 connecting the master box 12 and slave boxes 14 for the embodiments shown is based on low voltage differential signaling (LVDS) technology, designed to carry ATM traffic, as will be discussed in greater detail subsequently.
- LVDS low voltage differential signaling
- the uplink 16 for data traffic is shown as ATM based connecting to the central office (CO) or ATM network via OC-3 or (Multilink) El/Tl IMA.
- the data flows in one direction from one box to another (i.e. to the one stacked below).
- the last box down the chain completes the "ring” by following the same data path to the master.
- the data flows bi-directionally (transmit/receive) from one box to another (i.e. to the one stacked below).
- the master splits the two traffic paths via software control, based either on virtual slave box identification numbers and/or ATM virtual path/virtual circuit numbers of a slave box.
- the Master to Slave and Slave to Slave interconnections alternate in each link, as shown.
- the chain connection order is from Master to Slave 1 to Slave 3, etc.
- the chain order is from Master to Slave 2 to Slave 4, etc.
- the last two slave boxes in each chain link then connect with each other on link 10' to complete the loop for the purpose of redundancy and traffic redirection in case a failure occurs as will be described in greater detail subsequently.
- a third alternative provides the two slave boxes connecting to the Master are the first Slave and a middle slave.
- the middle slave will #2.
- One link connects Master and Slave 1
- the other link connects Master and Slave 2 and then Slave 3.
- the middle slave will be 4 and one link will be Master and Slave 1 and then 2 and 3.
- the other link will be Master and Slave 4, and then 5 to 7.
- the flexibility of the invention allows this configuration to also be used for a Round Robin daisy chain link since the virtual "position" of the slave DSLAMs is programmable.
- the last link (10') will also be used for data traffic.
- the link path can be reconfigured by the Master to bi-directional as shown in FIG. 2d when a failure occurs.
- FIG. 3 shows an example of the reliability feature or self-healing available with the method of the present invention.
- the master can redirect traffic when informed the failure has occurred in one of the slave boxes by converting the traffic in the slave boxes to split path with bi-direction communication on both sides of the "down" slave box with communication to the master box at both ends of the chain.
- the link 10' is activated for normal communication. Detecting a failure/malfunction of a slave DSLAM is accomplished by the
- a first approach is for Master to periodically send a "heart-beat" message to each slave by means of polling in a round robin fashion. If the slave being polled (identified by virtual ID) does not respond within a pre-designated time, the Master will consider it has failed and redirect traffic around that slave.
- a second approach is that the slaves communicate with each other by sending heart-beat messages.
- the architecture can be programmed by the Master such that the box that is stacked "on top” always sends messages to the one that is stacked "below” or next in communication sequence.
- the Master sends heart-beat to Slave 1
- Slave 1 sends the heart-beat to Slave 2 and so on.
- the box receiving the heart-beat message does not respond within a pre-designated time
- the box sending the message will consider that box being failed and inform the Master using the reserved in-band communication channel (as described below).
- FIG. 4 shows an embodiment of the present invention with a dual master configuration with a second master box 18, providing full protection in the event one master fails. Coordination between the two masters is employed, in terms of traffic and configuration, such as active/standby, shared active/active, etc.
- FIG. 5 shows the internal main functional architecture of the master and slave DSLAMs and a general stacking arrangement.
- the master box incorporates multiple ADSL interfaces 20 for connection to the user lines 22.
- a control circuit 24 with a central processing unit (CPU) and ATM switching and traffic management controls the master DSLAM.
- An uplink circuit 26 provides communication with the CO using STM/OC3 or multilink EI/TI IMA. Communication with the slave boxes is provided by multiple LVDS circuits 28a and 28b.
- Each slave box also has multiple ADSL interfaces 30 for connection to the user lines 32.
- a control circuit 34 with a central processing unit (CPU) and ATM switching and traffic management controls the slave DSLAM under software control by the master.
- LVDS ports 36a and 36b interconnect the slave box for communication with each box adjacent in the circuit connection, either master or slave.
- the control circuit in the master DSLAM provides software instruction to the slave DSLAMs for establishing the communication direction as round robin or split, i.e. bi-directional, as will be described in greater detail subsequently. With the physical connection in a ring stack chain, the normal communication path would be round robin. However, failure of one slave box can be overcome by the master reprogramming the slaves to communicate in split format thereby automatically reconfiguring the circuit arrangement to a dual link configuration as previously described with respect to FIG. 3.
- the communications between the Master and Slaves and between the Slave DSLAMs for the embodiments shown are based on in-band communications carried within the LVDS link and ATM cell streams. This is also the CPU to CPU communication means between two DSLAM boxes via an in-band LVDS channel.
- FIG. 6 demonstrates this embodiment in schematic form.
- the CPU messages are inserted into the ATM cell streams by the LVDS circuit through the CPU interface as represented by links 40.
- the in-band communications are transmitted by the LVDS with the ATM cell streams on links 10 between DSLAMs.
- Each Slave DSLAM maintains a traffic relay and stacking I/O table that does the virtual channel and box ID mapping. The table is updated whenever instructed by the Master via in-band communication channel.
- FIG. 7 shows an example of the relay/stacking I/O table in a Slave DSLAM.
- the table incorporates the ADSL port numbers connected to the DSLAM, the VCI/NPIs for the Slave DSLAM, the virtual ID for the DSLAM and the Stacking Input/Output mode for each of the two LVDS ports.
- the stacking ports in the Utopia LVDS configuration shown for the embodiments in the drawings can be predefined as belonging to the "A" or "B" LVDS link during initialization. Each port can be programmed for input, output or bi-directional (input and output) communication.
- the Master DSLAM maintains a "proxy" table for all slaves, which includes
- the proxy table contains the information present in the tables for each of the Slaves and an additional data item defining the Master Stacking Mode for round robin or split path.
- the Stacking Input/Output mode established by the Master will be determined by the Stacking mode as previously described. Failure mode recovery can be accomplished by the Master as previously described resulting in a change in the Stacking mode and bypassing of a failed Slave DSLAM in the communications path.
- the communications relaying scheme for the Slaves is illustrated in FIGs.
- the ATM data from the uplink is received by a DSLAM in block 50 and routed through an ATM switch 52.
- a determination is made in block 54 comparing the ATM cells with the DSLAM traffic relay and stacking table to determine ifthe communication is local or should be downlinked in the stack. Ifthe communication is intended for an ADSL port in the DSLAM, it is switched to the appropriate local ADSL port in block 56. If the communication is to be passed through, a check of the stacking I/O table is made to determine the transfer port in block 58. Ifthe I/O table has been updated, the communication is passed to the new stacking port in block 60 for ATM output to the next DSLAM as defined by the new stacking port data. Ifthe I/O table has not been updated, the communication is passed to the old stacking port in block 62 for ATM output to the next DSLAM as defined by the old stacking port data.
- Uplinking of data is shown in FIG. 10 where ATM data from the Downlink is received in block 64 from the local ADSL ports in the DSLAM or from the stacking input port.
- the data is routed through the ATM switch 66 and to the uplink switch 68 for external communication.
- a check of the stacking I/O table is made to determine the transfer port in block 70. Ifthe I/O table has not been updated, the communication is passed to the old stacking port in block 72 for ATM output to the next DSLAM as defined by the old stacking port data. Ifthe I/O table has been updated, the communication is passed to the new stacking port in block 74 for ATM output to the next DSLAM as defined by the new stacking port data.
- Uplink and downlink communications for the Master DSLAM are conducted based on the proxy table previously described with respect to FIG. 8.
- ATM data is received by the Master from the uplink in block 80 through the ATM switch 82.
- a determination 84 is made whether the ATM cells correspond to a local ADSL port for the Master or require a stack downlink. If local the ATM cells are switched to the appropriate local DSL port in block 86, if not, a check 88 is made to determine the stacking mode. If a determination is made in block 90 that the round robin mode is present, the Master switches to the output stacking port previously defined in block 92.
- the proxy table allows conversion of the external VCI/NPI to internal (slave) VCI/VPI for downlink. If a split mode is used, a switch to the proper stacking port is made using the VCI/NPI cross connect table in block 94.
- the uplink proxy path is shown in FIG. 12.
- ATM data from the local ADSL port in the Master or downlink slave DSLAM is received in block 96 through the ATM switch 98 and transmitted through the uplink in switch 100 with the Master conducting the NCI/NPI cross connect as required pursuant to the proxy table.
- Heartbeat communications and failure reprogramming are accomplished by the Master DSLAM using inband messaging as previously described.
- the failure sensing schemes reserve the in-band communication channel that is in the reverse direction of the normal ATM traffic, in order to inform the Master when failure occurs.
- the in-band communication channel is carried over the normal ATM traffic.
- the Master reprograms the Slave path direction in case of failure through the in-band communication channel by sending down stacking path I/O messages to each of the Slave boxes (minus the failed one).
- the Slave boxes then update their corresponding I/O tables.
- the Master incorporates a simple state machine that tracks the operating condition of each Slave box in its stacking control circuit.
- the failed DSLAM box when the failed DSLAM box is recovered to be operational again, it will inform the Master through the in-band communication channel to notify that it is alive. The Master then will either update the I/O table of all the Slaves including the recovered one, or by updating only the recovered Slave of its normal traffic I/O path that follows the rest of the traffic directions.
- the state machine for the described in-band communications is shown in FIG. 13.
- the Master sends an initialization communication 102 to define the stacking I/O information table for each DSLAM.
- state 104 in response to heartbeat signals, communications proceed based on the initialized settings. If no heart-beat response is received or a failure notification is received, the Master enters state 106, identifies the failed Slave by its virtual ID and sends stacking I/O table updates to the remaining operational slaves. The remaining Slaves continue operation with the revised I/O stacking tables until the failed Slave communicates with the Master that it is recovered.
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Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP04700392A EP1584150B1 (en) | 2003-01-16 | 2004-01-06 | Method and apparatus for digital subscriber line access multiplexer stacking |
| AT04700392T ATE524889T1 (de) | 2003-01-16 | 2004-01-06 | Verfahren und vorrichtung zum digital- teilnehmeranschlusszugriffsmultiplexer-stacking |
| JP2006500811A JP4499089B2 (ja) | 2003-01-16 | 2004-01-06 | デジタル加入者線アクセス・マルチプレクサのスタッキングの方法および装置 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/346,485 | 2003-01-16 | ||
| US10/346,485 US7116674B2 (en) | 2003-01-16 | 2003-01-16 | Method and apparatus for digital subscriber line access multiplexer stacking |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2004066107A2 true WO2004066107A2 (en) | 2004-08-05 |
| WO2004066107A3 WO2004066107A3 (en) | 2005-04-28 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2004/000262 Ceased WO2004066107A2 (en) | 2003-01-16 | 2004-01-06 | Method and apparatus for digital subscriber line access multiplexer stacking |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7116674B2 (enExample) |
| EP (1) | EP1584150B1 (enExample) |
| JP (1) | JP4499089B2 (enExample) |
| AT (1) | ATE524889T1 (enExample) |
| WO (1) | WO2004066107A2 (enExample) |
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| DE102005058982A1 (de) * | 2005-12-09 | 2007-06-14 | Infineon Technologies Ag | Bündelungsschaltung für eine Leitungstreiberkarte und Verfahren zum Bündeln von Datenfragmenten |
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2003
- 2003-01-16 US US10/346,485 patent/US7116674B2/en not_active Expired - Lifetime
-
2004
- 2004-01-06 AT AT04700392T patent/ATE524889T1/de not_active IP Right Cessation
- 2004-01-06 EP EP04700392A patent/EP1584150B1/en not_active Expired - Lifetime
- 2004-01-06 JP JP2006500811A patent/JP4499089B2/ja not_active Expired - Fee Related
- 2004-01-06 WO PCT/US2004/000262 patent/WO2004066107A2/en not_active Ceased
Non-Patent Citations (2)
| Title |
|---|
| None |
| See also references of EP1584150A4 |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102005058982A1 (de) * | 2005-12-09 | 2007-06-14 | Infineon Technologies Ag | Bündelungsschaltung für eine Leitungstreiberkarte und Verfahren zum Bündeln von Datenfragmenten |
| DE102005058982B4 (de) * | 2005-12-09 | 2008-02-28 | Infineon Technologies Ag | Bündelungsschaltung für eine Leitungstreiberkarte und Verfahren zum Bündeln von Datenfragmenten |
| US7809019B2 (en) | 2005-12-09 | 2010-10-05 | Lantiq Deutschland Gmbh | Bonding circuit for a line card and method for bonding data fragments |
Also Published As
| Publication number | Publication date |
|---|---|
| US7116674B2 (en) | 2006-10-03 |
| WO2004066107A3 (en) | 2005-04-28 |
| JP4499089B2 (ja) | 2010-07-07 |
| EP1584150B1 (en) | 2011-09-14 |
| ATE524889T1 (de) | 2011-09-15 |
| JP2006518950A (ja) | 2006-08-17 |
| EP1584150A2 (en) | 2005-10-12 |
| EP1584150A4 (en) | 2006-10-18 |
| US20040141609A1 (en) | 2004-07-22 |
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