WO2004023529A3 - Vorrichtung und verfahren zum thermischen behandeln von halbleiterwafern - Google Patents

Vorrichtung und verfahren zum thermischen behandeln von halbleiterwafern Download PDF

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Publication number
WO2004023529A3
WO2004023529A3 PCT/EP2003/008220 EP0308220W WO2004023529A3 WO 2004023529 A3 WO2004023529 A3 WO 2004023529A3 EP 0308220 W EP0308220 W EP 0308220W WO 2004023529 A3 WO2004023529 A3 WO 2004023529A3
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
wall part
treatment chamber
semiconductor wafers
thermally treating
Prior art date
Application number
PCT/EP2003/008220
Other languages
English (en)
French (fr)
Other versions
WO2004023529A2 (de
Inventor
Georg Roters
Steffen Frigge
Sing Pin Tay
Yao Zhi Hu
Regina Hayn
Jens-Uwe Sachse
Erwin Schoer
Wilhelm Kegel
Original Assignee
Mattson Thermal Products Gmbh
Infineon Technologies Ag
Georg Roters
Steffen Frigge
Sing Pin Tay
Yao Zhi Hu
Regina Hayn
Jens-Uwe Sachse
Erwin Schoer
Wilhelm Kegel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mattson Thermal Products Gmbh, Infineon Technologies Ag, Georg Roters, Steffen Frigge, Sing Pin Tay, Yao Zhi Hu, Regina Hayn, Jens-Uwe Sachse, Erwin Schoer, Wilhelm Kegel filed Critical Mattson Thermal Products Gmbh
Priority to US10/524,871 priority Critical patent/US7151060B2/en
Publication of WO2004023529A2 publication Critical patent/WO2004023529A2/de
Publication of WO2004023529A3 publication Critical patent/WO2004023529A3/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67115Apparatus for thermal treatment mainly by radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28247Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon passivation or protection of the electrode, e.g. using re-oxidation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32105Oxidation of silicon-containing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

Die vorliegende Erfindung bezieht sich auf eine Vorrichtung zum thermischen Behandeln von Halbleiterwafern mit wenigstens einer zu oxidierenden Siliziumschicht und einer nicht zu oxidierenden Wolframschicht, wobei die Vorrichtung folgendes aufweist: wenigstens eine Strahlungsquelle; eine das Substrat aufnehmende Behandlungskammer, mit wenigstens einem benachbart zu den Strahlungsquellen liegenden Wandteil, der für die Strahlung der Strahlungsquelle im wesentlichen durchsichtig ist; und wenigstens eine Abdeckplatte zwischen dem Substrat und dem benachbart zu den Strahlungsquellen liegenden durchsichtigen Wandteil der Behandlungskammer, wobei die Abdeckplatte so bemessen ist, dass sie den durchsichtigen Wandteil der Behandlungskammer vollständig gegenüber dem Substrat abdeckt, um zu verhindern, dass von dem Substrat abdampfendes Wolfram auf den durchsichtigen Wandteil der Behandlungskammer gelangt.
PCT/EP2003/008220 2002-08-12 2003-07-25 Vorrichtung und verfahren zum thermischen behandeln von halbleiterwafern WO2004023529A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US10/524,871 US7151060B2 (en) 2002-08-12 2003-07-25 Device and method for thermally treating semiconductor wafers

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10236896.1 2002-08-12
DE10236896A DE10236896B4 (de) 2002-08-12 2002-08-12 Vorrichtung und Verfahren zum thermischen Behandeln von Halbleiterwafern

Publications (2)

Publication Number Publication Date
WO2004023529A2 WO2004023529A2 (de) 2004-03-18
WO2004023529A3 true WO2004023529A3 (de) 2004-05-13

Family

ID=31968963

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2003/008220 WO2004023529A2 (de) 2002-08-12 2003-07-25 Vorrichtung und verfahren zum thermischen behandeln von halbleiterwafern

Country Status (5)

Country Link
US (1) US7151060B2 (de)
KR (1) KR100769382B1 (de)
DE (1) DE10236896B4 (de)
TW (1) TWI319601B (de)
WO (1) WO2004023529A2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101300666A (zh) * 2005-10-28 2008-11-05 独立行政法人产业技术综合研究所 半导体制造装置以及半导体装置
KR100748176B1 (ko) * 2005-11-02 2007-08-10 아프로시스템 주식회사 열처리 장치
US8093157B2 (en) * 2007-07-03 2012-01-10 Mattson Technology, Inc. Advanced processing technique and system for preserving tungsten in a device structure
US7951728B2 (en) * 2007-09-24 2011-05-31 Applied Materials, Inc. Method of improving oxide growth rate of selective oxidation processes
DE102008012333B4 (de) * 2008-03-03 2014-10-30 Mattson Thermal Products Gmbh Vorrichtung zum thermischen Behandeln von scheibenförmigen Substraten
US9640412B2 (en) * 2009-11-20 2017-05-02 Applied Materials, Inc. Apparatus and method for enhancing the cool down of radiatively heated substrates
US9312260B2 (en) * 2010-05-26 2016-04-12 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuits and manufacturing methods thereof
KR101404069B1 (ko) * 2012-12-20 2014-06-11 주식회사 나래나노텍 유지보수가 용이한 기판 열처리 챔버 및 방법, 및 이를 구비한 기판 열처리 장치
KR101374752B1 (ko) * 2012-12-21 2014-03-17 주식회사 나래나노텍 기판 온도 측정 및 제어 시스템을 구비한 기판 열처리 챔버, 장치 및 방법

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5861609A (en) * 1995-10-02 1999-01-19 Kaltenbrunner; Guenter Method and apparatus for rapid thermal processing
US6197702B1 (en) * 1997-05-30 2001-03-06 Hitachi, Ltd. Fabrication process of a semiconductor integrated circuit device
US6228752B1 (en) * 1997-07-11 2001-05-08 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US6245605B1 (en) * 1998-09-29 2001-06-12 Texas Instruments Incorporated Method to protect metal from oxidation during poly-metal gate formation in semiconductor device manufacturing
US20010014522A1 (en) * 1998-02-26 2001-08-16 Ronald A. Weimer Forming a conductive structure in a semiconductor device
WO2001082350A1 (en) * 2000-04-27 2001-11-01 Applied Materials, Inc. A method and apparatus for selectively oxidizing a silicon/metal composite film stack
DE10060628A1 (de) * 2000-12-06 2002-01-31 Infineon Technologies Ag RTP-Reaktor sowie dazugehöriges Betriebsverfahren
WO2002089190A2 (de) * 2001-04-26 2002-11-07 Infineon Technologies Ag Verfahren zur minimierung der wolframoxidausdampfung bei der selektiven seitenwandoxidation von wolfram-silizium-gates

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59132136A (ja) * 1983-01-19 1984-07-30 Hitachi Ltd 半導体装置の製造方法
JPH0831761A (ja) * 1994-05-13 1996-02-02 Toshiba Corp 半導体基板の熱処理炉
DE4437361C2 (de) * 1994-10-19 1997-05-15 Ast Elektronik Gmbh Verfahren und Vorrichtung für die optische Schnellheizbehandlung empfindlicher elektronischer Bauelemente, insbesondere Halbleiterbauelemente
US5837555A (en) * 1996-04-12 1998-11-17 Ast Electronik Apparatus and method for rapid thermal processing
JPH09306860A (ja) * 1996-05-13 1997-11-28 Kokusai Electric Co Ltd 熱処理炉

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5861609A (en) * 1995-10-02 1999-01-19 Kaltenbrunner; Guenter Method and apparatus for rapid thermal processing
US6197702B1 (en) * 1997-05-30 2001-03-06 Hitachi, Ltd. Fabrication process of a semiconductor integrated circuit device
US6228752B1 (en) * 1997-07-11 2001-05-08 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US20010014522A1 (en) * 1998-02-26 2001-08-16 Ronald A. Weimer Forming a conductive structure in a semiconductor device
US6245605B1 (en) * 1998-09-29 2001-06-12 Texas Instruments Incorporated Method to protect metal from oxidation during poly-metal gate formation in semiconductor device manufacturing
WO2001082350A1 (en) * 2000-04-27 2001-11-01 Applied Materials, Inc. A method and apparatus for selectively oxidizing a silicon/metal composite film stack
DE10060628A1 (de) * 2000-12-06 2002-01-31 Infineon Technologies Ag RTP-Reaktor sowie dazugehöriges Betriebsverfahren
WO2002089190A2 (de) * 2001-04-26 2002-11-07 Infineon Technologies Ag Verfahren zur minimierung der wolframoxidausdampfung bei der selektiven seitenwandoxidation von wolfram-silizium-gates

Also Published As

Publication number Publication date
US7151060B2 (en) 2006-12-19
US20060105584A1 (en) 2006-05-18
KR100769382B1 (ko) 2007-10-22
TWI319601B (en) 2010-01-11
WO2004023529A2 (de) 2004-03-18
DE10236896A1 (de) 2004-04-01
TW200414365A (en) 2004-08-01
DE10236896B4 (de) 2010-08-12
KR20050026708A (ko) 2005-03-15

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