WO2003095712A3 - Procede de fabrication de structures tridimensionnelles solidaires de circuits a semi-conducteurs - Google Patents

Procede de fabrication de structures tridimensionnelles solidaires de circuits a semi-conducteurs Download PDF

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Publication number
WO2003095712A3
WO2003095712A3 PCT/US2003/014664 US0314664W WO03095712A3 WO 2003095712 A3 WO2003095712 A3 WO 2003095712A3 US 0314664 W US0314664 W US 0314664W WO 03095712 A3 WO03095712 A3 WO 03095712A3
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WO
WIPO (PCT)
Prior art keywords
semiconductor based
based circuitry
forming
dimensional structures
structures integral
Prior art date
Application number
PCT/US2003/014664
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English (en)
Other versions
WO2003095712A2 (fr
Inventor
Adam L Cohen
Original Assignee
Univ Southern California
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Publication date
Application filed by Univ Southern California filed Critical Univ Southern California
Priority to AU2003228977A priority Critical patent/AU2003228977A1/en
Publication of WO2003095712A2 publication Critical patent/WO2003095712A2/fr
Publication of WO2003095712A3 publication Critical patent/WO2003095712A3/fr

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00126Static structures not provided for in groups B81C1/00031 - B81C1/00119
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00222Integrating an electronic processing unit with a micromechanical structure
    • B81C1/00246Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D1/00Electroforming
    • C25D1/0033D structures, e.g. superposed patterned layers
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • C25D5/022Electroplating of selected surface areas using masking means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
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    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00Manufacture or treatment of microstructural devices or systems
    • B81C2201/01Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0174Manufacture or treatment of microstructural devices or systems in or on a substrate for making multi-layered devices, film deposition or growing
    • B81C2201/019Bonding or gluing multiple substrate layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00Manufacture or treatment of microstructural devices or systems
    • B81C2201/05Temporary protection of devices or parts of the devices during manufacturing
    • B81C2201/053Depositing a protective layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/07Integrating an electronic processing unit with a micromechanical structure
    • B81C2203/0707Monolithic integration, i.e. the electronic processing unit is formed on or in the same substrate as the micromechanical structure
    • B81C2203/0735Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • HELECTRICITY
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    • H01L2924/3025Electromagnetic shielding

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Materials Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Analytical Chemistry (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

Cette invention a trait à des procédés améliorés de fabrication par voie électrochimique de structures multicouche tridimensionnelles, utilisant comme substrat des circuits à semi-conducteurs. Certaine régions électriquement fonctionnelles de cette structure sont faites d'un matériau structural (du nickel, par exemple) adhérant aux plots de contact du circuit. Les plots de contact en aluminium et les structures au silicium sont protégés des dégâts causés par une diffusion du cuivre par application de couches barrière appropriées.
PCT/US2003/014664 2002-05-07 2003-05-07 Procede de fabrication de structures tridimensionnelles solidaires de circuits a semi-conducteurs WO2003095712A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003228977A AU2003228977A1 (en) 2002-05-07 2003-05-07 Method of and apparatus for forming three-dimensional structures integral with semiconductor based circuitry

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US37918302P 2002-05-07 2002-05-07
US60/379,183 2002-05-07

Publications (2)

Publication Number Publication Date
WO2003095712A2 WO2003095712A2 (fr) 2003-11-20
WO2003095712A3 true WO2003095712A3 (fr) 2005-08-18

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PCT/US2003/014664 WO2003095712A2 (fr) 2002-05-07 2003-05-07 Procede de fabrication de structures tridimensionnelles solidaires de circuits a semi-conducteurs

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US (2) US20040065554A1 (fr)
AU (1) AU2003228977A1 (fr)
WO (1) WO2003095712A2 (fr)

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CH704572B1 (fr) 2007-12-31 2012-09-14 Nivarox Sa Procédé de fabrication d'une microstructure métallique et microstructure obtenue selon ce procédé.
WO2013106442A1 (fr) * 2012-01-10 2013-07-18 Hzo, Inc. Masques servant à l'application de revêtements de protection sur des ensembles électroniques, ensembles électroniques masqués, et procédés associés
JP2014522543A (ja) 2012-06-18 2014-09-04 エイチズィーオー・インコーポレーテッド 完全に組み立てられている電子デバイスの内部表面へ保護被覆を塗工するためのシステム及び方法
WO2014110046A1 (fr) 2013-01-08 2014-07-17 Hzo, Inc. Substrats de masquage pour une application de revêtements de protection
US9894776B2 (en) 2013-01-08 2018-02-13 Hzo, Inc. System for refurbishing or remanufacturing an electronic device
US10449568B2 (en) 2013-01-08 2019-10-22 Hzo, Inc. Masking substrates for application of protective coatings

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WO2003095712A2 (fr) 2003-11-20

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