WO2003092071A2 - Circuit integre - Google Patents

Circuit integre Download PDF

Info

Publication number
WO2003092071A2
WO2003092071A2 PCT/DE2003/000413 DE0300413W WO03092071A2 WO 2003092071 A2 WO2003092071 A2 WO 2003092071A2 DE 0300413 W DE0300413 W DE 0300413W WO 03092071 A2 WO03092071 A2 WO 03092071A2
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
circuit according
sensor
manipulation
sensitive element
Prior art date
Application number
PCT/DE2003/000413
Other languages
German (de)
English (en)
Other versions
WO2003092071A3 (fr
Inventor
Marcus Janke
Peter Laackmann
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Publication of WO2003092071A2 publication Critical patent/WO2003092071A2/fr
Publication of WO2003092071A3 publication Critical patent/WO2003092071A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H01L23/576—Protection from inspection, reverse engineering or tampering using active circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0716—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising a sensor or an interface to a sensor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
    • G06K19/07381—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit with deactivation or otherwise incapacitation of at least a part of the circuit upon detected tampering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the invention relates to an integrated circuit with a plurality of sensors for the detection of manipulations.
  • the object of the invention is therefore to provide an integrated circuit in which it is ensured that distributed sensors cannot be switched off centrally.
  • This object is achieved according to the invention by an integrated circuit of the type mentioned at the outset, which is characterized in that a plurality of decentralized evaluation devices, each connected to at least one sensor, are provided for detecting attempts at manipulation and for initiating countermeasures.
  • the problem is thus solved in that not only are the sensors distributed over the integrated circuits, but also evaluation devices are distributed. If a successful attack on an evaluation device succeeds, at most the sensors connected to this evaluation device are overcome, but not the sensors which are connected to other evaluation devices.
  • a malfunction of a functional unit is brought about as a countermeasure, to which the respective sensors and the triggering evaluation device are assigned. It can be assumed that the malfunction of a single functional unit is already sufficient to render the entire integrated circuit unusable.
  • the supply voltage, the clock signal, the reset signal or a data signal is interrupted or derived, for example.
  • a functional unit is a connection pad, since the connection pads are particularly easy to access for attacks.
  • Figure 1 shows an integrated circuit according to the invention in a schematic representation.
  • FIG. 1 shows an integrated circuit 1 which has several functional units 3. This is, for example, a connection pad for the clock signal CLK, but these can also be memory areas, areas performing cryptographic operations or areas of the integrated circuit responsible for the voltage supply.
  • An evaluation device 2 is associated with a functional unit and is connected to one or more sensors 10, 11, 12, 13 or 14.
  • connection pad for the clock signal CLK With the connection pad for the clock signal CLK, it makes sense to monitor the signal that can be measured there for its voltage and its frequency in order to determine whether these are within a predetermined permissible range.
  • a voltage-sensitive element 13 and a frequency-sensitive element 14 are connected to the connection pad.
  • the elements 13 and 14 record the instantaneous value and pass it on to an evaluation device 2. This carries out the monitoring to determine whether the specified areas are left. If this is the case, a manipulation attempt is assumed and countermeasures are taken. In this case, it is provided to connect the clock signal input to the reference potential "0".
  • the evaluation device controls a switch 4, which establishes the desired connection.
  • the clock signal could also be connected to the positive supply voltage. Instead of connecting to a fixed potential, it is also possible to interrupt the line carrying the signal by means of a switch. However, this alternative is not shown in FIG. 1.
  • connection pads for causing a malfunction of a The functional unit consists of connecting a signal-carrying line to an ESD circuit using a switch. This is particularly simple to implement in terms of circuitry, since the connection pads for the discharge of static charges are connected to a ground lead anyway via a discharge diode. Connecting this one transistor in parallel causes little effort and is inexpensive.
  • Certain areas are particularly sensitive to changes in temperature and therefore have temperature-sensitive elements 11 for the detection of manipulation attempts.
  • Still other functional units are to be protected against depassivation and are consequently provided with an element 12 sensitive to depassivation.
  • the selection and arrangement of the sensors can be handled flexibly and can be adapted to the respective requirements.
  • functional units are not critical with regard to an attack and therefore have neither sensors nor evaluation devices.
  • the radiation-sensitive elements can be specialized sensors that are either suitable for temporary radiation, possibly with different wavelengths, or those that are sensitive to radiation that leads to chronic radiation damage.
  • sensors which have voltage-sensitive elements both deviations which relate to the level of the voltage and deviations which occur in the form of voltage peaks must be taken into account.
  • the integrated circuit according to the invention can be used particularly advantageously with chip cards.
  • Chip cards are often used for security-critical applications, for example as cashless means of payment or for access control.
  • the need for security in terms of protection against unauthorized access is correspondingly high, and on the other hand, the effort that is driven by unauthorized third parties to overcome security devices of the integrated circuit.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)

Abstract

L'invention concerne un circuit intégré pourvu de plusieurs capteurs destinés à détecter des manipulations. Selon la présente invention, ce circuit intégré est caractérisé en ce qu'il comporte également plusieurs dispositifs d'évaluation (2) décentralisés et reliés chacun à au moins un capteur (10..14), lesquels dispositifs d'évaluation sont conçus pour reconnaître des tentatives de manipulation et initier des contre-mesures.
PCT/DE2003/000413 2002-04-23 2003-02-12 Circuit integre WO2003092071A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10218096A DE10218096A1 (de) 2002-04-23 2002-04-23 Integrierte Schaltung
DE10218096.2 2002-04-23

Publications (2)

Publication Number Publication Date
WO2003092071A2 true WO2003092071A2 (fr) 2003-11-06
WO2003092071A3 WO2003092071A3 (fr) 2004-05-13

Family

ID=29224685

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2003/000413 WO2003092071A2 (fr) 2002-04-23 2003-02-12 Circuit integre

Country Status (3)

Country Link
DE (1) DE10218096A1 (fr)
TW (1) TW200305994A (fr)
WO (1) WO2003092071A2 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006045905A1 (de) * 2006-09-28 2008-04-17 Infineon Technologies Ag Halbleitervorrichtung mit einem Alarmmechanismus
EP2133812A1 (fr) * 2007-03-26 2009-12-16 Pingxiao Deng Dispositif de détection inviolable à fonction de protection par auto-destruction et procédé associé
US11055409B2 (en) 2019-01-06 2021-07-06 Nuvoton Technology Corporation Protected system

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3023427A1 (de) * 1979-06-28 1981-01-08 Gretag Ag Mobiler datenbehaelter
US4910707A (en) * 1984-09-27 1990-03-20 Siemens Aktiengesellschaft EEPROM with protective circuit
US5060261A (en) * 1989-07-13 1991-10-22 Gemplus Card International Microcircuit card protected against intrusion
WO2000028399A1 (fr) * 1998-11-05 2000-05-18 Infineon Technologies Ag Circuit de protection pour circuit integre
US20020036879A1 (en) * 2000-09-20 2002-03-28 Francois Vacherand Secure integrated electronic device
DE10101995A1 (de) * 2001-01-18 2002-07-25 Philips Corp Intellectual Pty Schaltungsanordnung und Verfahren zum Schützen mindestens einer Chipanordnung vor Manipulation und/oder vor Mißbrauch

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19639033C1 (de) * 1996-09-23 1997-08-07 Siemens Ag Analysierschutz für einen Halbleiterchip
DE19938890C2 (de) * 1999-08-17 2001-08-09 Infineon Technologies Ag Integrierter Schaltkreis und Schaltungsanordnung zur Stromversorgung eines integrierten Schaltkreises
DE10058078C1 (de) * 2000-11-23 2002-04-11 Infineon Technologies Ag Integrierte Schaltungsanordnung mit Analysierschutz und Verfahren zur Herstellung der Anordnung
DE10065339B4 (de) * 2000-12-27 2004-04-15 Infineon Technologies Ag Kapazitiver Sensor als Schutzvorrichtung gegen Angriffe auf einen Sicherheitschip

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3023427A1 (de) * 1979-06-28 1981-01-08 Gretag Ag Mobiler datenbehaelter
US4910707A (en) * 1984-09-27 1990-03-20 Siemens Aktiengesellschaft EEPROM with protective circuit
US5060261A (en) * 1989-07-13 1991-10-22 Gemplus Card International Microcircuit card protected against intrusion
WO2000028399A1 (fr) * 1998-11-05 2000-05-18 Infineon Technologies Ag Circuit de protection pour circuit integre
US20020036879A1 (en) * 2000-09-20 2002-03-28 Francois Vacherand Secure integrated electronic device
DE10101995A1 (de) * 2001-01-18 2002-07-25 Philips Corp Intellectual Pty Schaltungsanordnung und Verfahren zum Schützen mindestens einer Chipanordnung vor Manipulation und/oder vor Mißbrauch

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006045905A1 (de) * 2006-09-28 2008-04-17 Infineon Technologies Ag Halbleitervorrichtung mit einem Alarmmechanismus
EP2133812A1 (fr) * 2007-03-26 2009-12-16 Pingxiao Deng Dispositif de détection inviolable à fonction de protection par auto-destruction et procédé associé
EP2133812A4 (fr) * 2007-03-26 2011-11-09 Pingxiao Deng Dispositif de détection inviolable à fonction de protection par auto-destruction et procédé associé
US11055409B2 (en) 2019-01-06 2021-07-06 Nuvoton Technology Corporation Protected system

Also Published As

Publication number Publication date
WO2003092071A3 (fr) 2004-05-13
DE10218096A1 (de) 2003-11-13
TW200305994A (en) 2003-11-01

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