WO2003092071A2 - Integrated circuit comprising several sensors for detecting a manipulation - Google Patents
Integrated circuit comprising several sensors for detecting a manipulation Download PDFInfo
- Publication number
- WO2003092071A2 WO2003092071A2 PCT/DE2003/000413 DE0300413W WO03092071A2 WO 2003092071 A2 WO2003092071 A2 WO 2003092071A2 DE 0300413 W DE0300413 W DE 0300413W WO 03092071 A2 WO03092071 A2 WO 03092071A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- integrated circuit
- circuit according
- sensor
- manipulation
- sensitive element
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/57—Protection from inspection, reverse engineering or tampering
- H01L23/576—Protection from inspection, reverse engineering or tampering using active circuits
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0716—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips at least one of the integrated circuit chips comprising a sensor or an interface to a sensor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
- G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
- G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
- G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
- G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
- G06K19/07381—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit with deactivation or otherwise incapacitation of at least a part of the circuit upon detected tampering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- the invention relates to an integrated circuit with a plurality of sensors for the detection of manipulations.
- the object of the invention is therefore to provide an integrated circuit in which it is ensured that distributed sensors cannot be switched off centrally.
- This object is achieved according to the invention by an integrated circuit of the type mentioned at the outset, which is characterized in that a plurality of decentralized evaluation devices, each connected to at least one sensor, are provided for detecting attempts at manipulation and for initiating countermeasures.
- the problem is thus solved in that not only are the sensors distributed over the integrated circuits, but also evaluation devices are distributed. If a successful attack on an evaluation device succeeds, at most the sensors connected to this evaluation device are overcome, but not the sensors which are connected to other evaluation devices.
- a malfunction of a functional unit is brought about as a countermeasure, to which the respective sensors and the triggering evaluation device are assigned. It can be assumed that the malfunction of a single functional unit is already sufficient to render the entire integrated circuit unusable.
- the supply voltage, the clock signal, the reset signal or a data signal is interrupted or derived, for example.
- a functional unit is a connection pad, since the connection pads are particularly easy to access for attacks.
- Figure 1 shows an integrated circuit according to the invention in a schematic representation.
- FIG. 1 shows an integrated circuit 1 which has several functional units 3. This is, for example, a connection pad for the clock signal CLK, but these can also be memory areas, areas performing cryptographic operations or areas of the integrated circuit responsible for the voltage supply.
- An evaluation device 2 is associated with a functional unit and is connected to one or more sensors 10, 11, 12, 13 or 14.
- connection pad for the clock signal CLK With the connection pad for the clock signal CLK, it makes sense to monitor the signal that can be measured there for its voltage and its frequency in order to determine whether these are within a predetermined permissible range.
- a voltage-sensitive element 13 and a frequency-sensitive element 14 are connected to the connection pad.
- the elements 13 and 14 record the instantaneous value and pass it on to an evaluation device 2. This carries out the monitoring to determine whether the specified areas are left. If this is the case, a manipulation attempt is assumed and countermeasures are taken. In this case, it is provided to connect the clock signal input to the reference potential "0".
- the evaluation device controls a switch 4, which establishes the desired connection.
- the clock signal could also be connected to the positive supply voltage. Instead of connecting to a fixed potential, it is also possible to interrupt the line carrying the signal by means of a switch. However, this alternative is not shown in FIG. 1.
- connection pads for causing a malfunction of a The functional unit consists of connecting a signal-carrying line to an ESD circuit using a switch. This is particularly simple to implement in terms of circuitry, since the connection pads for the discharge of static charges are connected to a ground lead anyway via a discharge diode. Connecting this one transistor in parallel causes little effort and is inexpensive.
- Certain areas are particularly sensitive to changes in temperature and therefore have temperature-sensitive elements 11 for the detection of manipulation attempts.
- Still other functional units are to be protected against depassivation and are consequently provided with an element 12 sensitive to depassivation.
- the selection and arrangement of the sensors can be handled flexibly and can be adapted to the respective requirements.
- functional units are not critical with regard to an attack and therefore have neither sensors nor evaluation devices.
- the radiation-sensitive elements can be specialized sensors that are either suitable for temporary radiation, possibly with different wavelengths, or those that are sensitive to radiation that leads to chronic radiation damage.
- sensors which have voltage-sensitive elements both deviations which relate to the level of the voltage and deviations which occur in the form of voltage peaks must be taken into account.
- the integrated circuit according to the invention can be used particularly advantageously with chip cards.
- Chip cards are often used for security-critical applications, for example as cashless means of payment or for access control.
- the need for security in terms of protection against unauthorized access is correspondingly high, and on the other hand, the effort that is driven by unauthorized third parties to overcome security devices of the integrated circuit.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- General Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
Abstract
The invention relates to an integrated circuit comprising several sensors for detecting a manipulation. The inventive integrated circuit is characterised in that it is equipped with several decentralised evaluation devices (2), each of which is connected to at least one sensor (10..14), in order to identify attempts at manipulation and to introduce counter-measures.
Description
Beschreibungdescription
Integrierte SchaltungIntegrated circuit
Die Erfindung betrifft eine integrierte Schaltung mit mehreren Sensoren zur Detektion von Manipulationen.The invention relates to an integrated circuit with a plurality of sensors for the detection of manipulations.
In integrierten Schaltungen werden oftmals Operationen durchgeführt, die mit der Verarbeitung geheimer Daten zu tun haben oder bei denen ein geheimer Schlüssel verwendet wird. Diese Daten bzw. Schlüssel sollen für Dritte nicht zugänglich sein. Um dies sicherzustellen, ist es bekannt, integrierte Schaltungen mit Sicherheitsvorkehrungen zu versehen. Zu diesem Zweck werden auf der integrierten Schaltung Sensoren angeord- net, die verschiedene Versuche von Manipulationen erkennen. Als Gegenmaßnahme werden beispielsweise die geheimen Daten gelöscht oder Teile der integrierten Schaltung zerstört, so daß auch weitere Manipulationsversuche erfolglos sind.In integrated circuits, operations are often carried out which have to do with the processing of secret data or which use a secret key. These data or keys should not be accessible to third parties. To ensure this, it is known to provide integrated circuits with safety precautions. For this purpose, sensors are installed on the integrated circuit that recognize different attempts at manipulation. As a countermeasure, for example, the secret data are deleted or parts of the integrated circuit are destroyed, so that further attempts at manipulation are unsuccessful.
Um eine möglichst gute Absicherung zu erhalten, ist es bekannt, mehrere Sensoren vorzusehen, welche auf der integrierten Schaltung weiträumig verteilt sind. Die Anschlüsse der Sensoren werden zu einer zentralen Auswertvorrichtung zusammengeführt, wo dann die Sensordaten ausgewertet werden, was gegebenenfalls zur Einleitung von Gegenmaßnahmen führt.In order to obtain the best possible protection, it is known to provide a plurality of sensors which are widely distributed on the integrated circuit. The connections of the sensors are brought together to form a central evaluation device, where the sensor data are then evaluated, which may lead to countermeasures being initiated.
Problematisch ist hierbei, daß bei einem erfolgreichen Angriff auf die zentrale Auswertvorrichtung sämtliche Sensoren deaktiviert werden können, so daß weitere Angriffe ungestört durchführbar sind.The problem here is that if the central evaluation device is successfully attacked, all sensors can be deactivated, so that further attacks can be carried out undisturbed.
Aufgabe der Erfindung ist es daher, eine integrierte Schaltung anzugeben, bei der sichergestellt ist, daß verteilte Sensoren nicht zentral abschaltbar sind.
Diese Aufgabe wird erfindungsgemäß durch eine integrierte Schaltung der eingangs genannten Art gelöst, die dadurch gekennzeichnet ist, daß mehrere dezentral angeordnete jeweils mit mindestens einem Sensor verbundene Auswertvorrichtungen vorgesehen sind zur Erkennung von Manipulationsversuchen und zur Einleitung von Gegenmaßnahmen.The object of the invention is therefore to provide an integrated circuit in which it is ensured that distributed sensors cannot be switched off centrally. This object is achieved according to the invention by an integrated circuit of the type mentioned at the outset, which is characterized in that a plurality of decentralized evaluation devices, each connected to at least one sensor, are provided for detecting attempts at manipulation and for initiating countermeasures.
Erfindungsgemäß wird das Problem also dadurch gelöst, daß nicht nur die Sensoren über die integrierte Schaltungen ver- teilt sind, sondern auch Auswertvorrichtungen verteilt sind. Wenn ein erfolgreicher Angriff auf eine Auswertvorrichtung gelingt, werden damit höchstens die mit dieser Auswertvorrichtung verbundenen Sensoren überwunden, nicht aber die Sensoren, die mit anderen Auswertvorrichtungen verbunden sind.According to the invention, the problem is thus solved in that not only are the sensors distributed over the integrated circuits, but also evaluation devices are distributed. If a successful attack on an evaluation device succeeds, at most the sensors connected to this evaluation device are overcome, but not the sensors which are connected to other evaluation devices.
In einer vorteilhaften Ausgestaltung wird als Gegenmaßnahme eine Funktionsstörung einer Funktionseinheit bewirkt, der die jeweiligen Sensoren und die auslösende Auswertvorrichtung zugeordnet sind. Dabei ist davon auszugehen, daß die Funktions- Störung einer einzigen Funktionseinheit bereits ausreicht, um die gesamte integrierte Schaltung unbrauchbar zu machen.In an advantageous embodiment, a malfunction of a functional unit is brought about as a countermeasure, to which the respective sensors and the triggering evaluation device are assigned. It can be assumed that the malfunction of a single functional unit is already sufficient to render the entire integrated circuit unusable.
Im Falle einer nichtspezifikationskonformen Verwendung einer Funktionseinheit oder eines Anschlußpads oder einer Schädi- gung der Funktionseinheiten wird beispielsweise die Versor- gungsSpannung, das Taktsignal, das Resetsignal oder ein Datensignal unterbrochen bzw. abgeleitet.If a functional unit or a connection pad or damage to the functional units is used in a manner not conforming to the specification, the supply voltage, the clock signal, the reset signal or a data signal is interrupted or derived, for example.
In einer günstigen Ausführung handelt es sich bei einer Funk- tionseinheit um ein Anschlußpad, da die Anschlußpads für Angriffe besonders einfach zugänglich sind.In a favorable embodiment, a functional unit is a connection pad, since the connection pads are particularly easy to access for attacks.
Vorteilhaft erweist sich ferner, wenn als Sensor ein strahlungsempfindliches, ein temperaturempfindliches, ein depassi- vierungsempfindliches, ein spannungsempfindliches oder ein frequenzempfindliches Element verwendet wird.
Die Erfindung wird nachfolgend anhand eines Ausführungsbei- spieles näher erläutert. Figur 1 zeigt dabei eine integrierte Schaltung gemäß der Erfindung in einer schematischen Darstellung.It also proves advantageous if a radiation-sensitive, a temperature-sensitive, a depassivation-sensitive, a voltage-sensitive or a frequency-sensitive element is used as the sensor. The invention is explained in more detail below on the basis of an exemplary embodiment. Figure 1 shows an integrated circuit according to the invention in a schematic representation.
Die Figur 1 zeigt eine integrierte Schaltung 1, die mehrere Funktionseinheiten 3 aufweist. Dies ist beispielsweise ein Anschlußpad für das Taktsignal CLK, dies können aber auch Speicherbereiche, kryptographische Operationen ausführende Bereiche oder für die Spannungsversorgung zuständige Bereiche der integrierten Schaltung sein. Einer Funktionseinheit ist dabei eine Auswertvorrichtung 2 zugeordnet, die mit einem oder mehreren Sensoren 10, 11, 12, 13 oder 14 verbunden ist.FIG. 1 shows an integrated circuit 1 which has several functional units 3. This is, for example, a connection pad for the clock signal CLK, but these can also be memory areas, areas performing cryptographic operations or areas of the integrated circuit responsible for the voltage supply. An evaluation device 2 is associated with a functional unit and is connected to one or more sensors 10, 11, 12, 13 or 14.
Bei dem Anschlußpad für das Taktsignal CLK ist es sinnvoll, das dort meßbare Signal auf seine Spannung und seine Frequenz zu überwachen, um festzustellen, ob diese in einem vorgegebenen zulässigen Bereich liegen. Dazu ist ein spannungsempfindliches Element 13 und ein frequenzempfindliches Element 14 mit dem Anschlußpad verbunden. Die Elemente 13 und 14 erfassen den augenblicklichen Wert und geben diesen an eine Auswertvorrichtung 2 weiter. Diese führt die Überwachung durch, um festzustellen, ob die vorgegebenen Bereiche verlassen werden. Wenn dies der Fall ist, wird von einem Manipulationsver- such ausgegangen und es werden Gegenmaßnahmen ergriffen. In diesem Fall ist vorgesehen, den Taktsignaleingang mit dem Bezugspotential "0" zu verbinden. Zu diesem Zweck steuert die Auswertvorrichtung einen Schalter 4 an, der die gewünschte Verbindung herstellt. Statt dessen könnte das Taktsignal aber auch mit der positiven VersorgungsSpannung verbunden werden. Statt der Verbindung mit einem festen Potential ist ebenso möglich, die das Signal führende Leitung durch einen Schalter zu unterbrechen. Diese Alternative ist in der Figur 1 jedoch nicht dargestellt.With the connection pad for the clock signal CLK, it makes sense to monitor the signal that can be measured there for its voltage and its frequency in order to determine whether these are within a predetermined permissible range. For this purpose, a voltage-sensitive element 13 and a frequency-sensitive element 14 are connected to the connection pad. The elements 13 and 14 record the instantaneous value and pass it on to an evaluation device 2. This carries out the monitoring to determine whether the specified areas are left. If this is the case, a manipulation attempt is assumed and countermeasures are taken. In this case, it is provided to connect the clock signal input to the reference potential "0". For this purpose, the evaluation device controls a switch 4, which establishes the desired connection. Instead, the clock signal could also be connected to the positive supply voltage. Instead of connecting to a fixed potential, it is also possible to interrupt the line carrying the signal by means of a switch. However, this alternative is not shown in FIG. 1.
Eine im Zusammenhang mit Anschlußpads besonders geeignete Möglichkeit zur Herbeiführung einer Funktionsstörung einer
Funktionseinheit besteht darin, eine signalführende Leitung über einen Schalter mit einer ESD-Beschaltung zu verbinden. Dies ist schaltungstechnisch besonders einfach zu realisieren, da die Anschlußpads zur Ableitung von statischen Aufla- düngen ohnehin über eine Ableitungsdiode mit einer masseführenden Leitung verbunden sind. Dieser einen Transistor parallel zu schalten verursacht nur geringen Aufwand und ist kostengünstig.A particularly suitable possibility in connection with connection pads for causing a malfunction of a The functional unit consists of connecting a signal-carrying line to an ESD circuit using a switch. This is particularly simple to implement in terms of circuitry, since the connection pads for the discharge of static charges are connected to a ground lead anyway via a discharge diode. Connecting this one transistor in parallel causes little effort and is inexpensive.
Bestimmte Bereiche sind besonders empfindlich auf Temperaturänderungen und besitzen daher zur Detektion von Manipulationsversuchen temperaturempfindliche Elemente 11. Wiederum andere Funktionseinheiten sollen vor einer Depassivierung geschützt werden und sind folglich mit einem depassivierungs- empfindlichen Element 12 versehen. Die Auswahl und Anordnung der Sensoren ist flexibel handhabbar und kann den jeweiligen Anforderungen angepaßt werden. Selbstverständlich ist auch denkbar, daß Funktionseinheiten unkritisch sind bezüglich eines Angriffs und besitzen daher weder Sensoren noch Auswert- Vorrichtungen.Certain areas are particularly sensitive to changes in temperature and therefore have temperature-sensitive elements 11 for the detection of manipulation attempts. Still other functional units are to be protected against depassivation and are consequently provided with an element 12 sensitive to depassivation. The selection and arrangement of the sensors can be handled flexibly and can be adapted to the respective requirements. Of course, it is also conceivable that functional units are not critical with regard to an attack and therefore have neither sensors nor evaluation devices.
Bei den strahlungsempfindlichen Elementen kann es sich um spezialisierte Sensoren handeln, die entweder für eine temporäre Einstrahlung, unter Umständen mit verschiedenen Wellen- längen, geeignet sind oder aber solche, die empfindlich sind gegen Bestrahlung, die zu chronische Strahlenschäden führt. Bei den Sensoren, die spannungsempfindliche Elemente aufweisen, sind sowohl solche Abweichungen zu beachten, die den Pegel der Spannung betreffen, als auch solche Abweichungen, die in der Form von Spannungsspitzen auftreten.The radiation-sensitive elements can be specialized sensors that are either suitable for temporary radiation, possibly with different wavelengths, or those that are sensitive to radiation that leads to chronic radiation damage. In the case of sensors which have voltage-sensitive elements, both deviations which relate to the level of the voltage and deviations which occur in the form of voltage peaks must be taken into account.
Die erfindungsgemäße integrierte Schaltung ist besonders vorteilhaft bei Chipkarten einsetzbar. Chipkarten werden oft für sicherheitskritische Anwendungen eingesetzt, beispielsweise als bargeldloses Zahlungsmittel oder zur Zugangskontrolle. Entsprechend groß ist einerseits das Sicherheitsbedürfnis, was den Schutz vor einem unberechtigten Zugriff angeht, und
andererseits der Aufwand, der von unberechtigten Dritten getrieben wird, um Sicherheitsvorrichtungen der integrierten Schaltung zu überwinden.
The integrated circuit according to the invention can be used particularly advantageously with chip cards. Chip cards are often used for security-critical applications, for example as cashless means of payment or for access control. On the one hand, the need for security in terms of protection against unauthorized access is correspondingly high, and on the other hand, the effort that is driven by unauthorized third parties to overcome security devices of the integrated circuit.
BezugszeichenlisteLIST OF REFERENCE NUMBERS
1 integrierte Schaltung1 integrated circuit
2 Auswertvorrichtung 3 Funktionseinheit2 evaluation device 3 functional unit
4 Schalter4 switches
10 strahlungsempfindliches Element10 radiation sensitive element
11 temperaturempfindliches Element11 temperature sensitive element
12 depassivierungsempfindliches Element 13 spannungsempfindliches Element12 depassivation-sensitive element 13 voltage-sensitive element
14 frequenzempfindliches Element
14 frequency sensitive element
Claims
1. Integrierte Schaltung mit mehreren Sensoren (10, 11, 12, 13, 14) zur Detektion von Manipulationen, dadurch gekennzeichnet, daß mehrere dezentral angeordnete jeweils mit mindestens einem Sensor (10, 11, 12, 13, 14) verbundene Auswertvorrichtungen (2) vorgesehen sind zur Erkennung von Manipulationsversuchen und zur Einleitung von Gegenmaßnahmen.1. Integrated circuit with a plurality of sensors (10, 11, 12, 13, 14) for the detection of manipulations, characterized in that several decentrally arranged evaluation devices (2. 11, 12, 13, 14) each connected to at least one sensor (10 ) are provided for the detection of manipulation attempts and for the initiation of countermeasures.
2. Integrierte Schaltung nach Anspruch 1, dadurch gekennzeichnet, daß sie mehrere Funkti- onseinheiten (3) umfaßt, denen jeweils mindestens ein Sensor (10, 11, 12, 13, 14) und eine mit diesen verbundene Auswertvorrichtung (2) zugeordnet sind, wobei die jeweilige Auswert- Vorrichtung (2) bei Erkennung eines Manipulationsversuchs als Gegenmaßnahme eine Funktionsstörung der jeweiligen Funktions- einheit (3) bewirkt.2. Integrated circuit according to claim 1, characterized in that it comprises a plurality of functional units (3), each of which is assigned at least one sensor (10, 11, 12, 13, 14) and an evaluation device (2) connected to them, wherein the respective evaluation device (2) causes a malfunction of the respective functional unit (3) upon detection of a manipulation attempt as a countermeasure.
3. Integrierte Schaltung nach Anspruch 1 oder 2, dadurch gekennzeichnet, daß es sich bei einer Funktionseinheit (3) um ein Anschlußpad der intergrierten Schaltung handelt.3. Integrated circuit according to claim 1 or 2, characterized in that it is a functional unit (3) is a connection pad of the integrated circuit.
4. Integrierte Schaltung nach Anspruch 3, dadurch gekennzeichnet, daß als Gegenmaßnahme das Anschlußpad mit einem festen Potential verbindbar ist.4. Integrated circuit according to claim 3, characterized in that, as a countermeasure, the connection pad can be connected to a fixed potential.
5. Integrierte Schaltung nach Anspruch 4, d a d u r c h g e k e n n z e i c h n e t , d a ß die Verbindung mit einem festen Potential über eine ESD-Beschaltung erfolgt. 5. Integrated circuit according to claim 4, characterized in that ß the connection with a fixed potential via an ESD circuit.
6. Integrierte Schaltung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß als Sensor ein strahlungsempfindliches Element (10) vorgesehen ist.6. Integrated circuit according to one of the preceding claims, characterized in that a radiation-sensitive element (10) is provided as a sensor.
7. Integrierte Schaltung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß als Sensor ein temperaturempfindliches Element (11) vorgesehen ist.7. Integrated circuit according to one of the preceding claims, characterized in that a temperature-sensitive element (11) is provided as a sensor.
8. Integrierte Schaltung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß als Sensor ein depassivierungsempfindliches Element (12) vorgesehen ist.8. Integrated circuit according to one of the preceding claims, characterized in that a depassivation-sensitive element (12) is provided as the sensor.
9. Integrierte Schaltung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß als Sensor ein spannungsempfindliches Element (13) vorgesehen ist.9. Integrated circuit according to one of the preceding claims, characterized in that a voltage-sensitive element (13) is provided as a sensor.
10. Integrierte Schaltung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß als Sensor ein frequenzempfindliches Element (14) vorgesehen ist.10. Integrated circuit according to one of the preceding claims, characterized in that a frequency-sensitive element (14) is provided as a sensor.
11. Chipkarte aufweisend eine integrierte Schaltung nach einem der Ansprüche 1 bis 10. 11. Chip card having an integrated circuit according to one of claims 1 to 10.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE10218096.2 | 2002-04-23 | ||
| DE10218096A DE10218096A1 (en) | 2002-04-23 | 2002-04-23 | Integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2003092071A2 true WO2003092071A2 (en) | 2003-11-06 |
| WO2003092071A3 WO2003092071A3 (en) | 2004-05-13 |
Family
ID=29224685
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/DE2003/000413 WO2003092071A2 (en) | 2002-04-23 | 2003-02-12 | Integrated circuit comprising several sensors for detecting a manipulation |
Country Status (3)
| Country | Link |
|---|---|
| DE (1) | DE10218096A1 (en) |
| TW (1) | TW200305994A (en) |
| WO (1) | WO2003092071A2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102006045905A1 (en) * | 2006-09-28 | 2008-04-17 | Infineon Technologies Ag | Semiconductor device i.e. smart card-controller, has multiple modules, where two of modules respectively include alarm recognition device for recognizing attack e.g. differential fault attack and reengineering attack |
| EP2133812A1 (en) * | 2007-03-26 | 2009-12-16 | Pingxiao Deng | A tamper-resistant detecting device with self-destructed protection function and a method thereof |
| US11055409B2 (en) | 2019-01-06 | 2021-07-06 | Nuvoton Technology Corporation | Protected system |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3023427A1 (en) * | 1979-06-28 | 1981-01-08 | Gretag Ag | MOBILE DATA KEEPER |
| US4910707A (en) * | 1984-09-27 | 1990-03-20 | Siemens Aktiengesellschaft | EEPROM with protective circuit |
| US5060261A (en) * | 1989-07-13 | 1991-10-22 | Gemplus Card International | Microcircuit card protected against intrusion |
| WO2000028399A1 (en) * | 1998-11-05 | 2000-05-18 | Infineon Technologies Ag | Protection circuit for an integrated circuit |
| US20020036879A1 (en) * | 2000-09-20 | 2002-03-28 | Francois Vacherand | Secure integrated electronic device |
| DE10101995A1 (en) * | 2001-01-18 | 2002-07-25 | Philips Corp Intellectual Pty | Electrical or electronic switching arrangement comprises a detector unit and a comparator unit connected to the detector unit to compare the starting voltage with a reference voltage |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19639033C1 (en) * | 1996-09-23 | 1997-08-07 | Siemens Ag | Copy prevention arrangement for semiconductor chip |
| DE19938890C2 (en) * | 1999-08-17 | 2001-08-09 | Infineon Technologies Ag | Integrated circuit and circuit arrangement for supplying power to an integrated circuit |
| DE10058078C1 (en) * | 2000-11-23 | 2002-04-11 | Infineon Technologies Ag | Integrated circuit with analyzer protection has gaps left by first group of conducting tracks in wiring plane and filled by second group of conducting tracks provided for protection of IC |
| DE10065339B4 (en) * | 2000-12-27 | 2004-04-15 | Infineon Technologies Ag | Capacitive sensor as a protective device against attacks on a security chip |
-
2002
- 2002-04-23 DE DE10218096A patent/DE10218096A1/en not_active Withdrawn
-
2003
- 2003-02-12 WO PCT/DE2003/000413 patent/WO2003092071A2/en not_active Application Discontinuation
- 2003-02-13 TW TW092103022A patent/TW200305994A/en unknown
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3023427A1 (en) * | 1979-06-28 | 1981-01-08 | Gretag Ag | MOBILE DATA KEEPER |
| US4910707A (en) * | 1984-09-27 | 1990-03-20 | Siemens Aktiengesellschaft | EEPROM with protective circuit |
| US5060261A (en) * | 1989-07-13 | 1991-10-22 | Gemplus Card International | Microcircuit card protected against intrusion |
| WO2000028399A1 (en) * | 1998-11-05 | 2000-05-18 | Infineon Technologies Ag | Protection circuit for an integrated circuit |
| US20020036879A1 (en) * | 2000-09-20 | 2002-03-28 | Francois Vacherand | Secure integrated electronic device |
| DE10101995A1 (en) * | 2001-01-18 | 2002-07-25 | Philips Corp Intellectual Pty | Electrical or electronic switching arrangement comprises a detector unit and a comparator unit connected to the detector unit to compare the starting voltage with a reference voltage |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102006045905A1 (en) * | 2006-09-28 | 2008-04-17 | Infineon Technologies Ag | Semiconductor device i.e. smart card-controller, has multiple modules, where two of modules respectively include alarm recognition device for recognizing attack e.g. differential fault attack and reengineering attack |
| EP2133812A1 (en) * | 2007-03-26 | 2009-12-16 | Pingxiao Deng | A tamper-resistant detecting device with self-destructed protection function and a method thereof |
| EP2133812A4 (en) * | 2007-03-26 | 2011-11-09 | Pingxiao Deng | A tamper-resistant detecting device with self-destructed protection function and a method thereof |
| US11055409B2 (en) | 2019-01-06 | 2021-07-06 | Nuvoton Technology Corporation | Protected system |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200305994A (en) | 2003-11-01 |
| DE10218096A1 (en) | 2003-11-13 |
| WO2003092071A3 (en) | 2004-05-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0151714B1 (en) | Apparatus for securing secret information | |
| DE3041109C2 (en) | ||
| DE69527773T2 (en) | Circuit arrangement for monitoring the use of functions in an integrated circuit | |
| DE60122853T2 (en) | Method and device for storing data in an integrated circuit | |
| DE3889017T2 (en) | Data card circuits. | |
| DE2560559C2 (en) | ||
| DE102006005053B4 (en) | Apparatus and method for detecting an attack on an electrical circuit | |
| EP0993653B1 (en) | Method and arrangement for protecting electronic computing units, in particular chip cards | |
| EP1182702B1 (en) | Device for the Protection of an Integrated Circuit | |
| EP1149358B1 (en) | Contactless chip card | |
| DE68921057T2 (en) | Protective device for an electronic card and use for protecting a scanning terminal for a magnetic and / or microprocessor card. | |
| DE102012109665A1 (en) | Tamper Detection Measures to Abandon Physical Attacks on a Security ASIC | |
| DE102004003078A1 (en) | Integrated circuit security system for smart card, has protection circuit with variable capacitor which supplies power supply line with displacement current when integrated circuit device is in active state | |
| DE60312704T2 (en) | Electronic data processing device | |
| DE102005056940B4 (en) | Apparatus and method for non-volatile storage of a status value | |
| DE69528449T2 (en) | Integrated semiconductor circuit arrangement for protecting multiple aids in one electronic unit | |
| DE60128646T2 (en) | Method and device for protection against unauthorized use of an integrated circuit | |
| DE102004015546B4 (en) | An integrated circuit semiconductor chip and method for securing a semiconductor integrated circuit | |
| DE69535642T2 (en) | SECURE KEYBOARD INSTALLATION | |
| DE4018688C2 (en) | Method for protecting an integrated circuit against reading sensitive data | |
| DE60213878T2 (en) | DIGITAL ELECTRONIC COMPONENT PROTECTED AGAINST ELECTRICAL AND ELECTROMAGNETIC ANALYZES | |
| EP2722788B1 (en) | Apparatus for reading a chip card and method for detecting a skimming module | |
| EP2019996A1 (en) | Sensor with a circuit arrangement | |
| EP0276450A1 (en) | Data protection circuit to inhibit the transmission of signals on a bus | |
| WO2003092071A2 (en) | Integrated circuit comprising several sensors for detecting a manipulation |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AK | Designated states |
Kind code of ref document: A2 Designated state(s): BR CA CN IL IN JP KR MX RU UA US |
|
| AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT SE SI SK TR |
|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
| DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
| 122 | Ep: pct application non-entry in european phase | ||
| NENP | Non-entry into the national phase |
Ref country code: JP |
|
| WWW | Wipo information: withdrawn in national office |
Country of ref document: JP |