WO2003088328A2 - Procede de fabrication d'une structure capacitive d'un composant electronique - Google Patents
Procede de fabrication d'une structure capacitive d'un composant electronique Download PDFInfo
- Publication number
- WO2003088328A2 WO2003088328A2 PCT/FR2003/001245 FR0301245W WO03088328A2 WO 2003088328 A2 WO2003088328 A2 WO 2003088328A2 FR 0301245 W FR0301245 W FR 0301245W WO 03088328 A2 WO03088328 A2 WO 03088328A2
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- WO
- WIPO (PCT)
- Prior art keywords
- layer
- electrode
- studs
- resin
- depositing
- Prior art date
Links
- 238000001465 metallisation Methods 0.000 title claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 239000000463 material Substances 0.000 claims abstract description 31
- 239000003989 dielectric material Substances 0.000 claims abstract description 13
- 239000011347 resin Substances 0.000 claims description 20
- 229920005989 resin Polymers 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 14
- 238000000151 deposition Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 8
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 239000010949 copper Substances 0.000 claims description 7
- 239000000203 mixture Substances 0.000 claims description 5
- 238000011049 filling Methods 0.000 claims description 4
- 208000031481 Pathologic Constriction Diseases 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 90
- 230000004888 barrier function Effects 0.000 description 8
- 239000003990 capacitor Substances 0.000 description 7
- 238000009792 diffusion process Methods 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 239000000956 alloy Substances 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 5
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- 229910052712 strontium Inorganic materials 0.000 description 5
- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 description 5
- 239000000758 substrate Substances 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052797 bismuth Inorganic materials 0.000 description 3
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 description 3
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 2
- 230000003667 anti-reflective effect Effects 0.000 description 2
- 239000005441 aurora Substances 0.000 description 2
- 229910052788 barium Inorganic materials 0.000 description 2
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- HTXDPTMKBJXEOW-UHFFFAOYSA-N dioxoiridium Chemical compound O=[Ir]=O HTXDPTMKBJXEOW-UHFFFAOYSA-N 0.000 description 2
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum oxide Inorganic materials [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 229910052727 yttrium Inorganic materials 0.000 description 2
- VWQVUPCCIRVNHF-UHFFFAOYSA-N yttrium atom Chemical compound [Y] VWQVUPCCIRVNHF-UHFFFAOYSA-N 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910004200 TaSiN Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical group [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- MCMNRKCIXSYSNV-UHFFFAOYSA-N ZrO2 Inorganic materials O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 description 1
- WNZPMZDPEDYPKZ-UHFFFAOYSA-M [OH-].[O--].[Y+3] Chemical compound [OH-].[O--].[Y+3] WNZPMZDPEDYPKZ-UHFFFAOYSA-M 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 239000006117 anti-reflective coating Substances 0.000 description 1
- 238000000231 atomic layer deposition Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 101150051027 celf2 gene Proteins 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005868 electrolysis reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910052741 iridium Inorganic materials 0.000 description 1
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 description 1
- 229910052747 lanthanoid Inorganic materials 0.000 description 1
- 150000002602 lanthanoids Chemical class 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 229910052748 manganese Inorganic materials 0.000 description 1
- 239000011572 manganese Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- HBVFXTAPOLSOPB-UHFFFAOYSA-N nickel vanadium Chemical compound [V].[Ni] HBVFXTAPOLSOPB-UHFFFAOYSA-N 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- RUDFQVOCFDJEEF-UHFFFAOYSA-N oxygen(2-);yttrium(3+) Chemical compound [O-2].[O-2].[O-2].[Y+3].[Y+3] RUDFQVOCFDJEEF-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920000052 poly(p-xylylene) Polymers 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- PBCFLUZVCVVTBY-UHFFFAOYSA-N tantalum pentoxide Inorganic materials O=[Ta](=O)O[Ta](=O)=O PBCFLUZVCVVTBY-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 239000004408 titanium dioxide Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- -1 tungsten nitride Chemical class 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02167—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
- H01L21/0215—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing tantalum, e.g. TaSiOx
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02183—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing tantalum, e.g. Ta2O5
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02186—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing titanium, e.g. TiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02194—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing more than one metal element
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02362—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment formation of intermediate layers, e.g. capping layers or diffusion barriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
- H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
Definitions
- the invention relates to the field of microelectronics. More specifically, it relates to micro-components incorporating one or more capacitive structures. These capacitive structures can be produced inside the micro-component, above metallization levels directly connected to the terminals of the transistors or other conductive structure.
- these structures can be used as an embedded DRAM.
- capacitive structures can also be produced above the last apparent metallization level of the micro-component, and be used as a capacitor, for example to serve as a decoupling capacitor.
- the invention relates more precisely to the shape and arrangement of the different parts of the capacitive structure which are determined to very greatly increase its "capacitance", that is to say its capacity per unit of area, without increasing this too much. neither the manufacturing costs nor the surface used on the micro-component.
- the value of the capacitance of the capacitor is essentially a function of the type of dielectric material used, as well as of the facing surface of the two metal electrodes.
- the "capacitance" or the capacity per unit area is predominantly fixed by the thickness of the insulating layer and its relative permittivity.
- An objective of the invention is therefore to allow the production of capacitive structures capable of operating at frequencies of the order of the frequencies of the microprocessors, with which the memory cells are intended to be associated.
- Another objective of the invention is to provide capacitive structures which can be produced either on metallization levels inside the micro-components, or even on quasi-outside levels, by offering clearly capacitance values. higher than the values usually observed.
- the invention therefore relates to a method of producing a capacitive structure above a metallization level of an electronic component.
- This process comprises the following stages, consisting above the metallization level, in:
- - depositing a second layer of material with low relative permittivity depositing a second layer of resin with low relative permittivity; deposit a second layer of resin, and etch it to keep it level with the remaining areas of the first layer of resin, on areas of lesser width, below which the upper sections of future studs will be defined; etching this set of layers of material of low relative permittivity to define studs comprising a lower section and an upper section of lesser width; - deposit a first metallic layer intended to form the first electrode, a first layer covering the studs to adopt a crenellated structure: depositing a layer of dielectric material on top of the first metallic layer; electrolytically deposit a layer of copper on top of the layer of dielectric material by filling the recesses of the crenellated structure, so as to form the second electrode.
- the pads are produced by making successive deposits of layers of materials of low relative permittivity, between which is carried out the deposition of layers of resin making it possible to protect the material of underlying low permittivity.
- the patterns of the slots are thus obtained by a single etching step which simplifies the manufacturing process, and ensures perfect positioning accuracy of the different sections of the studs. It is possible to use masks derived from each other for the operations of removing the resin layers located at different heights.
- the first electrode has a crenellated structure, covering the shape of a plurality of pads of material of low relative permittivity present above the metallization level; the layer of dielectric material covers the first electrode;
- the second electrode covers the layer of dielectric material, filling the hollows of the structure with slots, and presenting on its upper face a connection pad.
- the capacitive structure according to the invention has a first electrode which is located at different height levels relative to the metallization level. In the lower parts of the slots, the first electrode is close to the metallization level, while in the upper parts of the slot, the first electrode is separated from the metallization level by a material of low relative permittivity, i.e. say typically less than 2.4.
- the first electrode therefore having a wavy shape, it therefore defines recessed areas which are joined by the dielectric layer covering it.
- the second electrode has a characteristic shape since it has a substantially planar upper face and a lower face which follows the square shape of the first electrode.
- the surface facing the electrodes corresponds to the developed surface of the niche structure which is clearly greater than the equivalent surface of the electrode which will be plane. This facing surface is all the more important as the slots have a high height.
- the various studs of material of relative permittivity on which the first electrode rests consist of a plurality of superposed sections in which each section has a width less than that of the section on which it rests.
- each stud forming the niche structure has several height rungs defining at each rung a vertical portion and a horizontal portion for the electrode.
- the number of overlapping sections can be determined according to technological constraints.
- the studs can be made up of a single section forming slots made up of a single rung.
- These studs can also include two superposed sections, the one of which at the upper level is of smaller width.
- the invention also covers other variants in which the number of sections is higher, with the width progression already mentioned.
- the second electrode is made of copper, and obtained by electrolytic processes, which makes it possible to obtain a resistivity of less than 5 ⁇ .cm.
- the advantages of a very low resistivity are reflected in particular by a low heating of the capacitive structure in dynamic mode, as well as good operation at high frequency, of a conductivity appreciable thermal. These properties are both advantageous for the two electrodes.
- the two electrodes are separated by a layer of dielectric material, which can be deposited either as a homogeneous layer of the same material, or an alloy of several of these materials.
- ferroelectric and / or pyroelectric oxides will be preferred.
- metallic or ferroelectric oxides Hafnium dioxide, Tantalum pentoxide, Zirconium dioxide, Lanthanum oxides, di-Yttrium trioxide, alumina, Titanium dioxide, as well as titanates are known.
- STO strontium tantalates
- BST strontium and barium titanates
- SBT strontium and bismuth tantalates
- PZT lead and lead zirconate titanates
- PZT lead titanates and zirconates with Lanthanides
- SBN Strontium and Bismuth nobiates
- SBTN Strontium and Bismuth tantalates and niobates
- Barium and Yttrium cuprates Manganese alkaloxides Me 2 Mn0 3.
- the dielectric layer is produced by the superposition of elementary layers of different materials, forming a nanolaminated structure.
- each of the layers is very thin, of the order of a few Angstroms to a few hundred Angstroms.
- the stoichiometry of the materials varies from one elementary layer to another in the nanolaminated structure.
- the variation in band structure of each elementary layer of the nanolaminated structure has the consequence of modifying the overall band structure of alloys and of ferroelectric oxide compounds through only a few atomic layers.
- This type of nanolaminated structure therefore comprises alloys having band structures having a gap band greater than 5 eN with a permittivity as high as possible.
- the electrodes in contact with the oxide must be laminated so as to reduce the migration of oxygen through the metal layers.
- the damascene structure offers an integration advantage for the metal oxide alloys used in order to obtain higher densities. In this way, particularly significant relative permittivity values are obtained, which acts in favor of increasing the capacitance.
- the example given below illustrates the manufacture of a capacitive structure above a metallization level, without representation of the surrounding areas.
- a capacitive structure according to the invention can be produced on a micro-component as illustrated in FIG. 1.
- the substrate (2) of this microcomponent comprises at least one metallization level (3) which can be connected to active zones inside the micro-component, or alternatively at interconnection pads opening onto the upper face of the substrate.
- it is a metallization level located at the upper face of the substrate, and which is covered with a passivation layer (4), typically made of Si0 2 or SiON.
- a material of low relative permittivity is deposited.
- This material can typically be that marketed by ASM under the reference AURORA.
- This deposit made by PECND (Plasma Chemical Napor Deposition).
- This deposit has a thickness of the order of a few microns.
- a barrier layer (6) is deposited, also serving as a stop layer and a mechanical action on the state of the stresses in the layers (5) and (12 ).
- This layer (6) can typically be made of carbide or silicon nitride.
- This layer (6) is deposited by PECVD, and has a thickness less than one micron, and typically of the order of 350 ⁇ .
- a photopositive resin layer is deposited, which can for example be composed of an anti-reflective layer type SJR AR14 and a DUN resin from the English Deep Ultra Violet, for deep UV, type SJR 210.
- this resin (7) is lithographed in order to then be eliminated in the zones (8), giving access to certain portions of the barrier layer (6) which is then itself eliminated by chemical etching in using for example a mixture of PFC: 0 2 : N 2 : Ar with a PFC (Perfluoro carbon) such as C 4 F 8; C 3 F 8 ⁇ C 2 H 2 F 2> using radio frequency plasma.
- PFC Perfluoro carbon
- a second layer (12) of low-permittivity material is deposited, which may be but not necessarily identical to the first layer (5) deposited above the metallization level .
- this second layer is also of AURORA material, it is arranged by PECVD and has a thickness typically of the order of two microns.
- a hard mask layer (13) is deposited.
- This layer of hard mask comprises several superposed layers, but which are illustrated in the figures only by a single layer.
- the first layer is typically made of silicon carbide.
- This hard mask is used as a diffusion barrier for the low permittivity material.
- This hard mask can also include a layer of silicon nitride (SiN), used to mask the layers located below. It can also include a layer of silicon oxynitride (SiON) serving as BARC (Barrier anti reflective coating). All the layers of the hard mask (13) are deposited by PECVD, over a thickness of the order of 2000 ⁇ .
- a new resin layer (14) is deposited, composed of an anti-reflective layer type SJR AR 14 and a DUV resin of type SJR 210.
- this resin (14) is then lithographed in order to then be eliminated using a pattern derived from that which served to define the patterns of the first layer of resin (6) as illustrated in FIG. 4 by a so-called self-alignment lithography with respect to the layer (6)
- This operation makes it possible to define zones (15) of the second resin layer (14) which are located directly above the remaining zones (10) of the first layer of resin (6). These zones (15) define spaces (16) through which the hard mask layer (13) can be engraved, as illustrated in FIG. 10.
- This etching allows the upper layer (12) of materials of low relative permittivity to be visible. This etching can take place using mixtures of C 4 F 8 : 0 2 : N 2 : H 2 : Ar.
- an etching of the layers (12.5) of materials with low relative permittivity is anisotropic and takes place until the remaining zones (10) of the first layer of resin appear to form the upper section (18) and the lower section (19) of the stud (20).
- This etching is carried out using a mixture of CF 8 : 0 2 : Ar: N 2 : H 2
- cleaning is carried out with a mixture of oxygen and ammonia.
- the hard mask areas (21) are removed, it being understood that the SiC layer of the hard mask (13) can be kept in the upper areas. This then leads to a structure as illustrated in FIG. 12 comprising different studs each having height steps.
- a metallic conductive layer is deposited, intended to form the lower electrode.
- This layer (22) can be deposited by various conventional techniques, among which there may be mentioned the technique of PND (Plasma Vapor Disposition), E-BEAM, CVD (Chemical Vapor Disposition), ALD (Atomic Layer Disposition), as well as the methods electrolytic growth. Materials suitable for use in forming this lower electrode
- (22) can be chosen from the group comprising Tungsten, Molybdenum, Ruthenium, Aluminum, Titanium, Nickel, Gallium, Palladium,
- the thickness thus deposited is typically greater than 10 ⁇ .
- a nanolaminated structure (23) is deposited, produced from different layers of ferroelectric oxides.
- the first layer having a thickness of 5 to 10 ⁇ , is made from A1 X 0 3 - X , with x between O. and 3.
- the second layer has a thickness of the order of 10 to 15 ⁇ , and is produced from Ta z - 2 0 5 - z Al 2 O x , with z between Oet 2.
- the third layer of a thickness of the order of 15 to 20 ⁇ produced from Ti0 2 Al x 0 3 + y , with including between 0 and 3 .
- the fourth layer with a thickness of the order of 40 to 100 ⁇ is produced from TiO y . x Ta z - 0 5 + z .
- the fifth layer is produced from TiO y Ta 3 - z O z .
- the sixth, seventh and eighth layers are identical to the third, second and first layers respectively.
- the nanolaminated structure thus obtained has a thickness of greater than 50 ⁇ , and has a permittivity of the order of between 3 and 12.
- nanolaminated structure (23) described above is a nonlimiting example and in which certain elements can be substituted without departing from the scope of the invention.
- a barrier layer to the diffusion of oxygen can also act as a primer for the deposition of the upper layers.
- This layer also serves to improve the resistance to electromigration and diffusion of oxygen.
- This layer can be deposited by an atomic layer deposition (ALD) technique. Such a technique gives very good thickness uniformity and excellent integrity to this diffusion barrier layer (24).
- the materials which can be used to produce this diffusion barrier layer can be titanium nitride or tungsten nitride, tantalum nitride or else one of the following materials: TaAIN, TiAIN, MoN, CoW, TaSiN.
- a primer layer is subsequently deposited to deposit a metal by electrolysis such as copper.
- This deposit has zones (26) filling the spaces between studs (20) and it is carried out over a thickness making it possible to cover the entire primer layer (25) and therefore all of the studs (20).
- This deposit has a flat upper face (27) which will be used to define the connection pad to the second electrode.
- connection pad (32) thereafter and as shown in Figure 16, is deposited layers (29,30) typically BCB, in Parylene ®, to define a central housing within which is provided a second electrolytic deposit of copper ( 31) defining the connection pad (32).
- This connection pad can receive a passivation layer, typically chromium or nickel or a nickel vanadium or TiN or TaN or WN alloy.
- the capacity illustrated in FIG. 16 can have a capacitance of the order of 100 nanoFarad per square millimeter.
- the structure according to the invention has multiple advantages, in particular that of offering a high capacitance, which makes it suitable for multiple applications, in particular to the production of dynamic memory cells integrated in a micro-component such as a microprocessor or even as a capacitor, and typically of decoupling capacitor used in filtering arrangements.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Mechanical Engineering (AREA)
- Organic Chemistry (AREA)
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- Materials Engineering (AREA)
- Plasma & Fusion (AREA)
- Ceramic Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Inorganic Chemistry (AREA)
- Semiconductor Memories (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2003246845A AU2003246845A1 (en) | 2002-04-17 | 2003-04-17 | Method for production of a capacitive structure above a metallisation level of an electronic component |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR02/04782 | 2002-04-17 | ||
FR0204782A FR2838868B1 (fr) | 2002-04-17 | 2002-04-17 | Structure capacitive realisee au dessus d'un niveau de metallisation d'un composant electronique, composants electroniques incluant une telle structure capacitive, et procede de realisation d'une telle structure capacitive |
Publications (2)
Publication Number | Publication Date |
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WO2003088328A2 true WO2003088328A2 (fr) | 2003-10-23 |
WO2003088328A3 WO2003088328A3 (fr) | 2004-04-01 |
Family
ID=28686124
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/FR2003/001245 WO2003088328A2 (fr) | 2002-04-17 | 2003-04-17 | Procede de fabrication d'une structure capacitive d'un composant electronique |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU2003246845A1 (fr) |
FR (1) | FR2838868B1 (fr) |
WO (1) | WO2003088328A2 (fr) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0515824A2 (fr) * | 1991-05-31 | 1992-12-02 | Sumitomo Electric Industries, Ltd | Elément de condensateur |
US5817555A (en) * | 1996-05-02 | 1998-10-06 | Lg Semicon Co., Ltd. | Method for fabricating capacitor of semiconductor device using hemispherical grain (HSG) polysilicon |
EP1022783A2 (fr) * | 1999-01-12 | 2000-07-26 | Lucent Technologies Inc. | Dispositif de circuit intégré avec un condensateur à double damasquinage et son procédé de fabrication |
US6211063B1 (en) * | 1999-05-25 | 2001-04-03 | Taiwan Semiconductor Manufacturing Company | Method to fabricate self-aligned dual damascene structures |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5807777A (en) * | 1997-11-03 | 1998-09-15 | Texas Instruments - Acer Incorporated | Method of making a double stair-like capacitor for a high density DRAM cell |
US5895239A (en) * | 1998-09-14 | 1999-04-20 | Vanguard International Semiconductor Corporation | Method for fabricating dynamic random access memory (DRAM) by simultaneous formation of tungsten bit lines and tungsten landing plug contacts |
-
2002
- 2002-04-17 FR FR0204782A patent/FR2838868B1/fr not_active Expired - Fee Related
-
2003
- 2003-04-17 AU AU2003246845A patent/AU2003246845A1/en not_active Abandoned
- 2003-04-17 WO PCT/FR2003/001245 patent/WO2003088328A2/fr not_active Application Discontinuation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0515824A2 (fr) * | 1991-05-31 | 1992-12-02 | Sumitomo Electric Industries, Ltd | Elément de condensateur |
US5817555A (en) * | 1996-05-02 | 1998-10-06 | Lg Semicon Co., Ltd. | Method for fabricating capacitor of semiconductor device using hemispherical grain (HSG) polysilicon |
EP1022783A2 (fr) * | 1999-01-12 | 2000-07-26 | Lucent Technologies Inc. | Dispositif de circuit intégré avec un condensateur à double damasquinage et son procédé de fabrication |
US6211063B1 (en) * | 1999-05-25 | 2001-04-03 | Taiwan Semiconductor Manufacturing Company | Method to fabricate self-aligned dual damascene structures |
Also Published As
Publication number | Publication date |
---|---|
AU2003246845A8 (en) | 2003-10-27 |
FR2838868B1 (fr) | 2005-06-03 |
AU2003246845A1 (en) | 2003-10-27 |
FR2838868A1 (fr) | 2003-10-24 |
WO2003088328A3 (fr) | 2004-04-01 |
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