WO2002027335A3 - A method and an apparatus for testing electronic devices - Google Patents

A method and an apparatus for testing electronic devices Download PDF

Info

Publication number
WO2002027335A3
WO2002027335A3 PCT/US2001/030364 US0130364W WO0227335A3 WO 2002027335 A3 WO2002027335 A3 WO 2002027335A3 US 0130364 W US0130364 W US 0130364W WO 0227335 A3 WO0227335 A3 WO 0227335A3
Authority
WO
WIPO (PCT)
Prior art keywords
electronic devices
contact elements
testing electronic
signal line
plane
Prior art date
Application number
PCT/US2001/030364
Other languages
French (fr)
Other versions
WO2002027335A2 (en
Inventor
Tark Wooi Fong
Chu Aun Lim
Kok Hong Chan
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to AU2001296373A priority Critical patent/AU2001296373A1/en
Publication of WO2002027335A2 publication Critical patent/WO2002027335A2/en
Publication of WO2002027335A3 publication Critical patent/WO2002027335A3/en

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07364Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
    • G01R1/07378Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate adapter, e.g. space transformers

Abstract

An apparatus comprising a body having a first signal line through a first plane of the body and a second signal line through a second plane of the body. A first set of contact elements extend through the body and are coupled to the first signal line. A second set of contact elements extend through the body and are coupled to the second signal lines. The first set of contact elements and the second set of contact elements correspond to a portion of external contact points of an integrated circuit.
PCT/US2001/030364 2000-09-29 2001-09-26 A method and an apparatus for testing electronic devices WO2002027335A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2001296373A AU2001296373A1 (en) 2000-09-29 2001-09-26 A method and an apparatus for testing electronic devices

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US67580200A 2000-09-29 2000-09-29
US09/675,802 2000-09-29

Publications (2)

Publication Number Publication Date
WO2002027335A2 WO2002027335A2 (en) 2002-04-04
WO2002027335A3 true WO2002027335A3 (en) 2002-11-07

Family

ID=24712034

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/030364 WO2002027335A2 (en) 2000-09-29 2001-09-26 A method and an apparatus for testing electronic devices

Country Status (2)

Country Link
AU (1) AU2001296373A1 (en)
WO (1) WO2002027335A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011075313A (en) * 2009-09-29 2011-04-14 Three M Innovative Properties Co Ic device testing socket
JP5960383B2 (en) 2010-06-01 2016-08-02 スリーエム イノベイティブ プロパティズ カンパニー Contact holder

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3716240A1 (en) * 1986-05-16 1987-12-17 Daymarc Corp Test adaptor, especially for an integrated circuit
EP0498530A2 (en) * 1991-01-09 1992-08-12 David A. Johnson Electrical interconnect contact system
US5221209A (en) * 1991-08-22 1993-06-22 Augat Inc. Modular pad array interface
US5290193A (en) * 1991-08-22 1994-03-01 Augat Inc. High density grid array test socket
US5307012A (en) * 1991-12-03 1994-04-26 Intel Corporation Test substation for testing semi-conductor packages
US5923176A (en) * 1991-08-19 1999-07-13 Ncr Corporation High speed test fixture
US6046597A (en) * 1995-10-04 2000-04-04 Oz Technologies, Inc. Test socket for an IC device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3716240A1 (en) * 1986-05-16 1987-12-17 Daymarc Corp Test adaptor, especially for an integrated circuit
EP0498530A2 (en) * 1991-01-09 1992-08-12 David A. Johnson Electrical interconnect contact system
US5923176A (en) * 1991-08-19 1999-07-13 Ncr Corporation High speed test fixture
US5221209A (en) * 1991-08-22 1993-06-22 Augat Inc. Modular pad array interface
US5290193A (en) * 1991-08-22 1994-03-01 Augat Inc. High density grid array test socket
US5307012A (en) * 1991-12-03 1994-04-26 Intel Corporation Test substation for testing semi-conductor packages
US6046597A (en) * 1995-10-04 2000-04-04 Oz Technologies, Inc. Test socket for an IC device

Also Published As

Publication number Publication date
WO2002027335A2 (en) 2002-04-04
AU2001296373A1 (en) 2002-04-08

Similar Documents

Publication Publication Date Title
IL181995A (en) Method and circuit for providing interface signals between integrated circuits
AU5495998A (en) Electronic component, semiconductor device, manufacturing method therefor, circuit board and electronic equipment
EP1156705A4 (en) Wiring board, semiconductor device and method of producing, testing and packaging the same, and circuit board and electronic equipment
AU5607100A (en) Microfabricated transducers formed over other circuit components on an integrated circuit chip and methods for making the same
HK1043678A1 (en) Method and system for communicating data between an integrated circuit and other devices
GB2367191A (en) A method and apparatus for interconnecting multiple devices on a circuit board
AU5136398A (en) Electronic component and semiconductor device, method for manufacturing and mounting thereof, and circuit board and electronic equipment
GB2372153B (en) High frequency circuit board unit, module and electronic apparatus, and method for manufacturing the unit
AU2001249578A1 (en) Method and apparatus for testing signal paths between an integrated circuit wafer and a wafer tester
AU6429201A (en) Method and apparatus for edge connection between elements of an integrated circuit
EP1233275A3 (en) Circuit board testing apparatus and method
AU1687300A (en) Semiconductor chip, semiconductor device, circuit board and electronic equipmentand production methods for them
AU2001296891A1 (en) Method and system for wafer and device-level testing of an integrated circuit
AU2001243200A1 (en) Method and system for wafer and device-level testing of an integrated circuit
AU2002227965A1 (en) Method and device for determining the properties of an integrated circuit
SG77721A1 (en) A semiconductor integrated circuit device an a method of manufacturing the same
GB0500414D0 (en) An integrated circuit including ESD circuits for a multi-chip module and a method therefor
AU2001230985A1 (en) Method and device for a built-in self-test on an integrated circuit modulator
AU2001270467A1 (en) Electronic chip component comprising an integrated circuit and a method for producing the same
AU2000272892A1 (en) Electronic circuit and method for testing a line
SG74105A1 (en) Semiconductor device method of manufacturing the same circuit board and electronic instrument
GB0115081D0 (en) A method of testing an integrated circuit
WO2002027335A3 (en) A method and an apparatus for testing electronic devices
AU2001263175A1 (en) Method and apparatus for testing integrated circuit chips that output clocks fortiming
SG101949A1 (en) Method and apparatus for testing an integrated circuit

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PH PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
AK Designated states

Kind code of ref document: A3

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PH PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP