WO2001024282A1 - Method for forming p-type semiconductor crystalline layer of iii-group element nitride - Google Patents

Method for forming p-type semiconductor crystalline layer of iii-group element nitride Download PDF

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Publication number
WO2001024282A1
WO2001024282A1 PCT/EP2000/009592 EP0009592W WO0124282A1 WO 2001024282 A1 WO2001024282 A1 WO 2001024282A1 EP 0009592 W EP0009592 W EP 0009592W WO 0124282 A1 WO0124282 A1 WO 0124282A1
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group element
crystalline layer
ill
semiconductor crystalline
element nitride
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PCT/EP2000/009592
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French (fr)
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Holger JÜRGENSEN
Frank Schulte
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Aixtron Ag
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H01L33/325Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds

Definitions

  • the present invention relates to a technique for forming a p-type Semiconductor crystalline layer of Ill-group element nitride, having a low resistivityi in an as-grown state.
  • the light emitting portion is constituted of a double hetero (DH) structure of p-n junction, so as to obtain emission of visible light at a shorter wavelength having a higher intensity.
  • LED ligth emitting diode
  • LD laser diode
  • a light emitting portion of a DH structure of p-n junction type constituted of: n-type and p-type cladding layers including n-type and p- type aluminum gallium nitride (AL x Ga- ⁇ -x N: 0 ⁇ X ⁇ 1 ) respectively; and gallium indium nitride (Ga x ln ⁇ -X N: 0 ⁇ X ⁇ 1 ) (see Jpn. J. App. Phys., Vol. 34, Part 2, No. 10B (1995), L1332 to L1335).
  • MOCVD method organometalfic thermal decomposition vapor growth method
  • MBE method molecular bea/n epitaxial method
  • halogen vapor growth method or hydride vapor growth method.
  • the semiconductor crystalline layer of lll-V group element nitride described herein refers to a crystalline layer comprising a semiconductor of lll-V group element composition represented by a general formula Al x Ga ⁇ ln z N 1 .
  • the p-type semiconductor layer of Ill-group element nitride constituting a light emitting portion of a DH structure of p-n junction type has been obtained making use of means for irradiating, under a vacuum condition, an electron beam onto a semiconductor crystalline layer of Ill-group element nitride which is added with a II group impurity such as magnesium (Mg) at the time of vapor growth based on an orga ⁇ ometallic thermal decomposition method (MOCVD method) (see (1) Japanese Patent Publication HEI-6-9258, and (2) Japanese Patent No. 2500319).
  • a II group impurity such as magnesium (Mg)
  • the acceptor impurities can be electrically activated, and the (Ga-,. ⁇ Al ⁇ ) .ylriyN (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1) monocrystalli ⁇ e layer, which had a high resistivity in an as-grown state, can be rendered to be a p-type crystalline layer having a low resistivity.
  • the p-n junction light emitting element for emitting a visible light at a short wavelength with a high efficiency can be effectively fabricated (eee the above mentioned (1) Japanese Patent Publication HEI-6- 9258, and (2) Japanese Patent No. 2500319).
  • the semiconductor crystalline layer of Ill-group element nitride added with a II group element making use of means for forming the crystalline layer by a vapor growth method and thereafter separately applying a heat treatment (annealing) at a temperature of 400°C or higher (see Japanese Patent No. 2836685).
  • the heat treatment therefore is suggested to be performed within an atmosphere substantially excluding hydrogen, so as to avoid invasion of hydrogen into a crystalline layer because hydrogen brings about electrical deacti- Vation of the acceptor impurities (see the Japanese Patent No. 2836685).
  • the annealing after completion of vapor grawth of the semiconductor crystalline layer of Ill-group element nitride including p-type dopant, has such an effect to dissociate the bond between the p-type dopant and hydrogen entering into the crystalline layer at the time of vapor growth, to thereby exile the liberated hydrogen from the crystalline layer.
  • the p-type dopant becomes electrically active due to dissociation from hydrogen thereby effectively providing a p-type layer having a low resistivity (see the Japanese Patent No. 2836685).
  • HEI-6-232451 it is suggested that there is obtained a p-type GaN crystalline layer without requiring any after- treatment, by doping magnesium (Mg) at a concentration ranging from 1x10 ⁇ r cm' 3 to 3x10 20 cm “3 into a ground layer comprising a gallium nitride based semiconductor layer (ln x Al ⁇ Ga ⁇ . ⁇ . ⁇ N : 0 ⁇ X ⁇ 1, 0 ⁇ Y ⁇ 1). It is explained that this is because a GaN layer having a superior crystallinity is obtained by accumulating a GaN crystalline layer onto a semiconductor crystalline layer of Ill-group element nitride including In (see the Japanese Patent Application Laid-Ope ⁇ No. HEI-6-232451). Probloma to be solved by the Invention
  • a p-type GaN contacting layer having a low resistivity required for realizing an excellent ohmic contactivity can not be formed directly onto an aluminum gallium nitride (Al x Ga,. N (0 ⁇ X ⁇ 1) such as serving as a cladding layer, and the p-type GaN contacting layer is necessarily required to be accumulated onto a GaN based semiconductor crystalline layer including In.
  • Al x Ga,. N (0 ⁇ X ⁇ 1) such as serving as a cladding layer
  • one effective way to obtain a p-type semiconductor crystalline layer of Ill-group element nitride having a low resistivity is to previously reduce a concentration of hydrogen (hydrogen atom) to be caught into a crystalline layer, at the time of vapor growth of a semiconductor crystalline, layer of Ill-group element nitride added with p-type impurity.
  • a semiconductor crystalline layer of lll-V group element composition such as a mixed crystal of aluminum-galiium-i ⁇ dium phosphide ((AlxGai-x sIno.sP : 0 ⁇ X ⁇ 1).
  • a p-type AIGalnP layer having a higher concentration of positive hole can be provided, if there is realized a lamination structure in which an n-type or p-type gallium arsenide (GaAs) crystalline layer is overlapped onto an (Alo. 7 Gao.3)o.slno.5P layer doped with zinc (Zn) by means of a MOCVD method (see J. Crystal Growth., 118 (1992), pp. 425-429).
  • GaAs gallium arsenide
  • the GaAs crystalline layer provided on the (Al 0 .7Gao.;)o.5ln 0 .s layer doped with zinc (Zn) is suggested to serve as a cap layer for preventing hydrogen from invading a crystalline layer under vapor growth circumstances (see the above J. Crystal Growth., 118 (1992)).
  • a semiconductor crystalline layer of Ill-group element nitride there is also known a technique for adding a cap layer as described above, upon annealing the crystalline layer.
  • the cap layer conventionally utilized for a semiconductor crystalline layer of Ill-group element nitride has been provided for preventing a p-type impurity doped surface state of the semiconductor crystalline layer of Ill-group element nitride from being deteriorated at the time of annealing at an elevated temperature.
  • the invasion of hydrogen into the semiconductor crystalline layer of Ill-group element nitride doped with p-type impurity is avoided by performing the annealing in an atmosphere substantially excluding hydrogen.
  • the surface state of the cap layer is of course disadvantageous ⁇ deteriorated and the cap layer itself may be lost due to sublimation, resulting in such a situation that a lot of nitrogen vacancies are caused in an underlayer, i.e., the semiconductor crystalline layer of Ill-group element nitride doped with p-type impurity.
  • the nitrogen vacancies are suggested to act as donor, they are electrically compensating the acceptors which have electrically activated the p-type impurities, resulting in a disadvantage that a p-type semiconductor crystalline layer of Ill-group element nitride having a low resistivity can be hardly obtained.
  • the present invention has been carried out in view of the conventional problems as described above, and it is therefore an object of the present invention to provide a method for readily forming a p-type semiconductor crystalline layer of Ill- group element nitride having low resistivity in an as-grown state, which method " is capable of effectively avoiding invasion of hydrogen from vapor growth circumstances, without deteriorating a surface state of the semiconductor crystalline layer of Ill-group element nitride doped with a p-type impurity.
  • the n-type semiconductor crystalline layer of Ill-group element nitride which is vapor grown by the second deposition step is an n-type aluminum gallium nitride (having a composition: AlxGa ⁇ xN : 0 ⁇ X ⁇ 1).
  • Fig. 1 is a schematic sectional view of a lamination structure of a semiconductor crystalline layer of Ill-group element nitride.
  • a crystalline substrate (101) is supporting a n-type semiconductor crystalline layer (102) of Ill-group element nitride.
  • a semiconductor crystalline layer (103) is deposited with vapor-growth at a first growth temperature T1 on the crystalline layer (102).
  • the crystalline layer (102) is a semiconductor consisting of Ill-group nitride added with a Il-group element.
  • a n-type semiconductor crystalline layer (104) of Ill-group element nitride is deposited at a second growth temperature T2 on the layer (103).

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The present invention relates to a technique for forming a p-type semiconductor crystalline layer of III-group element nitride, having a low resistivity in an as grown state. The method comprising the steps of firstly depositing, with vapor growth at a first growth temperature (=T1), a semiconductor crystalline layer of III-group element nitride added with a II-group element, onto an n-type semiconductor crystalline layer of III-group element nitride accumulated on a crystalline substrate; subsequent to said first depositing step, secondly depositing, with vapor growth at a second growth temperature (=T2), an n-type semiconductor crystalline layer of III-group element nitride, joiningly onto said semiconductor crystalline layer of III-group element nitride added with said II-group element; after completion of said second depositing step, thirdly lowering a temperature from said second growth temperature (=T2), under a state that said n-type semiconductor crystalline layer of III-group element nitride formed by said second depositing step is laminated on said semiconductor crystalline layer of III-group element nitride added with said II-group element which layer has been vapor grown by said first deposition step; and via said first through third steps, forming a p-type semiconductor crystalline layer of III-group element nitride from said semiconductor crystalline layer of III-group element nitride added with said II-group element, the latter layer having been vapor grown by said second deposition step.

Description

Method for forming p-type semiconductor crystalline layer of Ill- group element nitride
Detailed Description of the invention
Technical Field of the Invention
The present invention relates to a technique for forming a p-type Semiconductor crystalline layer of Ill-group element nitride, having a low resistivityi in an as-grown state.
Prior Art
In semiconductor light emitting elements of Ill-group element nitride, such as ligth emitting diode (LED) and laser diode (LD), it is common that the light emitting portion is constituted of a double hetero (DH) structure of p-n junction, so as to obtain emission of visible light at a shorter wavelength having a higher intensity. For example, there is known a light emitting portion of a DH structure of p-n junction type constituted of: n-type and p-type cladding layers including n-type and p- type aluminum gallium nitride (ALxGa-ι-xN: 0<X<1 ) respectively; and gallium indium nitride (Gaxlnι-XN: 0<X<1 ) (see Jpn. J. App. Phys., Vol. 34, Part 2, No. 10B (1995), L1332 to L1335). The p-type and n-type semiconductor crystalline layer of Ill-group element nitrides functioning as the light emitting portion of the DH structure of p-n junction type Is typically deposited making use of vapor growth means such as organometalfic thermal decomposition vapor growth method (MOCVD method), molecular bea/n epitaxial method (MBE method), halogen vapor growth method, or hydride vapor growth method. Note, the semiconductor crystalline layer of lll-V group element nitride described herein refers to a crystalline layer comprising a semiconductor of lll-V group element composition represented by a general formula AlxGaγlnzN1.α ^ (O≤X, Y, Z ≤1, X+Y+Z=1), which includes nitride (N) as a V-group constituent element. Further, it also refers to a crystalline layer comprising a semiconductor of [If-V group element composition represented by a general formula
Figure imgf000004_0001
eJWq (O≤X, Y, Z ≤ 1, X+Y+Z=1, the mark M is V-group element other than nitrogen. and O≤Q≤ .).
Conventionally, the p-type semiconductor layer of Ill-group element nitride constituting a light emitting portion of a DH structure of p-n junction type has been obtained making use of means for irradiating, under a vacuum condition, an electron beam onto a semiconductor crystalline layer of Ill-group element nitride which is added with a II group impurity such as magnesium (Mg) at the time of vapor growth based on an orgaπometallic thermal decomposition method (MOCVD method) (see (1) Japanese Patent Publication HEI-6-9258, and (2) Japanese Patent No. 2500319). It is suggested that, according to the means for irradiating an electron beam, the acceptor impurities can be electrically activated, and the (Ga-,.χAlχ) .ylriyN (0<x<1, 0<y<1) monocrystalliπe layer, which had a high resistivity in an as-grown state, can be rendered to be a p-type crystalline layer having a low resistivity. It is also suggested that the p-n junction light emitting element for emitting a visible light at a short wavelength with a high efficiency can be effectively fabricated (eee the above mentioned (1) Japanese Patent Publication HEI-6- 9258, and (2) Japanese Patent No. 2500319).
Further, it is common to obtain the semiconductor crystalline layer of Ill-group element nitride added with a II group element, making use of means for forming the crystalline layer by a vapor growth method and thereafter separately applying a heat treatment (annealing) at a temperature of 400°C or higher (see Japanese Patent No. 2836685). The heat treatment therefore is suggested to be performed within an atmosphere substantially excluding hydrogen, so as to avoid invasion of hydrogen into a crystalline layer because hydrogen brings about electrical deacti- Vation of the acceptor impurities (see the Japanese Patent No. 2836685). According to this prior art, it is suggested that the annealing, after completion of vapor grawth of the semiconductor crystalline layer of Ill-group element nitride including p-type dopant, has such an effect to dissociate the bond between the p-type dopant and hydrogen entering into the crystalline layer at the time of vapor growth, to thereby exile the liberated hydrogen from the crystalline layer. It is suggested that the p-type dopant becomes electrically active due to dissociation from hydrogen thereby effectively providing a p-type layer having a low resistivity (see the Japanese Patent No. 2836685). Also, there has been conventionally disclosed a technique for realizing low resistivity, which technique forms a cap layer comprising GaxAI^N (O≤X≤ 1), AIN, Si3N« or Si02, onto a surface of a semiconductor crystalline layer of Ill-group element nitride doped with p-type impurity, which semiconductor crystalline layer has a high resistivity in an as-grown state, and which technique applies a heat treatment to the layers (see (1) Japanese Patent No. 2540791 and (2) Japanese Patent No. 2790235). It is suggested that, by providing the cap layer or a surface protecting layer, there is obtained a p-type crystalline layer having a low resistivity, without decomposing the semiconductor crystalline layer of Ill-group element nitride at the time of annealing under reduced or normal pressure (see (1) Japanese Patent No. 2540791 and (2) Japanese Patent No. 2790235).
There is also known a method for forming a p-type semiconductor crystalline layer of Hi-group element nitride having a low resistivity in an as-grown state, without relying on means for performing annealing or means for irradiating an electron beam after vapor growth. For example, according to an invention described in Japanese Patent Application Laid-Opeπ No. HEI-6-232451, it is suggested that there is obtained a p-type GaN crystalline layer without requiring any after- treatment, by doping magnesium (Mg) at a concentration ranging from 1x10ιrcm'3 to 3x1020 cm"3 into a ground layer comprising a gallium nitride based semiconductor layer (lnxAlγGaι.χ.γN : 0<X<1, 0≤Y<1). It is explained that this is because a GaN layer having a superior crystallinity is obtained by accumulating a GaN crystalline layer onto a semiconductor crystalline layer of Ill-group element nitride including In (see the Japanese Patent Application Laid-Opeπ No. HEI-6-232451). Probloma to be solved by the Invention
ft will be possible to readily provide a p-n junction type semiconductor light emitting element of Ill-group element nitride without requiring any after-treatment for realizing low resistivity such as annealing, if there exists an excellent technique for forming a p-type semiconductor crystalline layer of Ill-group element nitride having a low resistivity in an as-grown state. However, in those conventional techniques which are mentioned to be capable of providing a p-type semiconductor crystalline layer of Ill-group element nitride having a low resistivity in an as- grown state, it is problematic that the ground layer, onto which a p-type semiconductor crystalline layer of Ill-group element nitride is to be accumulated, is limited to a gallium nitride based semiconductor crystalline layer including indium (In). Namely, there is imposed such a [imitation or restriction to necessarily provide a GaN layer doped with Mg at a specified doping concentration onto the semiconductor crystalline of Ill-group element nitride including In, resulting in limitation of the constitution of lamination structure which is not adapted to a general purpoβe. For example, a p-type GaN contacting layer having a low resistivity required for realizing an excellent ohmic contactivity can not be formed directly onto an aluminum gallium nitride (AlxGa,. N (0≤X<1) such as serving as a cladding layer, and the p-type GaN contacting layer is necessarily required to be accumulated onto a GaN based semiconductor crystalline layer including In. As taught by the aforementioned prior art, one effective way to obtain a p-type semiconductor crystalline layer of Ill-group element nitride having a low resistivity is to previously reduce a concentration of hydrogen (hydrogen atom) to be caught into a crystalline layer, at the time of vapor growth of a semiconductor crystalline, layer of Ill-group element nitride added with p-type impurity. Concerning a semiconductor crystalline layer of lll-V group element composition such as a mixed crystal of aluminum-galiium-iπdium phosphide ((AlxGai-x sIno.sP : 0≤X≤1). it has been already known that a p-type AIGalnP layer having a higher concentration of positive hole can be provided, if there is realized a lamination structure in which an n-type or p-type gallium arsenide (GaAs) crystalline layer is overlapped onto an (Alo.7Gao.3)o.slno.5P layer doped with zinc (Zn) by means of a MOCVD method (see J. Crystal Growth., 118 (1992), pp. 425-429). The GaAs crystalline layer provided on the (Al0.7Gao.;)o.5ln0.s layer doped with zinc (Zn) is suggested to serve as a cap layer for preventing hydrogen from invading a crystalline layer under vapor growth circumstances (see the above J. Crystal Growth., 118 (1992)).
Concerning a semiconductor crystalline layer of Ill-group element nitride, there is also known a technique for adding a cap layer as described above, upon annealing the crystalline layer. However, the cap layer conventionally utilized for a semiconductor crystalline layer of Ill-group element nitride has been provided for preventing a p-type impurity doped surface state of the semiconductor crystalline layer of Ill-group element nitride from being deteriorated at the time of annealing at an elevated temperature. The invasion of hydrogen into the semiconductor crystalline layer of Ill-group element nitride doped with p-type impurity is avoided by performing the annealing in an atmosphere substantially excluding hydrogen. However, even when the annealing is performed in the atmosphere comprising nitrogen (N2) substantially excluding hydrogen, it is impossible to maintain a nitrogen partial pressure sufficient for restricting the decomposition of the semiconductor crystalline layer of Ill-group element nitride because the dissociation energy of nitrogen is high. As such, particularly in the annealing which utilizes the semiconductor crystalline layer of Ill-group element nitride as a cap layer, the surface state of the cap layer is of course disadvantageous^ deteriorated and the cap layer itself may be lost due to sublimation, resulting in such a situation that a lot of nitrogen vacancies are caused in an underlayer, i.e., the semiconductor crystalline layer of Ill-group element nitride doped with p-type impurity. Since the nitrogen vacancies are suggested to act as donor, they are electrically compensating the acceptors which have electrically activated the p-type impurities, resulting in a disadvantage that a p-type semiconductor crystalline layer of Ill-group element nitride having a low resistivity can be hardly obtained.
In accordance with the aforementioned prior art (see J. Crystal Growth., 123 (1992), pp. 181 to 187) for forming a semiconductor crystalline layer of lll-V group element composition having a low resistivity such as a p-type composition ((AlχGa1.χ)0.50.sP : O≤X≤I), it is thought to be possible to form a p-type semiconductor crystalline layer of Ill-group element nitride having a low resistivity in an as- grown state, provided that a cap layer can be utilized as a functional layer for avoiding invasion of hydrogen from vapor growth circumstances. Unfortunately, it is presently unknown as to what kind of material and constituent requirement of a cap layer is preferable for forming a p-type semiconductor crystalline layer of Ill- group element nitride having low resistivity in an as-grown state. There is also unknown a forming condition for effectively forming a p-type semiconductor crystalline layer of Ill-group element nitride having a low resistivity in an as-grown state, without deteriorating a surface morphology of a semiconductor crystalline layer of Ill-group element nitride, under a condition that a cap layer is added thereto.
The present invention has been carried out in view of the conventional problems as described above, and it is therefore an object of the present invention to provide a method for readily forming a p-type semiconductor crystalline layer of Ill- group element nitride having low resistivity in an as-grown state, which method" is capable of effectively avoiding invasion of hydrogen from vapor growth circumstances, without deteriorating a surface state of the semiconductor crystalline layer of Ill-group element nitride doped with a p-type impurity.
Means for Solving the Problems
Namely, according to claim 1 of the present invention, there is provided a method for forming a p-type semiconductor crystalline layer of Ill-group element nitride having a low resistivity by a vapor growth method, comprising the steps of: firstly depositing, with vapor growth at a first growth temperature (=T1), a semiconductor crystalline layer of Ill-group element nitride added with a Il-group ele-
SUBSTΓΓUTE SHEET (RULE 26) meπt, onto an n-type semiconductor crystalline layer of Ill-group element nitride accumulated on a crystalline substrate: subsequent to the first depositing step, secondly depositing, with vapor growth at a second growth temperature (=T2), an n-type semiconductor crystalline layer of l/l-group element nitride, joiπingly onto the semiconductor crystalline layer βf Ill- group element nitride added with the Il-group element ; after completion of the second depositing step, thirdly lowering a temperature from the second growth temperature (=T2), under a state that the n-type semiconductor crystalline layer of Ill-group element nitride formed by the second de- poshing step is laminated on the semiconductor crystalline layer of Ill-group element nitride added with the Il-group element which layer has been vapor grown by the first deposition step; and vra(sic) the first through third steps, forming a p-type semiconductor crystalline layer of Ill-group element nitride from the semiconductor crystalline layer of Ill- group element nitride added with the Il-group element, the latter layer having been vapor grown by the second deposition step.
Further, according to the invention recited in claim 2, in addition to the constitution of the invention recited in claim 1, there is provided a method for forming a p-type semiconductor crystalline layer of Ill-group element nitride, wherein the second growth temperature (=T2) at the second deposition step is higher than the first growth temperature (=T1) at the first deposition temperature. Accordiπg to the invention recited in claim 3, in addition to the constitution of the invention recited in either of claim 1 or 2, there is provided a method for forming a p-type semiconductor crystalline layer of Ill-group element nitride, wherein the n-type semiconductor crystalline layer of Ill-group element nitride which is vapor grown by the second deposition step is an n-type semiconductor crystalline layer of Ill-group element nitride having a carrier concentration from
5 x 10 cm-3 to 1 x 10'W.
According to the invention recited in claim 4, in addition to the constitution of the invention recited in anyone of claims 1 to 3, there is provided a method for forming a p-type semiconductor crystalline layer of Ill-group element nitride, wherein the n-type semiconductor crystalline layer of Ill-group element nitride which is vapor grown by the second deposition step has a layer thickness from 10 nanometer to 3 μm.
According to the invention recited in claim 5. in addition to the constitution of the invention recited in anyone of claims 1 to 4, there is provided a method for forming a p-type semiconductor crystalline layer of Ill-group element nitride, the n-type semiconductor crystalline layer of Ill-group element nitride which is vapor grown by the second deposition step is an n-type aluminum gallium nitride (having a composition: AlxGa^xN : 0≤X≤1). Short description of the drawing
Fig. 1 is a schematic sectional view of a lamination structure of a semiconductor crystalline layer of Ill-group element nitride.
Description of an embodiment
A crystalline substrate (101) is supporting a n-type semiconductor crystalline layer (102) of Ill-group element nitride. A semiconductor crystalline layer (103) is deposited with vapor-growth at a first growth temperature T1 on the crystalline layer (102). The crystalline layer (102) is a semiconductor consisting of Ill-group nitride added with a Il-group element.
A n-type semiconductor crystalline layer (104) of Ill-group element nitride is deposited at a second growth temperature T2 on the layer (103).

Claims

Claimβ
1. A method for forming a p-type semiconductor crystalline layer of Ill-group element nitride having a low resistivity by a vapor growth method, comprising the Steps of: firstly depositing, with vapor growth at a first growth temperature (=T1), a semiconductor crystalline layer of Ill-group element nitride added with a Il-group element, onto an n-type semiconductor crystalline layer of ill-group element nitride accumulated on a crystalline substrate; subsequent to said first depositing step, secondly depositing, with vapor growth at a second growth temperature (=T2), an n-type semiconductor crystalline layer of Ill-group element nitride, joiningiy onto said semiconductor crystalline layer of Ill- group element nitride added with said Il-group element : after completion of said second depositing step, thirdly lowering a temperature from said second growth temperature (=T2), under a state that said n-type semiconductor crystalline layer of Ill-group element nitride formed by said second depositing step is laminated on said semiconductor crystalline layer of Ill-group element nitride added with said Il-group element which layer has been vapor grown by said first deposition step; and via(sic) said first through third steps, forming a p-type semiconductor crystalline layer of Ill-group element nitride from said semiconductor crystalline layer of Ill- group element nitride added with said Il-group element, the latter layer having been vapor grown by said second(sic) depositor) step.
2. A method for forming a p-type semiconductor crystalline layer of Ill-group element nitride of daim 1, wherein said second growth temperature (=T2) at said second deposition step is higher than said first growth temperature (=T1) at said first deposition temperature (sic).
3. A method for forming a p-type semiconductor crystalline layer of Ill-group element nitride of either of claim 1 or 2, wherein said n-type semiconductor crystalline layer of Ill-group element nitride which is vapor grown by said second deposition step is an n-type semiconductor crystalline layer of Ill-group element nitride having a carrier concentration from 5 10 cm-3 to 1 10'9cπV3.
4. A method for forming a p-type semiconductor crystalline layer of Ill-group element nitride of anyone of claims 1 to 3, wherein said n-type semiconductor crystalline layer of Ill-group element nitride which is vapor grown by said second deposition step has a layer thickness from 10 nanometer to 3 μm.
5. A method for forming a p-type semiconductor crystalline layer of Ill-group element nitride of anyone of claims 1 to 4, said n-type semiconductor crystalline layer of Ill-group element nitride which is vapor grown by said second deposition step is an n-type aluminum gallium nitride (having a composition: Al Ga^N : 0≤X≤1).
PCT/EP2000/009592 1999-09-30 2000-09-29 Method for forming p-type semiconductor crystalline layer of iii-group element nitride WO2001024282A1 (en)

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JPH0888408A (en) * 1994-09-16 1996-04-02 Toyoda Gosei Co Ltd Iii nitride semiconductor light emitting device
JPH08213654A (en) * 1994-10-28 1996-08-20 Mitsubishi Chem Corp Semiconductor device having distributed bragg reflection mirror multilayered film
EP0772247A1 (en) * 1994-07-21 1997-05-07 Matsushita Electric Industrial Co., Ltd. Semiconductor light-emitting device and production method thereof
US5903017A (en) * 1996-02-26 1999-05-11 Kabushiki Kaisha Toshiba Compound semiconductor device formed of nitrogen-containing gallium compound such as GaN, AlGaN or InGaN
US5932896A (en) * 1996-09-06 1999-08-03 Kabushiki Kaisha Toshiba Nitride system semiconductor device with oxygen

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0772247A1 (en) * 1994-07-21 1997-05-07 Matsushita Electric Industrial Co., Ltd. Semiconductor light-emitting device and production method thereof
JPH0888408A (en) * 1994-09-16 1996-04-02 Toyoda Gosei Co Ltd Iii nitride semiconductor light emitting device
JPH08213654A (en) * 1994-10-28 1996-08-20 Mitsubishi Chem Corp Semiconductor device having distributed bragg reflection mirror multilayered film
US5903017A (en) * 1996-02-26 1999-05-11 Kabushiki Kaisha Toshiba Compound semiconductor device formed of nitrogen-containing gallium compound such as GaN, AlGaN or InGaN
US5932896A (en) * 1996-09-06 1999-08-03 Kabushiki Kaisha Toshiba Nitride system semiconductor device with oxygen

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 08 30 August 1996 (1996-08-30) *
PATENT ABSTRACTS OF JAPAN vol. 1996, no. 12 26 December 1996 (1996-12-26) *

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