WO2001002870A1 - Method and apparatus for real time measurement of three phase electrical parameters - Google Patents

Method and apparatus for real time measurement of three phase electrical parameters Download PDF

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Publication number
WO2001002870A1
WO2001002870A1 PCT/US2000/018064 US0018064W WO0102870A1 WO 2001002870 A1 WO2001002870 A1 WO 2001002870A1 US 0018064 W US0018064 W US 0018064W WO 0102870 A1 WO0102870 A1 WO 0102870A1
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WIPO (PCT)
Prior art keywords
phase
result
generator
reference vectors
vectors
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PCT/US2000/018064
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English (en)
French (fr)
Inventor
Joseph A. Hogle
Michael G. Wise
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General Electric Co
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General Electric Co
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Publication date
Application filed by General Electric Co filed Critical General Electric Co
Priority to JP2001508615A priority Critical patent/JP4993153B2/ja
Priority to BR0006888-8A priority patent/BR0006888A/pt
Priority to MXPA01002279A priority patent/MXPA01002279A/es
Priority to AU57822/00A priority patent/AU5782200A/en
Priority to EP00943337A priority patent/EP1114327A1/en
Publication of WO2001002870A1 publication Critical patent/WO2001002870A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • G01R19/2513Arrangements for monitoring electric power systems, e.g. power lines or loads; Logging
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R21/00Arrangements for measuring electric power or power factor
    • G01R21/133Arrangements for measuring electric power or power factor by using digital technique
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/16Measuring asymmetry of polyphase networks

Definitions

  • the present invention is directed to real time measurement of balanced or unbalanced three phase electrical parameters such as power, voltage, current and frequency. Specifically, the invention is directed to real time measurement of balanced or unbalanced three phase electrical parameters of electrical power generators using a phase-locked quadrature detector.
  • Polyphase and, more particularly, three-phase power generators are widely used to produce electric power for commercial and industrial use and it is highly desirable, therefore, that such generators produce AC power that is both stable and reliable. Since such generators are often subject to various types of power surges, faults, voltage and current overloads, as well as phase and frequency perturbations, it is desirable to monitor as closely as possible the output parameters of the generator. Specifically, during the operation of an electrical power generator, it is desirable for the safe operation of the system that the generator's operating parameters be available to the operator and as a safeguard provide feedback signals to the system control in the event that there develops an unsafe condition of, for example, a mismatch between input mechanical drive power and electrical power being delivered.
  • Some prior art electrical power generator monitors e.g., General Electric' s Mark V Turbine Control Card DS200TCCBG1B, assume that, in a three phase system, monitored voltage and current signals have a 120 degree phase relationship between each of the voltage and current vectors. However, in the event of an unbalance in the system, the 120 degree phase relationship no longer is a valid assumption. Accordingly, any vector measurements and power calculations based on the assumed 120 degree relationship also are no longer valid.
  • a pair of reference vectors in quadrature is phase-locked to a selected input open delta line to line voltage vector.
  • the cosine reference vector is locked 45° out of phase from the selected input vector. This allows the best projection of the input vector onto the quadrature pair providing increased accuracy in subsequent magnitude and phase calculations.
  • the phase- locked reference vectors provide a basis for computing the magnitude and phase angle for the remaining open delta line to line voltage vectors and three line to neutral current vectors, all of which also are provided as inputs to the system of the preferred embodiment.
  • Figs. 1 A and IB depict schematically a preferred embodiment of the present invention.
  • Fig. 2 shows an arrangement for a voltage controlled oscillator in accordance with a preferred embodiment of the present invention.
  • Fig. 3 depicts schematically an arrangement for obtaining various power parameters in accordance with an embodiment of the present invention.
  • Figs. 4-6 depict graphs of possible outputs of the up-down counter in the preferred embodiment of the present invention.
  • Fig. 7 shows the relationship between the input signal and generated cosine and sine reference signal components, once phase lock has been achieved.
  • Fig. 8 illustrates a preferred set of instructions to implement error function block 200a, in accordance with the invention.
  • Fig. 9 shows a flow diagram representing a logic function for choosing to which input signal the reference is to be phase locked in accordance with an embodiment of the invention.
  • Fig. 10 shows the relationship among the phase angles of the various vectors in accordance with a preferred embodiment of the invention.
  • a preferred embodiment of the present invention is indicated by 100 in Figs. 1 A and IB.
  • quadrature detectors there are three main functional portions in the preferred embodiment, namely, quadrature detectors, phase-locked loop and phase shifting feedback. Each will be discussed in turn below.
  • Fig. 1A will be discussed first, but it is to be understood that much of the same functionality is repeated in Fig. IB, albeit for different input signals.
  • the quadrature detector portion preferably comprises signal inputs 110a,
  • multiplication blocks 114a, 114b, 114c, 114d are each connected to low pass filters 126a, 126b, 126c, 126d, which are connected to squaring functions 132a, 132b, 132c, 132d for each of the sine 118 and cosine 120 signals.
  • summing junctions 134a, 134b, square root functions 136a, 136b, and gain blocks 138a, 138b which, together, combine to provide signal magnitudes 176. 180.
  • the mathematics underlying the embodiment disclosed herein is discussed later.
  • the quadrature detector portion preferably comprises inverters 150a, 150b connected after the square root functions 136a, 136b, respectively, and multiplier blocks 152a, 152b which are respectively connected to clamping circuits 154a, 154b which, themselves, are ultimately connected to arc cosine functions 160a, 160b.
  • the aforementioned aspect of the quadrature detector portion produces signals 174. 178 indicative of the input signal's phase relationship with respect to a reference vector, namely cosine signal 120.
  • blocks 170, 172 indicate where a filtered projection of the input signal on the sine signal 118 can be obtained. The use of this filtered projection is explained later herein.
  • the phase locked loop in accordance with the preferred embodiment of the present invention comprises VCO 116 (shown in more detail in Fig. 2), up- down counters 226, 230, low pass filters 224, 228, a saturation limiter 214 and logic controlled switch 206 to select a desired feedback signal, as will be discussed in more detail later herein.
  • the VCO 116 as depicted in Fig. 2, preferably is implemented digitally and comprises an input 250, a discrete time integrator 252, a rollover function 254, a gain block 256, a degree-to-radian converter 258 and sine 260 and cosine 262 function blocks leading, respectively, to sine and cosine signals 118, 120.
  • the algorithm implemented in rollover function 254 is shown in Fig. 2.
  • the phase shifting feedback portion of the embodiment shown in Fig. 1 A preferably comprises a function 200a, 200b to measure the phase angle difference between the selected input vector and the cosine reference signal 120. Any difference from the desired angle, in this case 45° (5.4978 radians), is converted to cycles, integrated via discrete time saturation reset integrators 202a or 202b, as enabled, and added (or subtracted) via summing block 210 through switch 204 as a bias to the frequency-phase error feedback to the VCO 116. That is, the frequency-phase error feedback is fed to summing block 216 which sums the error feedback with the VCO's center frequency 220.
  • the adjusted frequency can be seen at 222 and the signal indicative of the signal frequency 222 is fed to VCO 116 via input 250 (Fig. 2).
  • Inputs 110a, 110b represent open delta line to line voltage vectors indicated in Figs. 1A and IB by VI 2, V23 and V31. This notation is analogous to VAB, VBC and VCA in a three phase system having phases A, B, C. While the third line to line voltage of three phase system could be directly monitored through a conventional potential transformer (PT), in an effort to reduce the cost of an overall monitoring system, it can be seen, referring to Fig. IB, that the third line to line voltage is derived by the negation of the other two line to line voltages via negation block 112.
  • PT potential transformer
  • the derived third voltage is mixed with sine and cosine signals 118, 120 via multiplication blocks 114e, 114f, the resulting products are filtered through filters 126e, 126f, the filtered components, namely, the cosine projection 128c, and sine projection 130c are passed through squaring functions 132e, 132f, the results of which are summed in summing block 134c and passed through a square root function 136c.
  • the square root value is amplified by gain block 138c thereby obtaining the magnitude 184 of the third line to line voltage.
  • the angle of the third line to line voltage with respect to the cosine reference signal 120 is obtained by inverting the square root value via inverter 150c and multiplying the resulting quotient with the cosine projection 128c in multiplier 152c.
  • the resulting product is clamped to +/- 1 in clamping function 154c and finally, an arc cosine function 160c is applied to the value exiting clamping function 154c, thereby obtaining angle output 182.
  • the arrangement for obtaining magnitudes and phase angles with respect to reference cosine signal 120 for the three phase currents is identical to the arrangement discussed above for the third line to line voltage.
  • current signals enter at inputs 110c, 1 lOd, 1 lOe. Those signals are multiplied with the reference sine and cosine signals 118, 120 in multipliers 114g, 114h, 114i, 114j, 114k, 1141. The resulting products are filtered in low pass filters 126g, 126h, 126i, 126j, 126k, 1261 resulting in respective cosine and sine projections 128d, 130d, 128e, 130e, 128f, 130f. Each of those projections is squared via the squaring functions 132g, 132h, 132i, 132j, 132k, 1321 and summed together, as shown, in summing blocks 134d.
  • phase current angles with respect to the reference cosine signal 120 the cosine projection 128d, 128e, 128f is multiplied in multipliers 152d, 152e, 152f with the square root value inverted in inverters 150d, 150e, 150f.
  • the product of this multiplication is clamped in clamping functions 154d, 154e, 154f, and an arc cosine function is applied by blocks 160d, 160e, 160f thereby resulting in the desired angles at 186, 190, 194.
  • the vector magnitudes and angles to be used in the power computations are determined using the cosine and sine projections 128a,
  • Fig. 3 The power calculations based on the derived vector magnitudes and phase relationships in accordance with the preferred embodiment is shown in Fig. 3. Specifically, angles 174, 186 are summed in summing block 310. The sine and cosine are taken of the resulting sum in blocks 316, 318. Those components are then mixed in multipliers 320, 322 with magnitude 176, which is the magnitude of the first line to line voltage. These products are again multiplied in multipliers 324, 326 with the phase A current magnitude of 188. Meanwhile, the second line to line voltage angle 178 and a 180° angle input 300 are summed in summing block 312 which provides the angle for the voltage between phases C and B with respect to the reference cosine signal 120.
  • This value is added to the negative of the angle of the phase C current in block 314. That block is connected to sine and cosine functions 350, 352 whose outputs are mixed in multiplier blocks 354, 356 with the voltage magnitude between phases B and C 180. Blocks 354, 356 are connected to multipliers 358, 360 also having inputs connected to phase C current magnitude 196. The output of multiplier block 358 is summed with the output of multiplier block 326 in summing block 328 whose output is representative of the real power P 330.
  • That real power value when divided by S (described below), provides a power factor value 334.
  • the apparent power (VA) labeled S in Fig. 3 is calculated as the square root of the sum of the squares of watts and VARS. i.e.,
  • the phase locked loop is controlled by the operation of the frequency-phase error detector, which increments up-down counters 226, 230 with each zero crossing of the rising direction of the input signal, e.g., 110a, 110b.
  • up-down counters 226, 230 are decremented with each zero crossing in the rising direction of the cosine reference vector 120.
  • the counter 226, 230 counts up or down until it is within a fraction of a hertz necessary to add to the VCO center frequency to match the input signal's frequency.
  • Figs. 4, 5 and 6 depict possible counter output values.
  • Fig. 4 depicts an up-down counter driving towards a higher frequency
  • Fig. 5 illustrates an up-down counter transition to a higher count and pulse width
  • Fig. 6 depicts an up-down counter locked at a steady state frequency.
  • the fractional hertz required to maintain lock is embedded in the pulse width of the up/down counter.
  • the output of the frequency phase up-down counters 226, 230 is smoothed by low pass filters 224, 228 and added to the phase shift feedback signal via switch 206.
  • the summation of these two feedback signals with some gain via amplifier 212 to speed up the response, is used to bias the VCO center frequency 220 the desired amount to maintain the output of the VCO 116 at the same frequency as the input signal.
  • phase shift feedback that is, the error between the input signal vector and the cosine reference vector 120 and the desired phase shift (in this case 45°) is integrated via discrete time saturation reset integrators 202a, 202b and added to the appropriate filtered frequency-phase error up-down counter value at summing block 210.
  • This phase shift feedback biases the summation of the two feedback signals such that the pulse width of the frequency-phase error up-down counter reaches a steady state equilibrium point with the input vector held at the desired phase angle relative to the cosine reference signal 120.
  • the input signal's frequency is the sum of the feedback signal, with gain applied, and the VCO center frequency. More specifically, the function 200a preferably is implemented in accordance with software code similar to that outlined in Fig. 8.
  • the filtered sine projection e.g. 170
  • the function 200b feedback path except the 120 degrees difference between V12 and V23 is added to the desired difference making it 165 degrees versus the 45 degrees in the VI 2 path.
  • a feedback control switch 240 works in the following way with reference to Fig. 9.
  • the normal feedback selection for the phase-locked loop is to use the VI 2 input signal 110a, as long as the magnitude of the input signal at 110a is greater than a predefined threshold (Steps 800, 810, 820, 830). If not, then the magnitude of V23. i.e., input signal 110b, is compared to the same threshold (Steps 840, 850). If the signal level of V23 is sufficiently large (Step 850), it is used as the feedback selection (Steps 860, 870).
  • the switching for feedback control is implemented in block 240, shown in Fig. 1 A.
  • V23 is used as the feedback selection (Steps 880, 860, 870). Otherwise, VI 2 is used. It should be noted that the default or primary use of VI 2 is arbitrary and that V23 could be used as the primary instead.
  • This routine is repeated as appropriate to maintain confidence that the system is being monitored based on a "live" input signal. That is. this switching logic is useful in the case of a system fault and the subsequent loss of voltage in one or the other input signals. Accordingly, power calculations can be obtained as long as there is electrical power in one of the generator's phases.
  • the discrete up-down counter, 226 or 230 provides a course, integer frequency adjustment by counting up or down, and fine frequency control by increasing or decreasing the pulse width. See Figs. 5-7 to see the pulse widths increasing until an up count results or the pulse width remains constant and an equilibrium point is achieved. A similar effect is achieved with decreasing pulse width and down counts.
  • phase shifting feedback path ensures this desired relationship.
  • the up-down counter will provide exactly the right feedback necessary to add to the VCO center frequency to maintain the VCO output frequency at the same frequency as the input (GEN V 12 or V 23).
  • the phase relationship is not controlled by any mechanism in the up-down counter feedback.
  • Multiplication of the input vector by either reference vector is governed by the following trigonometric identities.
  • equation 2 is passed through a low pass filter to remove the A.C. component while passing the D.C. component, equation 2 will simplify as follows: Filtered ⁇ [ A, relief SIN ( ⁇ ⁇ n t + ⁇ ⁇ n ) ] [ A ref SIN ( ⁇ ref t + ⁇ ref ) ] ⁇ -
  • equation 3 further simplifies to:
  • the angle output is the angle between the input vector (line-line voltage or line-neutral current) and the cosine reference signal 120.
  • the true phase angle relative to a zero degree reference can be seen from Fig. 10 to be the cosine reference angle plus the angle between the cosine reference and the vector of interest modulo 360 degrees. That is, to provide the angle labeled "PHI INPUT" in Fig. 10 and Fig. 7 it would be necessary to add an arc cosine block in Fig. 1
  • an electrical power generator's operating parameters including instantaneous frequency, three phase voltages, three phase currents, the relative angle between the phases, electrical power (watts, VARS, VA) and power factor.
  • the technique of offsetting the input vector by 45 degrees from the reference quadrature pair and holding same at 45 degrees with a phase locked loop provides an even more accurate ultimate measurement of electrical parameters. Accordingly, it is possible, for example, to provide accurate speed control to a prime mover of a generator to thereby more accurately control the frequency and/or phase of the electric power being delivered.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measuring Phase Differences (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Control Of Eletrric Generators (AREA)
PCT/US2000/018064 1999-07-02 2000-06-30 Method and apparatus for real time measurement of three phase electrical parameters Ceased WO2001002870A1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2001508615A JP4993153B2 (ja) 1999-07-02 2000-06-30 三相の電気的なパラメータのリアルタイム測定方法および装置
BR0006888-8A BR0006888A (pt) 1999-07-02 2000-06-30 Método e aparelho para medição em tempo real de parâmetros elétricos trifásicos
MXPA01002279A MXPA01002279A (es) 1999-07-02 2000-06-30 Metodo y aparato para la medicion, en tiempo real, de parametros electricos de tres fases.
AU57822/00A AU5782200A (en) 1999-07-02 2000-06-30 Method and apparatus for real time measurement of three phase electrical parameters
EP00943337A EP1114327A1 (en) 1999-07-02 2000-06-30 Method and apparatus for real time measurement of three phase electrical parameters

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US09/347,309 US6397157B1 (en) 1999-07-02 1999-07-02 Method and apparatus for real time measurement of three phase electrical parameters
US09/347,309 1999-07-02

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EP (1) EP1114327A1 (enExample)
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KR (1) KR100653019B1 (enExample)
CN (1) CN1165774C (enExample)
AU (1) AU5782200A (enExample)
BR (1) BR0006888A (enExample)
ID (1) ID28493A (enExample)
MX (1) MXPA01002279A (enExample)
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GB2409905A (en) * 2004-01-12 2005-07-13 Bombardier Transp Gmbh Plausibility check of an electric three-phase system
GB2429306A (en) * 2005-08-17 2007-02-21 Turbo Genset Company Ltd A controller for a parallel connected inverter
GB2429306B (en) * 2005-08-17 2010-12-29 Turbo Genset Company Ltd A controller for a parallel connected inverter
CN104483524A (zh) * 2014-12-26 2015-04-01 中颖电子股份有限公司 电能表中无功功率的计量系统
RU2627986C1 (ru) * 2016-05-04 2017-08-14 Александр Евгеньевич Бондаренко Способ измерения мгновенного коэффициента мощности трехфазной сети и устройство для его осуществления

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JP4993153B2 (ja) 2012-08-08
US6397157B1 (en) 2002-05-28
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CN1165774C (zh) 2004-09-08
BR0006888A (pt) 2002-01-22
ID28493A (id) 2001-05-31
KR100653019B1 (ko) 2006-11-30
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