WO2000077831A3 - Procedes pour reguler la sensibilite en surface des films isolants dans des dispositifs semi-conducteurs - Google Patents

Procedes pour reguler la sensibilite en surface des films isolants dans des dispositifs semi-conducteurs Download PDF

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Publication number
WO2000077831A3
WO2000077831A3 PCT/US2000/015851 US0015851W WO0077831A3 WO 2000077831 A3 WO2000077831 A3 WO 2000077831A3 US 0015851 W US0015851 W US 0015851W WO 0077831 A3 WO0077831 A3 WO 0077831A3
Authority
WO
WIPO (PCT)
Prior art keywords
deposition
ozone
films
sio2
methods
Prior art date
Application number
PCT/US2000/015851
Other languages
English (en)
Other versions
WO2000077831A2 (fr
Inventor
Sasangan Ramanathan
Joseph Ellul
Asharf R Khan
Hariram Krishnamoorthy
Dilip Vijay
Giovanni Antonio Foggiato
Original Assignee
Quester Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Quester Technology Inc filed Critical Quester Technology Inc
Priority to AU54767/00A priority Critical patent/AU5476700A/en
Publication of WO2000077831A2 publication Critical patent/WO2000077831A2/fr
Publication of WO2000077831A3 publication Critical patent/WO2000077831A3/fr

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02304Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

L'invention concerne des procédés pour réguler la sensibilité en surface lors du dépôt de films isolants en dioxyde de silicium qui permettent de déposer des films en dioxyde de silicium haute qualité utilisés dans l'isolation des tranchées peu profondes. En utilisant des concentrations d'ozone extrêmement faibles pour déposer une couche de grain ayant une faible teneur en ozone, on facilite le dépôt ultérieur de films haute qualité à forte teneur d'ozone, et ce sans causer de défauts qui peuvent apparaître lors du dépôt de film à forte teneur d'ozone par procédé traditionnel. En régulant pendant le dépôt de la couche de grain la concentration d'ozone, l'épaisseur de la couche de grain, la vitesse de dépôt du film à forte teneur d'ozone, la température de dépôt et la concentration d'ozone dans le film à forte teneur d'ozone, on peut obtenir un film SiO2 manifestant les propriétés désirées. Les films minces semi-conducteurs fabriqués selon le procédé de l'invention peuvent avoir une moindre épaisseur que les films traditionnels TEOS/ozone, ce qui permet de fabriquer des dispositifs à circuits intégrés ayant des dimensions encore plus réduites. En outre, l'invention concerne des procédés pour augmenter la sensibilité en surface du dépôt de films SiO2 sur des tranches de semi-conducteurs comportant des matériaux différents. En augmentant la sensibilité en surface, le taux de croissance différentiel de SiO2 sur le nitrure, l'oxyde thermique et le silicium peuvent être régulés pour assurer une meilleure planéité du SiO2 déposé; cela permet d'obtenir des couches de SiO2 de dimensions réduites et, partant, de diminuer le coût de fabrication et les dimensions des dispositifs.
PCT/US2000/015851 1999-06-11 2000-06-09 Procedes pour reguler la sensibilite en surface des films isolants dans des dispositifs semi-conducteurs WO2000077831A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU54767/00A AU5476700A (en) 1999-06-11 2000-06-09 Methods for regulating surface sensitivity of insulating films in semiconductor devices

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13889899P 1999-06-11 1999-06-11
US60/138,898 1999-06-11

Publications (2)

Publication Number Publication Date
WO2000077831A2 WO2000077831A2 (fr) 2000-12-21
WO2000077831A3 true WO2000077831A3 (fr) 2001-07-05

Family

ID=22484160

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/015851 WO2000077831A2 (fr) 1999-06-11 2000-06-09 Procedes pour reguler la sensibilite en surface des films isolants dans des dispositifs semi-conducteurs

Country Status (3)

Country Link
AU (1) AU5476700A (fr)
TW (1) TW563223B (fr)
WO (1) WO2000077831A2 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7431967B2 (en) * 2002-09-19 2008-10-07 Applied Materials, Inc. Limited thermal budget formation of PMD layers
US7141483B2 (en) 2002-09-19 2006-11-28 Applied Materials, Inc. Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill
US9142400B1 (en) 2012-07-17 2015-09-22 Stc.Unm Method of making a heteroepitaxial layer on a seed area

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5051380A (en) * 1989-12-27 1991-09-24 Semiconductor Process Laboratory Co., Ltd. Process for producing semiconductor device
US5290358A (en) * 1992-09-30 1994-03-01 International Business Machines Corporation Apparatus for directional low pressure chemical vapor deposition (DLPCVD)
US5356722A (en) * 1992-06-10 1994-10-18 Applied Materials, Inc. Method for depositing ozone/TEOS silicon oxide films of reduced surface sensitivity
US5420065A (en) * 1993-05-28 1995-05-30 Digital Equipment Corporation Process for filling an isolation trench
US5458919A (en) * 1987-03-18 1995-10-17 Kabushiki Kaisha Toshiba Method for forming a film on a substrate by activating a reactive gas
US5462899A (en) * 1992-11-30 1995-10-31 Nec Corporation Chemical vapor deposition method for forming SiO2
US5489553A (en) * 1995-05-25 1996-02-06 Industrial Technology Research Institute HF vapor surface treatment for the 03 teos gap filling deposition
US5891810A (en) * 1996-05-16 1999-04-06 Lg Semicon Co., Ltd. Process for supplying ozone (O3) to TEOS-O3 oxidizing film depositing system

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5458919A (en) * 1987-03-18 1995-10-17 Kabushiki Kaisha Toshiba Method for forming a film on a substrate by activating a reactive gas
US5051380A (en) * 1989-12-27 1991-09-24 Semiconductor Process Laboratory Co., Ltd. Process for producing semiconductor device
US5356722A (en) * 1992-06-10 1994-10-18 Applied Materials, Inc. Method for depositing ozone/TEOS silicon oxide films of reduced surface sensitivity
US5290358A (en) * 1992-09-30 1994-03-01 International Business Machines Corporation Apparatus for directional low pressure chemical vapor deposition (DLPCVD)
US5462899A (en) * 1992-11-30 1995-10-31 Nec Corporation Chemical vapor deposition method for forming SiO2
US5420065A (en) * 1993-05-28 1995-05-30 Digital Equipment Corporation Process for filling an isolation trench
US5489553A (en) * 1995-05-25 1996-02-06 Industrial Technology Research Institute HF vapor surface treatment for the 03 teos gap filling deposition
US5891810A (en) * 1996-05-16 1999-04-06 Lg Semicon Co., Ltd. Process for supplying ozone (O3) to TEOS-O3 oxidizing film depositing system

Also Published As

Publication number Publication date
TW563223B (en) 2003-11-21
AU5476700A (en) 2001-01-02
WO2000077831A2 (fr) 2000-12-21

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