AU5476700A - Methods for regulating surface sensitivity of insulating films in semiconductor devices - Google Patents

Methods for regulating surface sensitivity of insulating films in semiconductor devices

Info

Publication number
AU5476700A
AU5476700A AU54767/00A AU5476700A AU5476700A AU 5476700 A AU5476700 A AU 5476700A AU 54767/00 A AU54767/00 A AU 54767/00A AU 5476700 A AU5476700 A AU 5476700A AU 5476700 A AU5476700 A AU 5476700A
Authority
AU
Australia
Prior art keywords
methods
semiconductor devices
insulating films
regulating surface
surface sensitivity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU54767/00A
Inventor
Joseph Ellul
Giovanni Antonio Foggiato
Asharf R. Khan
Hariram Krishnamoorthy
Sasangan Ramanathan
Dilip Vijay
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon USA Inc
Original Assignee
Quester Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Quester Technology Inc filed Critical Quester Technology Inc
Publication of AU5476700A publication Critical patent/AU5476700A/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02304Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Formation Of Insulating Films (AREA)
AU54767/00A 1999-06-11 2000-06-09 Methods for regulating surface sensitivity of insulating films in semiconductor devices Abandoned AU5476700A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13889899P 1999-06-11 1999-06-11
US60138898 1999-06-11
PCT/US2000/015851 WO2000077831A2 (en) 1999-06-11 2000-06-09 Methods for regulating surface sensitivity of insulating films in semiconductor devices

Publications (1)

Publication Number Publication Date
AU5476700A true AU5476700A (en) 2001-01-02

Family

ID=22484160

Family Applications (1)

Application Number Title Priority Date Filing Date
AU54767/00A Abandoned AU5476700A (en) 1999-06-11 2000-06-09 Methods for regulating surface sensitivity of insulating films in semiconductor devices

Country Status (3)

Country Link
AU (1) AU5476700A (en)
TW (1) TW563223B (en)
WO (1) WO2000077831A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7431967B2 (en) * 2002-09-19 2008-10-07 Applied Materials, Inc. Limited thermal budget formation of PMD layers
US7141483B2 (en) 2002-09-19 2006-11-28 Applied Materials, Inc. Nitrous oxide anneal of TEOS/ozone CVD for improved gapfill
US9142400B1 (en) 2012-07-17 2015-09-22 Stc.Unm Method of making a heteroepitaxial layer on a seed area

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR910006164B1 (en) * 1987-03-18 1991-08-16 가부시키가이샤 도시바 Making method and there device of thin film
JPH0680657B2 (en) * 1989-12-27 1994-10-12 株式会社半導体プロセス研究所 Method for manufacturing semiconductor device
US5356722A (en) * 1992-06-10 1994-10-18 Applied Materials, Inc. Method for depositing ozone/TEOS silicon oxide films of reduced surface sensitivity
US5290358A (en) * 1992-09-30 1994-03-01 International Business Machines Corporation Apparatus for directional low pressure chemical vapor deposition (DLPCVD)
JPH086181B2 (en) * 1992-11-30 1996-01-24 日本電気株式会社 Chemical vapor deposition method and chemical vapor deposition apparatus
US5420065A (en) * 1993-05-28 1995-05-30 Digital Equipment Corporation Process for filling an isolation trench
US5489553A (en) * 1995-05-25 1996-02-06 Industrial Technology Research Institute HF vapor surface treatment for the 03 teos gap filling deposition
KR100205316B1 (en) * 1996-05-16 1999-07-01 구본준 Deposition device of teos-o3 oxidation film and method to supply o3 to the device

Also Published As

Publication number Publication date
WO2000077831A2 (en) 2000-12-21
WO2000077831A3 (en) 2001-07-05
TW563223B (en) 2003-11-21

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase