Classifications

• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M5/00—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases
  • H02M5/02—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC
  • H02M5/04—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC by static converters
  • H02M5/22—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
  • H02M5/25—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
  • H02M5/257—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
  • H02M5/2573—Conversion of AC power input into AC power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into DC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only with control circuit
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
  • H05B39/00—Circuit arrangements or apparatus for operating incandescent light sources
  • H05B39/04—Controlling
  • H05B39/08—Controlling by shifting phase of trigger voltage applied to gas-filled controlling tubes also in controlled semiconductor devices
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10S315/00—Electric lamp and discharge devices: systems
  • Y10S315/04—Dimming circuit for fluorescent lamps

Definitions

• the present invention relates generally to electronic systems that employ a phase control technique to control the amount of power delivered from an AC source/ AC line to a load, such as a lighting load.
• the present invention specifically relates to a lighting control system, such as a dimming panel or a wall mounted dimmer switch, that employs a phase control technique to control the dimming level of a lighting load by altering the conduction angle of a thyristor that is in series with the load.
• the present invention is described herein in the context of a dimming system for a lighting load, but is not limited thereto.
• the present invention has applicability in any AC phase control system where it is desired to minimize undesired variations in the power delivered to a phase controlled load caused by a noisy or unstable AC source, especially at low levels of delivered power.
• a thyristor in series with the AC lighting load to effect the dimming function. Dimming is performed by altering the conduction angle of the thyristor, usually by delivering a trigger signal to a gate of the thyristor such that the timing of the trigger signal varies with the selected dimming level.
• generation of the trigger signal is synchronized with the AC line voltage (the fundamental frequency waveform of which is sometimes referred to herein as "the AC fundamental") such that, some time after a zero crossing of the AC line voltage is detected, the trigger signal is generated, the gate of the thyristor is energized, and the thyristor conducts for the remainder of the AC half cycle.
• the thyristor is non-conducting (during which time no power is delivered from the AC source to the load), and usually this time interval is altered in response to adjustment of a dimming knob or slider by a user, or in response to changes in a dimming signal level. Altering this time interval thus alters the conduction angle of the thyristor, and hence alters the RMS power delivered to the load. See commonly assigned U.S. Patent Number 5,430,356 entitled “Programmable Lighting Control System With Normalized Dimming For Different Light Sources", the entirety of which is incorporated herein by reference.
• AC line conditions are rarely ideal, and less than ideal conditions can cause inaccuracy in the detection of zero crossings, with consequent intensity variations and/or flickering, as well as other problems, especially at low levels of delivered power.
• the prior art has recognized that one condition that can cause intensity variations and/or flickering is intermittent and/or periodic electrical noise on the AC line. For example, voltage "spikes" can be imposed on the AC line by the switching on and off of heavy equipment such as large motor loads. See Figure 1. Electrical noise on the AC line can be incorrectly interpreted by the dimming circuitry as zero crossings of the AC fundamental, and these false interpretations can lead to premature and/or erratic conduction of the thyristor.
• Distortion may be characterized by a "bumpy" or “wavy” AC waveform, i.e., one that is not a smooth sinusoid. See Figure 2. This "bumpiness” can also move relative to the AC fundamental, i.e., it is not synchronized to it. Distortion can also cause false zero crossing detection.
• PLL phase locked loop
• a common prior art solution to the problem of detecting zero crossings in an AC line having unstable frequency is to sample the AC line during a small "sampling window" (e.g., 500 microsec. wide) at periodic intervals.
• a sample timer is set to open the sample window just before the next zero crossing of the AC line is expected, e.g., for a 60 Hz line, the sample window is opened at 8.33 msec, intervals.
• the AC line is monitored for a zero crossing; the AC line is not monitored for zero crossings between sample windows.
• any zero crossing that is detected after the sample window has been opened can be taken as the actual zero crossing of the AC line, and the sample timer is reset.
• the last zero cross detection is used as the actual zero cross crossing of the AC line.
• the window detection method can detect zero crossings in an AC line of unstable frequency provided that the change in period is not so substantial that the actual zero crossing falls outside of the sampling window.
• the prior art has failed to recognize that the conditions of noise/distortion on the AC line, on the one hand, and frequency variation of the AC line, on the other hand, may be simultaneously and/or alternatively present.
• the prior art has also failed to recognize that, in addition to the presence of these conditions, the condition of changing RMS voltage may also be simultaneously and/or alternatively present. To make matters worse, all of these conditions may be variably and intermittently present on the AC line, and these and other line conditions may be constantly changing. A condition that is present at one moment may be gone or replaced by another at the next moment; one combination of conditions may exist at one moment and be replaced by another combination at the next moment; and/or all or none of these conditions may exist at any given time.
• the condition of the AC line can be extremely dynamic. No prior art has attempted to address the problem of detecting zero crossings in the AC line under combinations of these conditions, in part, because the prior art has not recognized this dynamic nature of the AC line.
• the applicants hereof have not only recognized the dynamic nature of the AC line, but have also recognized why the prior art is incapable of addressing all of these conditions.
• the applicants hereof have recognized that conventional techniques for detecting zero crossings in the presence of noise/distortion are inconsistent with conventional techniques for detecting zero crossings in an AC line of unstable frequency, and that the prior art solutions to these problems conflict.
• the conditions of noise and distortion suggest that the AC line be integrated over a number of cycles, and therefore over a period of time, as is done when using a phase locked loop.
• the conditions of frequency changes and changes in RMS voltage suggest an instantaneous analysis of the AC line and an instantaneous response to any frequency or RMS voltage change.
• invoking a time delay and instantaneous analysis and response are conflicting solutions.
• the PLL method that is effective in a noisy environment is ineffective when the AC line frequency is unstable, because the PLL effectively employs an integration technique and frequency changes in the AC line can result in a temporary phase shift between the internally generated signal and the AC line.
• the PLL will adjust the phase of the internal signal to create substantial coincidence with the AC line, but during the adjustment time, the conduction angle of the thyristor will vary and may be manifested as slow intensity variations in the lighting load. This condition can be aggravated if the magnitude and/or rate of frequency variation of the AC line is greater than the error correction rate of the PLL, because the PLL may then be unable to track the AC line due to timing limits in the software.
• phase difference between the AC line and the internal signal will become great, and the intensity of the light source may vary significantly. Any time there is a substantial difference between the AC line zero cross and the internally generated signal of the PPL for a substantial period of time, visible changes in light will occur.
• the window detection method that is effective to detect zero crossing in an AC line of unstable frequency is ineffective in the presence of noise/distortion because, when the sample window is open, any zero crossing that occurs, whether due to noise, distortion or an actual zero crossing of the AC line, can be taken as the actual zero crossing of the AC line.
• This type of system does not adequately distinguish noise and distortion from actual zero crossings, and can possibly aggravate flickering/intensity variation problems caused by false detection of zero crossings due to noise/distortion.
• Some prior art systems gate the thyristor at regular periodic intervals, based on a selected dimming level, on the assumption that there will be no change in the timing of the zero crossings of the AC fundamental, or in the RMS voltage of the AC line after the thyristor has begun conducting. They are designed to deliver what is assumed will be a fixed amount of power once conduction begins. In these systems, the problems caused by frequency changes and changes in the RMS voltage of the AC line can be exaggerated.
• both the frequency of the AC line may change (causing a change in the time between zero crossings), and, the RMS voltage of the AC line may change during conduction. Since, once fired, the thyristor will continue to conduct until the next zero crossing occurs, the RMS power delivered to the load can vary substantially relative to a preceding or succeeding cycle.
• the integration time of the PLL is made sufficiently large to avoid the effects of AC line noise, frequency variations as small as 0.2% can be visible, and in some locations, especially in some less industrialized countries, the frequency of the AC line supplied by the electric company can change substantially more than this over very short periods of time.
• Software can be employed in a dimming system to analyze the AC fundamental and address one or more of the above conditions, but a software based system can cause other problematic conditions, such as aliasing on the AC line, due to interaction between the system's sample clock and the AC line. Aliasing occurs when the waveform is under-sampled.
• the prior art also includes a dimming system, known as the N-Module, that has been made and sold by the assignee hereof.
• N-Module a dimming system
• a simplified diagram of a portion of the N-module is shown in Figure 4.
• a transformer Tl steps down 120V AC to 24V AC.
• a 2.2uF capacitor Cl placed across the output of Tl, and before the full wave bridge rectifier (FWB), combines with the inherent leakage inductance of Tl to form an LC filter that reduces or eliminates frequencies above about 1.6 kHz.
• the filtered signal is supplied to the FWB, and the full wave rectified output of the FWB is analyzed for zero crossings by a zero crossing detector ZC.
• the output of ZC is then used for dimming purposes.
• Figure 1 is an exemplary plot illustrating the problem of noise spikes on an AC line in the prior art.
• Figure 2 is an exemplary plot illustrating the problem of a "wavy” or “bumpy” waveform caused by noise on the AC line in the prior art.
• Figure 3 is an exemplary plot illustrating the problem of distortion of the
• Figure 4 illustrates a relevant portion of a prior art circuit.
• Figure 5 illustrates one embodiment of a three wire dimming circuit employing the present invention.
• Figure 6 illustrates another embodiment of a three wire dimming circuit employing the present invention.
• Figure 7 illustrates a two wire embodiment of a dimming circuit employing the present invention.
• Figure 8 A illustrates the details of one circuit embodiment of a filter that may be employed in the practice of the present invention for recovering the AC fundamental waveform or the second harmonic frequency of the AC fundamental waveform from the AC line waveform.
• Figure 8B is one embodiment of a zero crossing detector that may be employed in the practice of the present invention.
• Figure 9 is a spectral plot of filter characteristics for three different filter types.
• Figure 10A illustrates an AC line voltage waveform, and a recovered, phase delayed, AC fundamental waveform, together with an exemplary output from the zero crossing detector.
• Figure 10B illustrates an AC line voltage waveform which has been full wave rectified, and a recovered, phase delayed, second harmonic frequency of the AC fundamental waveform together with an exemplary output from the zero crossing detector.
• Figure 11 A and 1 IB are spectral plots illustrating the performance of the present invention.
• Figure 12 is a flowchart illustrating an algorithm that may be carried out by a microprocessor, for maintaining constant duty cycle, according to one embodiment of the present invention.
• Figure 13 is a flowchart illustrating a phase delay compensation that may be carried out by a microprocessor, according to an embodiment of the present invention. Summary of the Invention
• a load control system for controlling power delivered to a load from an AC source comprises a filter for filtering the AC line voltage waveform to provide a signal that is an accurate reconstruction of the fundamental waveform of the AC line voltage ("AC fundamental") that is substantially free of any noise on, or distortion of, the AC line voltage waveform.
• the output of the filter i.e., the AC fundamental
• the zero crossing detector that provides zero crossing indications of the AC fundamental, rather than of the AC line voltage waveform.
• the zero crossing indications are employed by a controller, such as a microprocessor, to calculate when a controllably conductive device interposed between the load and the AC source should be rendered conductive.
• the filter is an active low pass filter that attenuates frequency components of the AC line voltage waveform that are substantially equal to third harmonics and greater of the AC fundamental.
• the filter is designed to provide a substantially linear phase delay of less than one half of a period of the frequency of the AC fundamental and has a substantially flat frequency gain characteristic up to about the frequency of the AC fundamental when the filter receives the AC line voltage in unrectified form, or up to about twice frequency of the AC fundamental when the filter receives the AC line voltage in rectified form.
• the filter is further designed such that its gain characteristic decreases rapidly thereafter.
• the filter may be designed to have a corner frequency of about 55 Hz and to provide a phase delay of about 135 ° at the fundamental frequency and no substantial gain after about 150 Hz.
• the filter may be designed to have a corner frequency of about 111 Hz, and to provide a phase delay of about 135 ° at the fundamental frequency and no substantial gain after about 300 Hz.
• the controller measures the amount of phase delay interposed by the filter and adjusts the time after the measured phase delay at which the controllably conductive device turns on, to compensate for differences between a measured phase delay and the nominal phase delay of an ideal filter.
• This embodiment of the invention is useful to compensate for variances caused by aging filter components, or variances due to component tolerances.
• the controller attempts to control the controllably conductive device with a control signal of constant duty cycle so that the amount of power supplied to the load remains constant.
• the filter may be embodied as an analog filter, such as a Bessel filter.
• the invention has application to dimming circuits, such as dimming panel systems and two and three wire wall mountable dimming switches. Detailed Description of the Preferred Embodiment
• the preferred embodiment of the present invention is described herein in the context of a dimming system for a lighting load, but is not limited thereto, except as may be set forth expressly in the appended claims.
• the present invention has application to any AC controller that employs a phase control technique for control of load power, i.e., a system where a controllably conductive device is either turned on or off based on a length of time after detection of a zero cross of the AC line, for example, a phase control or reverse phase control dimmer.
• the present invention is described herein in the context of a wall mountable dimmer switch, but has applicability to any dimming system, including, by way of example, dimming systems with panel mounted dimmers, and the present invention is directed to and encompasses all such systems.
• the implementation of the present invention in such applications and systems will be readily apparent to those skilled in the art from the following description. Referring to the drawings, wherein like numerals represent like elements, there is shown in Figures 5 - 7 three different embodiments of a dimmer switch, such as a wall mountable dimmer switch, for a lighting load, each employing the present invention.
• Figures 5 and 6 illustrate the application of the invention in a typical three wire dimmer switch
• Figure 7 illustrates the application of the invention in a typical two wire dimmer switch.
• Each embodiment is characterized by a pass band or low pass filter that receives the AC line voltage either directly, in unrectified form ( Figures 5 and 7), or in full wave rectified form ( Figure 6).
• the output of the filter is supplied to a zero cross detector and the output of the zero cross detector is supplied to a microprocessor (or an analog control circuit).
• the three wire dimmer switch 10 is connected to the AC source 12 and to the lighting load 14 by wires 16, 18, 20, in well known fashion.
• the load 14 is in series with a control device 22 that controls the RMS voltage applied to the load 14 in accordance with control signals supplied to a control electrode 24 by the microprocessor 26.
• the control device 22 is a controllably conductive device, such as a triac, MOSFET, IGBT, back to back SCR's, thyristors, etc., that receives trigger signals on a gate electrode 24 thereof from the microprocessor 26.
• the microprocessor 26 receives an input from a zero crossing detector 28 via an optocoupler 35 and also receives data indicative of the selected dimming level.
• Zero crossing detector 28 provides an output signal to the microprocessor 26 each time that a zero crossing of the input signal thereto is detected.
• Microprocessor 26 is programmed in well known fashion to set the desired dimming level in response to the zero crossing indications and the selected dimming level.
• a power supply 32 supplies necessary DC power to the microprocesssor 26.
• a power supply 33 on the AC side of the bridge 34 supplies necessary power to the filter 30, the zero cross detector 28, and the optocoupler 35.
• a full wave bridge rectifier 34 is employed to rectify the AC line.
• the two wire dimming switch 10" is connected to one side of the load and to one side of the AC line by wires 16, 18 in well known fashion.
• the load 14 is in series with a thyristor 22 that controls the RMS voltage applied to the load 14 in accordance with control signals supplied to a control electrode 24 associated with a control device 22 by the microprocessor 26.
• the operation of the two wire dimmer switch is otherwise essentially as set forth above. Note optional "lightly filtered" circuit 41, explained hereinafter.
• the AC source voltage is provided to a low pass active filter 30, 30' and the output of the filter 30, 30' is supplied to a zero crossing detector 28.
• the AC line is filtered first, and the filter output is checked for the occurrence of zero crossings.
• the function of the filter 30, 30' is to substantially remove or attenuate frequency components of the AC line above the fundamental frequency (or above twice the fundamental frequency in certain cases), and to do so "quickly", i.e, with minimum, phase delay.
• the filter has a substantially flat frequency gain characteristic up to about the fundamental frequency (or up to about twice the fundamental frequency in certain cases) and a rapidly decreasing gain characteristic thereafter, and interposes a substantially linear phase delay (constant time delay) in the pass band to the fundamental frequency component.
• the output of the filter therefore is the AC fundamental component (or the second harmonic frequency of the AC fundamental component in certain cases), time delayed by a constant amount relative to the AC line, that is substantially free of noise and distortion.
• the output of the filter is the AC fundamental component (or the second harmonic frequency of the AC fundamental component) of the AC line, any fundamental frequency variations on the AC line will appear in the AC fundamental component (or the second harmonic frequency of the AC fundamental component) at the filter output. Therefore, the AC fundamental component (or the second harmonic frequency of the AC fundamental component) present at the filter output is a nearly ideal signal for zero crossing detection.
• Figure 10A is a plot showing the AC line entering the filter 30, line 60 of Figure 10 A, and showing the output of the filter (AC fundamental), on line 62 of Figure 10A.
• Line 64 of Figure 10A shows the output of the zero crossing detector 28, where rising edges are indicative of zero crosses of the AC fundamental, line 62.
• the plots shown are for a 50Hz line frequency, i.e., a 10msec half period.
• the plot of Figure 10A is applicable to embodiments of the invention where the filter 30 is on the AC side of the dimming circuit, e.g., Figure 5. It will be seen that, in the example of Figure 10A, the plot 62 of the output of the filter 30 is phase delayed relative to the AC line plot 60 by approximately 5msec.
• the total phase delay time is the filter delay time.
• the filter delay time is dependent on the cut off frequency selected. In the preferred embodiment, the cutoff frequency selected is 55Hz. This results in approximately a 5msec filter delay time.
• the microprocessor 26 processes the information about the zero crosses from point B' to point C; this is less than 1msec.
• the information about the zero crosses is used by the microprocessor 26 to determine the half period of the AC fundamental 62, which will be used in order to properly gate the thyristor.
• the microprocessor is programmed to attempt to maintain constant duty cycle. Constant duty cycle means that even if the AC line frequency changes (which will change the time between zero crosses), the amount of power output to the load will be held constant. In order to maintain constant power while the AC line frequency is changing, the amount of time after the zero cross that the thyristor is to be fired must be adjusted.
• the filter 30 is designed to remove or substantially attenuate frequency components of the AC line voltage waveform that are substantially equal to third harmonics and greater of the AC fundamental. Second order harmonics are not an issue on the AC line, and any noise and distortion components are likely to be in a frequency range greater than the second harmonic frequency. Though an ideal filter would provide no phase delay, practical filter implementations always interpose some phase delay. In the preferred embodiment of the filter 30 of the present invention, the phase delay should not be more than half the period of the fundamental frequency (i.e., less than 180°) to ensure proper dimming function.
• phase delay should be no greater than about 135° to provide adequate time (within each half cycle of the AC line) for the microprocessor to compute a conduction angle and fire the thyristor well within this range of the half cycle.
• the requested dimming level is low enough, it is still possible to fire the thyristor at point C, or after point C in the negative half cycle, with the zero cross information of the same half cycle. It is at these low light levels when the present invention is most beneficial. If the requested dimming level is such that the thyristor must be fired at a point prior to point C ' in a half cycle, the system will wait until the next half cycle and will use the information from the previous half cycle. The system will use the most recent zero cross and period information available, which may be from an earlier half cycle of the same polarity.
• the microprocessor 26 will use information about the zero cross from the same half cycle in which the thyristor is to be fired. If the dimming system is fading from a high light level to a low light level, the microprocessor 26 will change from using information a half cycle old (i.e., from the previous half cycle) to using information from the same half cycle to fire the thyristor. Determining and programming such a transition, however, may complicate the coding of the microprocessor. For simplicity, information about the length of the half cycle from two prior half cycles may be used. Another reason for waiting until the next positive half cycle to use information about the previous positive half cycle is that the positive half cycle and the negative half cycle might not be symmetrical about zero volts. It is preferred to correct the dynamic problems during the same polarity of half cycle that the problem occurred, even if it is delayed by a full cycle.
• the filter 30 is coupled to receive the AC line 12 in unrectified form.
• the filter 30 is on the AC side of the circuit.
• the output of the filter 30 is supplied to zero crossing detector 28 as above described. Since the filter receives the AC line in unrectified form, i.e., the filter 30 receives the AC line at the fundamental frequency of 50/60 Hz, the criteria of an embodiment of the present invention may require that the gain characteristic of the filter be substantially flat up to about the fundamental frequency of 50/60 Hz, but this is not critical to the overall operation of the invention.
• the filter 30' (which is substantially identical to filter 30, except as described hereafter) is coupled to receive the output of the full wave bridge rectifier 34.
• the filter 30' is on the DC side of the circuit, and receives the AC line in full wave rectified form rather than in unrectified form as in Figure 5.
• the filter thus receives the AC line at twice the frequency of the AC line 12 (and at twice the frequency of the filter 30 of Figure 5).
• the criteria of an embodiment of the present invention may require that the gain characteristic of the filter be substantially flat up to about the twice the fundamental frequency of 50/60 Hz, i.e., that it be substantially flat up to about 100/120 Hz, although, again, this is not critical to the overall operation of the invention.
• the dimmer switch 10' of Figure 6 is otherwise identical to that of Figure 5.
• Figure 10B is a plot showing the full wave rectified AC line 60' and the recovered AC fundamental 62, i.e., the output of filter 30', for embodiments of the invention where the filter 30' is on the DC side of the dimming circuit, e.g., such as in the embodiment of Figure 6. Note the phase delay between the two waveforms.
• the phase delay of output waveform 62 from input waveform 60' is due to two components, a 90° phase shift caused by the full wave rectification, i.e., 2.5msec for a 50Hz supply and a 3msec phase delay through filter 30', which has a corner frequency of 111Hz, for a total phase delay of approximately 5.5msec.
• the filter 30 is disposed across the thyristor 22, and therefore receives the AC line in unrectified form, and the preceding discussion of Figure 5 is therefore applicable.
• the voltage across the thyristor 22 is the only available signal. For each half cycle of AC line voltage, the voltage across the thyristor 22 begins at zero and follows the incoming AC line. When the thyristor is gated on, the voltage across the thyristor 22 collapses to the forward voltage drop of the thyristor (typically 1.5 volts). The voltage remains at the forward voltage drop until the end of the half cycle.
• the signal across the thyristor 22 is available for the control circuitry to interpret and use for controlling the thyristor 22, as well as ancillary circuitry.
• the signal across the thyristor 22 always contains some component of fundamental line voltage.
• the signal also contains a varying component of harmonics of the fundamental. This varying component of harmonics changes with light level setting as well as with incoming power line quality.
• gating of a thyristor in an electronic dimmer requires a steady zero cross reference; this is also true for two wire dimmers. Since the zero cross filter previously described has the characteristic of finding the fundamental in the presence of distorted waveforms, it is well suited for finding the fundamental remaining in the voltage across the thyristor 22'.
• FIG. 8 A A four pole Bessel filter has been found to provide the desired results discussed above.
• One preferred implementation of a four pole Bessel filter is illustrated in Figure 8 A.
• the implementation of Figure 8 A has particular application to the embodiments of Figures 5, 6 and 7 since, as described below, its gain and falloff characteristics have been designed to meet the criteria discussed above in connection with Figure 6, namely a phase delay of no more than 135° at 120Hz. (Implementation of a similar filter to meet the criteria of Figures 5 and 7 is straightforward.) THE ART OF ELECTRONICS by Paul Horowitz and Winfield Hill, second edition (1991), Chapter 5 (Active Filters and Oscillators), pp. 272-275, fully describes active filter design and design criteria, including design of Bessel filters, and is incorporated herein by reference in its entirety.
• Figure 8B illustrates one embodiment of a zero crossing detector that may be employed in connection with the present invention.
• IC 1 is a LM324N, as manufactured by SGS
• Figure 9 illustrates the gain characteristic of the Bessel filter of Figure 8 A (curve 50) and also illustrates gain characteristics of a Butterworth filter (curve 52 ) and a Chebyshev filter (curve 54) designed to provide about 135° phase delay at 120Hz, as may be used with the embodiment of Figure 6.
• the Bessel filter of Figure 8 A has a corner frequency of about 111 Hz and has (relative to the Butterworth and
• Chebyshev filters a shallow gain rolloff such that the filter has no appreciable gain (less than 20%) above 300 Hz.
• the corner frequency would preferably be about 55 Hz and the rolloff would be such that the filter has no appreciable gain above about 150 Hz.
• a relatively shallow rolloff such as shown by curve 50 for the disclosed Bessel filter, provides the most frequency attenuation with a constant phase delay, and also provides the most frequency attenuation in the portion of the frequency spectrum of most importance, i.e., in the first few harmonics of the fundamental.
• a Bessel filter is preferred, but is not necessary, as the filter choice, since a Bessel filter is simpler to design and implement, and because it has a relatively constant phase delay, regardless of the AC line frequency.
• FIGS 10A and 10B it will be seen that the filter output (recovered AC fundamental on line 62), or second harmonic frequency of the AC fundamental on line 62') is substantially cleaner than the incoming AC line.
• Figures 11 A and 1 IB are spectral plots of an exemplary AC line into, and the recovered signal out of, the filter 30, respectively. It will be seen that the frequency content of the recovered signal above the fundamental frequency is substantially reduced relative to that of the AC line.
• Figure 12 is a self-explanatory flow diagram for the microprocessor 26 for maintaining constant duty cycle.
• the microprocessor captures the most recent zero cross (T B ) and the previous zero cross (T A ) of the output of the filter 30, 30' and then calculates the half cycle period.
• the end user is allowed to set the maximum high end and the minimum low end. By adjusting the high end, the end user can either reduce the maximum voltage and extend incandescent bulb life or increase the maximum voltage and obtain more light output.
• the microprocessor calculates the high end as a function of the period. By adjusting the low end, the end user can properly set the minimum voltage which is very important with fluorescent loads.
• the microprocessor calculates the low end as a function of the period.
• the high end adjustment range is 50% to 95% (K), with the setting typically at about 95%o for incandescent loads and at about 70% for fluorescent loads.
• the low end adjustment range is 5% to 49%> (M), with the setting typically at about 5% for incandescent loads and at about 30%) for fluorescent loads.
• M 5% to 49%>
• the system allows the end user to set a dimmer to a light level by selecting a value from a digital display.
• the microprocessor then fires the thyristor at time T B - phase delay + Fire using a phase delay value retrieved from memory at 207.
• This phase delay value is the phase delay, ⁇ delay, shown in Figures 10A and 10B.
• a nominal value for the phase delay of an ideal filter e.g., 5msec, can be stored in microprocessor 26 when the system is manufactured. This nominal value can be replaced with a value which reflects the measured actual phase delay of the specific filter 30, 30' connected to the microprocessor 26 as described below in connection with Figure 13.
• the microprocessor then waits for the next zero cross, and the sequence begins again at 200.
• Light filtering can be performed by a simple (usually passive) low-pass filter, for example a single resistor-capacitor stage, whose cutoff frequency is low enough to remove as much as possible of the line noise, but, high enough that the phase delay it introduces at the fundamental frequency is small enough that variation of that phase delay with variation with component tolerances (even with low-precision components) is insignificant.
• the light filtering can be performed by software routines incorporated into microprocessor 26.
• Figure 13 shows a filter phase delay compensation flowchart.
• the system monitors the lightly filtered AC line 42 and measures the phase delay between it and the "heavily filtered" AC fundamental or second harmonic frequency of the AC fundamental output from the filter 30, 30'.
• Heavy filtering can be performed by a low- pass filter (such as the active low pass filter described above) whose cutoff frequency is close to the fundamental line frequency (or twice that frequency, when the input to the filter is a full-wave rectified waveform), or a narrow-band pass filter.
• a low- pass filter such as the active low pass filter described above
• the microprocessor 26 can derive the phase delay of the actual filter 30, 30' from the difference between the heavily filtered and lightly filtered inputs. Even if the lightly filtered line 42 is unstable due to line noise, the microprocessor 26 can average this value over many line cycles to minimize the influence of the noise. Thus, the microprocessor 26 can compensate for the phase delay.
• Figure 13 shows a flow chart for implementing the zero cross filter delay compensation system shown in dashed lines in Figures 5, 6 and 7.
• the microprocessor captures a zero cross from the lightly filtered line 42 into the microprocessor 26 as Tl .
• the microprocessor captures a zero cross from the heavily filtered line output from the filter 30, 30' into the microprocessor 26 as T2.
• the microprocessor calculates the difference between Tl and T2 and stores it as ⁇ Tn.
• the microprocessor takes an average of the last K samples of ⁇ Tn and stores this as ⁇ Tavg, where K is an empirically chosen value from 10 to 10,000.
• the microprocessor stores ⁇ Tavg as the phase delay value to be retrieved at step 207 of the routine illustrated in Figure 12 in place of any previously stored value.
• the routine illustrated in the flow chart of Figure 13 is performed periodically to update the stored value of the phase delay. It is typically done whenever power is applied to the system and then at least once per day. However, it can be performed as frequently as many times per second.
• a band pass filter, a circuit containing passive circuit elements, a switched capacitor filter or a software implementation of the analog hardware filter disclosed herein may be employed, and such substitution is within the scope of the present invention.
• a system employing digital signal processing (DSP) with a high speed analog to digital converter (i.e., greater than 20 kHz) can sample and then recreate the incoming AC line.
• DSP digital signal processing
• the system can "filter” out any frequency above the fundamental. This could be used instead of the filter described above.
• the remaining fundamental frequency can then be fed into the zero cross detector and then into the microprocessor in order to properly fire the thyristor, as was previously described.
• the DSP, zero cross detector and microprocessor can be incorporated into one device.

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• Power Conversion In General (AREA)
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