WO1998032176A1 - JONCTION A ZONES nLDD HYBRIDES As/P AVEC FONCTIONNEMENT A TENSION D'ALIMENTATION MOYENNE POUR MICROPROCESSEURS A GRANDE VITESSE - Google Patents

JONCTION A ZONES nLDD HYBRIDES As/P AVEC FONCTIONNEMENT A TENSION D'ALIMENTATION MOYENNE POUR MICROPROCESSEURS A GRANDE VITESSE Download PDF

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Publication number
WO1998032176A1
WO1998032176A1 PCT/US1998/001153 US9801153W WO9832176A1 WO 1998032176 A1 WO1998032176 A1 WO 1998032176A1 US 9801153 W US9801153 W US 9801153W WO 9832176 A1 WO9832176 A1 WO 9832176A1
Authority
WO
WIPO (PCT)
Prior art keywords
region
hybrid
nldd
arsenic
regions
Prior art date
Application number
PCT/US1998/001153
Other languages
English (en)
Inventor
Deepak Kumar Nayak
Rajat Rakkhit
Ming-Yin Hao
Original Assignee
Advanced Micro Devices, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices, Inc. filed Critical Advanced Micro Devices, Inc.
Priority to EP98904623A priority Critical patent/EP0966762A1/fr
Publication of WO1998032176A1 publication Critical patent/WO1998032176A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7836—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a significant overlap between the lightly doped extension and the gate electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

L'invention concerne un procédé destiné à la fabrication d'un dispositif semi-conducteur, dans lequel des zones nLDD hybrides sont formées par implantation d'ions arsenic et d'ions phosphore dans des zones de source et de drain d'un substrat. Les zones de source et de drain sont formées par implantation d'ions arsenic ou phosphore.
PCT/US1998/001153 1997-01-21 1998-01-21 JONCTION A ZONES nLDD HYBRIDES As/P AVEC FONCTIONNEMENT A TENSION D'ALIMENTATION MOYENNE POUR MICROPROCESSEURS A GRANDE VITESSE WO1998032176A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP98904623A EP0966762A1 (fr) 1997-01-21 1998-01-21 JONCTION A ZONES nLDD HYBRIDES As/P AVEC FONCTIONNEMENT A TENSION D'ALIMENTATION MOYENNE POUR MICROPROCESSEURS A GRANDE VITESSE

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US78682197A 1997-01-21 1997-01-21
US08/786,821 1997-01-21

Publications (1)

Publication Number Publication Date
WO1998032176A1 true WO1998032176A1 (fr) 1998-07-23

Family

ID=25139679

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1998/001153 WO1998032176A1 (fr) 1997-01-21 1998-01-21 JONCTION A ZONES nLDD HYBRIDES As/P AVEC FONCTIONNEMENT A TENSION D'ALIMENTATION MOYENNE POUR MICROPROCESSEURS A GRANDE VITESSE

Country Status (2)

Country Link
EP (1) EP0966762A1 (fr)
WO (1) WO1998032176A1 (fr)

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0187016A2 (fr) * 1984-12-27 1986-07-09 Kabushiki Kaisha Toshiba Transistor à effet de champ métal isolateur-semi-conducteur à drain faiblement dopé et procédé pour sa fabrication
EP0195607A2 (fr) * 1985-03-20 1986-09-24 Fujitsu Limited Dispositif semi-conducteur
JPS61234077A (ja) * 1985-04-10 1986-10-18 Oki Electric Ind Co Ltd Ｍｉｓ型電界効果トランジスタ
US5097301A (en) * 1990-12-19 1992-03-17 Intel Corporation Composite inverse T-gate metal oxide semiconductor device and method of fabrication
EP0489559A1 (fr) * 1990-11-30 1992-06-10 Nec Corporation Transistor à effet de champ métal-oxyde semi-conducteur LDD et sa méthode de fabrication
JPH04269836A (ja) * 1991-02-25 1992-09-25 Sony Corp ｎチャンネルＭＩＳ半導体装置
EP0513639A2 (fr) * 1991-05-16 1992-11-19 International Business Machines Corporation Dispositif semi-conducteur d'un transistor à effet de champ et son procédé de fabrication
EP0543223A2 (fr) * 1991-11-12 1993-05-26 Siemens Aktiengesellschaft Méthode de formation de jonctions peu-profondes pour des transistors à effet de champ
JPH05267338A (ja) * 1992-03-19 1993-10-15 Olympus Optical Co Ltd 半導体装置の製造方法
US5376566A (en) * 1993-11-12 1994-12-27 Micron Semiconductor, Inc. N-channel field effect transistor having an oblique arsenic implant for lowered series resistance

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0187016A2 (fr) * 1984-12-27 1986-07-09 Kabushiki Kaisha Toshiba Transistor à effet de champ métal isolateur-semi-conducteur à drain faiblement dopé et procédé pour sa fabrication
EP0195607A2 (fr) * 1985-03-20 1986-09-24 Fujitsu Limited Dispositif semi-conducteur
JPS61234077A (ja) * 1985-04-10 1986-10-18 Oki Electric Ind Co Ltd Ｍｉｓ型電界効果トランジスタ
EP0489559A1 (fr) * 1990-11-30 1992-06-10 Nec Corporation Transistor à effet de champ métal-oxyde semi-conducteur LDD et sa méthode de fabrication
US5097301A (en) * 1990-12-19 1992-03-17 Intel Corporation Composite inverse T-gate metal oxide semiconductor device and method of fabrication
JPH04269836A (ja) * 1991-02-25 1992-09-25 Sony Corp ｎチャンネルＭＩＳ半導体装置
EP0513639A2 (fr) * 1991-05-16 1992-11-19 International Business Machines Corporation Dispositif semi-conducteur d'un transistor à effet de champ et son procédé de fabrication
EP0543223A2 (fr) * 1991-11-12 1993-05-26 Siemens Aktiengesellschaft Méthode de formation de jonctions peu-profondes pour des transistors à effet de champ
JPH05267338A (ja) * 1992-03-19 1993-10-15 Olympus Optical Co Ltd 半導体装置の製造方法
US5376566A (en) * 1993-11-12 1994-12-27 Micron Semiconductor, Inc. N-channel field effect transistor having an oblique arsenic implant for lowered series resistance

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 011, no. 081 (E - 488) 12 March 1987 (1987-03-12) *
PATENT ABSTRACTS OF JAPAN vol. 017, no. 065 (E - 1317) 9 February 1993 (1993-02-09) *
PATENT ABSTRACTS OF JAPAN vol. 018, no. 033 (E - 1493) 18 January 1994 (1994-01-18) *

Also Published As

Publication number Publication date
EP0966762A1 (fr) 1999-12-29

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