WO1998005048A1 - Transformateur/inducteur plan a faible rayonnement et procede correspondant - Google Patents

Transformateur/inducteur plan a faible rayonnement et procede correspondant Download PDF

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Publication number
WO1998005048A1
WO1998005048A1 PCT/US1997/011900 US9711900W WO9805048A1 WO 1998005048 A1 WO1998005048 A1 WO 1998005048A1 US 9711900 W US9711900 W US 9711900W WO 9805048 A1 WO9805048 A1 WO 9805048A1
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WO
WIPO (PCT)
Prior art keywords
inductor
loops
printed circuit
circuit board
spiral
Prior art date
Application number
PCT/US1997/011900
Other languages
English (en)
Inventor
Pallab Midya
Mark Allen Schamberger
Original Assignee
Motorola Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc. filed Critical Motorola Inc.
Priority to AU35978/97A priority Critical patent/AU3597897A/en
Publication of WO1998005048A1 publication Critical patent/WO1998005048A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/28—Coils; Windings; Conductive connections
    • H01F27/2804—Printed windings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H01F2017/0086—Printed inductances on semiconductor substrate

Definitions

  • the present invention relates generally to induction and, more particularly, to substantially planar inductors.
  • the windings are typically on a spool around a loop of magnetic material.
  • the winding may include either a wire of conducting material or may be a part of a printed circuit board.
  • the inductor/transformer requires additional volume and cost.
  • Other structures in the prior art include printed circuit boards with embedded magnetic material which require additional steps in their manufacture. Planar inductors that are unshielded by magnetic material tend to radiate a magnetic field producing EMI (electromagnetic interference) that interferes with adjacent circuitry.
  • EMI electromagnelectromagnetic interference
  • planar inductor/transformer that maximizes cancellation of a moment of the plurality of loops/spiral conductor coils over a predetermined range.
  • the planar inductor/transformer may be oriented to allow placement of EMI-sensitive circuitry in the predetermined range.
  • FIG. 1 is a diagrammatic representation of a 4-loop single layer planar inductor in accordance with the present invention.
  • FIG. 2 is a diagrammatic representation of a 4-loop, two layer planar inductor in accordance with the present invention.
  • FIGs. 3-5 are schematic representations of 4-loop, 6- loop, and 8-loop planar inductors/transformers in accordance with the present invention.
  • FIG. 6 is a schematic representation of the magnetic field of a 6-loop inductor/transformer in accordance with the present invention.
  • FIG. 7 is a diagrammatic representation of a side view of one embodiment of a planar inductor/transformer having a bulk ferrite above and below the planar structure in accordance with the present invention.
  • FIG. 8 is a diagrammatic representation of a side view of another embodiment of a planar inductor/transformer including a shield above and below the planar structure for enhancing cancellation of the magnetic field in accordance with the present invention.
  • FIG. 9 is a diagrammatic representation of another embodiment of a planar inductor/transformer including multiple auxiliary conducting structures adjacent to the planar structure for enhancing cancellation of the magnetic field in accordance with the present invention.
  • FIG. 10 is a diagrammatic representation of a side view of an embodiment of a transformer including a primary winding on one surface and a secondary winding on an opposite surface in accordance with the present invention.
  • FIG. 11 represents a radiation field pattern for a single spiral as is known in the art.
  • FIG. 12 represents a radiation field pattern for a figure 8 shape as is known in the art.
  • FIG. 13 represents a radiation field pattern for the structure shown in FIG. 1.
  • FIG. 14 represents a radiation field pattern for the structure shown in FIG. 9.
  • FIG 15 reresents a radiation field pattern for the structures shown in FIGs. 4 and 6.
  • FIG 16 reresents a radiation field pattern for the structure shown in FIG. 18.
  • FIG. 17 is a schematic representation of another embodiment of a double spiral, with one spiral inside another spiral, of a planar inductor in accordance with the present invention.
  • FIG. 18 is a diagrammatic representation of an asymmetricly placed 4-loop single layer planar inductor in accordance with the present invention.
  • FIG. 19 is a flow chart of one embodiment of steps of one embodiment of a method in accordance with the present invention.
  • FIG. 20 is a flow chart of one embodiment of steps of another embodiment of a method in accordance with the present invention.
  • FIGs. 21-22 are graphical representations of results of simulations of the coupled magnetic field of a circular loop, a 4-loop inductor, a 6-loop inductor and an 8-loop inductor in correspondence with FIGs. 3-5.
  • FIG. 23 is a graphical representation of the inductance of a 4-loop spiral inductor implementation of the present invention and a simple circular spiral occupying the same area on a two-layer printed circuit board.
  • FIG. 24 is a graphical representation of the resistance of a 4-loop spiral inductor implementation of the present invention and a simple circular spiral occupying the same area on a two-layer printed circuit board.
  • FIG. 25 is a graphical representation of the quality factor (Q) of a 4-loop spiral inductor implementation of the present invention and a simple circular spiral occupying the same area on a two-layer printed circuit board.
  • FIG. 26 is a diagrammatic representation of a spiral inductor that is placed concentrically above a non-interacting multiloop inductor structure such that the coupled magnetic field is substantially zero in accordance with the present invention.
  • FIG. 27 is a diagrammatic representation of a printed circuit board inductor with a topology that includes at least four consecutively coupled conducting loops/spirals on a polygonal lattice wherein the conducting loops/spirals are scaled from the topology to provide a zero net moment in accordance with the present invention.
  • the present invention provides a method and planar inductor/transformer that maximizes cancellation of a moment of the plurality of loops/spiral conductor coils over a predetermined range such that interference with external and adjacent circuitry is minimized.
  • the invention is particularly useful for switched power converters and inductors in RF transmitters which have a size constraint.
  • planar inductors are not a part of choice in the above applications due to interference.
  • the present invention reduces interference by at least an order of magnitude in comparison with the prior art, thus making the present invention more suitable for use in power converters and RF transmitters.
  • the present invention provides a planar magnetic field inductor/transformer that has a plurality of at least three planar adjacent loops/spiral conductor coils arranged one after another in a simple/compound loop fashion.
  • the planar adjacent loops/spiral conductor coils carry a current produced by a signal source, and the plurality of planar adjacent loops/spiral conductor coils are arranged to maximize cancellation of a moment of the plurality of loops/spiral conductor coils over a predetermined range.
  • an electrical connection to an internal end of a loop/spiral is made through an electriclly conducting via that passes through a substrate.
  • a spiral may be achieved by providing space from a substrate surface by a plurality of spaced apart electrically conductive posts having a staggered arrangement between adjacent windings of the spiral.
  • a transformer generally includes at least two windings disposed on top of each other in a semiconductor substrate and separated by an electrically insulating film.
  • the inductor/transformer may include a multi-layer structure that further includes one of: A) at least another planar magnetic field inductor/transformer arranged with the planar magnetic field inductors/transformers one above the other; and B) at least another planar magnetic field inductor/transformer arranged with the planar magnetic field inductors/transformers one above the other and a bulk ferromagnetic layer having a thickness of greater than 100 ⁇ m wherein the ferromagnetic layer/layers is located in one of the following locations: B1 ) above the planar magnetic field inductor(s)/transformer(s); B2) below the planar magnetic field inductor(s)/transformer(s); B3)above and below the planar magnetic field inductor(s)/transformer(s).
  • the spiral inductor is typically embodied by disposing an electrical conductor in a first spiral on a first surface of a substrate, wherein the spiral includes an external end disposed outside the spiral as a first terminal and an internal end disposed within the spiral as a second terminal.
  • planar adjacent loops/spiral conductor coils are typically arranged having alternating opposite current flow or. alternatively, set/sets of planar adjacent loops/spiral conductor coils that have current flows having phases that cancel.
  • the planar magnetic field inductor/transformer may be selected to further include a conducting structure/structures for enhancing cancellation of a extraneous magnetic field/fields, wherein the conducting structure/structures is/are located above, below, adjacent to, or above and below the planar magnetic field inductor/transformer.
  • the at least three planar adjacent loops/spiral conductor coils may have a same predetermined structure, i.e., size and shape, to provide maximum cancellation of a moment over a 360° range or alternatively, may have dissimilar structures to provide maximum cancellation of the moment over a range less than 360°.
  • n the number of turns in the spiral
  • p the number of layers
  • m the width of the conductor (e.g., a trace) in terms of the skin depth of the conductor.
  • the thickness of the conductor is assumed to be substantially equal to the skin depth of the conductor. Skin depth is the depth to which there is substantial current flow on a conductor surface;
  • d is a lateral dimension of an individual loop and ⁇ is the magnetic permeability.
  • ⁇ is the magnetic permeability.
  • the gap between the conductors is equal to the conductor thickness.
  • the effect of the printed circuit board material is generally negligible.
  • the current density in the conductor is approximately constant.
  • FIG. 1 is a diagrammatic representation of a 2N-loop, N a predetermined integer, single layer planar inductor, where 2N is selected to be 4, in accordance with the present invention.
  • the planar magnetic field inductor/transformer typically includes an even number (2N) of planar adjacent loops/spiral conductor coils arranged one after another in a simple closed loop.
  • the 4 planar adjacent loops/spiral conductor coils (106, 108, 110, 112) carry a current produced by a signal source.
  • the even number of planar adjacent loops/spiral conductor coils are arranged to provide total cancellation of a magnetic field on N axes and to maximize overall cancellation of the magnetic field.
  • the planar magnetic field inductor/transformer may be further 1.1 implemented as described above.
  • the current flows counterclockwise in two diagonally located coils (106, 1 10) and clockwise in the other two diagonally located coils (108, 112).
  • the inductor has two terminals (102) and has two crossovers (104, 114) that connect the centers of each of the two pairs of spirals.
  • FIG. 2 shows a diagrammatic representation of a 4-loop, two layer planar inductor that, for example, may be implemented on a two-layer printed circuit board.
  • the inductor has two terminals (210) and has 4 vias (202, 204, 206, 208) which couple the top layer (212) and bottom layer (214) located at the centers of the spirals.
  • the magnetic fields of the two layers are coupled, and the total inductance is larger than the sum of the individual inductances of the two layers.
  • two layers may utilized to construct two non-interacting inductors disposed concentrically (FIG. 26, numeral 2600).
  • a spiral inductor (2604) is placed concentrically above a non- interacting multiloop/spiral inductor structure (2602) wherein two sets of loops/spirals are coupled by vias (2606, 2608) such that the coupled magnetic field is substantially zero.
  • FIGs. 3-5, numerals 300, 400, and 500 are schematic representations of 4-loop, 6-loop, and 8-loop planar inductors/transformers in accordance with the present invention.
  • FIG. 3 two alternate loops (302, 306) have current flowing clockwise, and the other two alternate loops (304, 308) have current flowing counterclockwise.
  • numeral 400 three alternate loops (402, 406, 410) have current flowing clockwise, and the other three alternate loops (404, 408, 412) have current flowing counterclockwise.
  • numeral 500 four alternate loops (502, 506, 510, 514) have current flowing clockwise, and the other four alternate loops (504, 508, 512, 516) have current flowing counterclockwise.
  • FIG. 6, numeral 600 is a schematic representation of the magnetic field of a 6-loop inductor/transformer in accordance with the present invention, wherein the inductor/transformer is located on a board, e.g., a printed circuit board (602).
  • a board e.g., a printed circuit board (602).
  • a magnetic field that wraps above from alternate loops (606, 610 and 614) and below the board from the other alternate loops (604, 618, and 612).
  • FIG. 7, numeral 700 is a diagrammatic representation of a side view of one embodiment of a planar inductor/transformer having a bulk ferrite above (706) and below (708) the planar conducting structure in accordance with the present invention, typically located on a printed circuit board (PCB, 710).
  • the 2-layer (702, 704) implementation of the set of loops/spirals of the present invention are located one layer above the other, with the board (710) between them.
  • the bulk ferrite (706, 708) covers the planar conducting structure (i.e., the loops/spirals) and provides an efficient magnetic path and increases the inductance of the planar inductor/transformer.
  • FIG. 8, numeral 800 is a diagrammatic representation of a side view of another embodiment of a planar inductor/transformer including a shield (806) above and below the planar structure for enhancing cancellation of the magnetic field in accordance with the present invention.
  • the set of loops/spirals (804) of the present invention are located within the board (802) between them and may, where selected, include multiple layers of loops/spirals.
  • FIG. 9, numeral 900 is a diagrammatic representation of another embodiment of a planar inductor/transformer including multiple auxiliary conducting structures (902, 904, 906, 908) adjacent to the planar structure (910) for enhancing 1.4 cancellation of the magnetic field in accordance with the present invention.
  • the multiple auxiliary structures (902, 904, 906, 908) are located symmetrically and concentrically with respect to the planar structure (910) where maximum cancellation of a moment over a 360° range is desired.
  • dissimilar structures where a structure includes size and/or shape may be used for the loops/spirals.
  • the multiple auxiliary structures may also be asymmetrical.
  • FIG. 10, numeral 1000 is a diagrammatic representation of a side view of an embodiment of a transformer including a primary winding (1004) on one surface and a secondary winding (1006) on an opposite surfaces of a printed circuit board (PCB, 1002) in accordance with the present invention.
  • FIGs. 1 1 -16 represent radiation field patterns, i.e., polar field patterns, measured in the plane of the structure.
  • FIG. 11 numeral 1100, represents a radiation field pattern for a single spiral (1102) as is known in the art.
  • FIG. 12 represents a radiation field pattern for a figure 8 shape (1202) as is known in the art.
  • FIG. 13 represents a radiation field pattern for the structure shown in FIG. 1 .
  • the overall 1.5 magnitude of the field (1302) obtained using the present invention is reduced by a factor of at least 10 in a far field when compared with the magnitude of the field (1202) obtained from the structures of the prior art.
  • the far field is completely cancelled, and the near field is nearly cancelled.
  • FIG. 14, numeral 1400, represents a radiation field pattern for the structure shown in FIG. 9.
  • the overall magnitude of the field (1402) obtained using the present invention exhibits an enhancement in near field cancellation over the field obtained in FIG. 13.
  • FIG 15, numeral 1500 represents a radiation field pattern for the structures shown in FIGs. 4 and 6.
  • the overall magnitude of the field (1502) obtained using the present invention exhibits greater cancellation in the near field than the field obtained in FIG. 13.
  • FIG 16, numeral 1600 represents a radiation field pattern for the structure shown in FIG. 18.
  • the magnitude of the radiation field (1602) obtained using the present invention has been minimized along one axis of the plane. This reduced field in a preferred direction allows the use of the present invention adjacent to sensitive circuitry.
  • FIG. 17, numeral 1700 is a schematic representation of another embodiment of a double spiral, with one spiral (Inner spiral, 1708) inside another spiral (Outer Spiral, 1706), of a planar inductor in accordance with the present invention.
  • a crossover (1704) is utilized to make one of the two terminal connections (Inductor Terminals, 1702). The moment due to the inner spiral is equal and opposite to the moment due to the outer spiral. In the far field the total moment is cancelled in all directions.
  • FIG. 18, numeral 1800 is a diagrammatic representation of a 4-loop single layer planar inductor in accordance with the present invention.
  • the 4 planar adjacent loops/spiral conductor coils (1806, 1808, 1810, 1812) carry a current produced by a signal source.
  • the planar adjacent loops/spiral conductor coils are arranged to form a rhombus to provide total cancellation of a magnetic field on the perpendicular bisectors of the sides of the rhombus, enhanced cancellation of the magnetic field along the short diagonal and reduced cancellation of the magnetic field along the long diagonal. Current flows as described for FIG. 1.
  • the planar magnetic field inductor/transformer may be further implemented as described above.
  • the inductor has two terminals (1802) and has two crossovers (1804, 1814) that connect the centers of each of the two pairs of spirals. 1.7
  • FIG. 19, numeral 1900, is a flow chart of one embodiment of steps of a method in accordance with the present invention. The method maximizes cancellation of a magnetic field over a predetermined range for the plurality of loops/spiral conductor coils arranged to form an inductor/transformer.
  • the method includes the steps of: A) placing (1902) a plurality of at least three planar adjacent similar/dissimilar structured loops/spiral conductor coils interconnected electrically, one after another in a simple/compound loop fashion; and B) injecting (1904) a current produced by a signal source, into the plurality of planar adjacent loops/spiral conductor coils are arranged to maximize cancellation of the magnetic field of the plurality of loops/spiral conductor coils over the predetermined range.
  • the inductor/transformer may be implemented as further described above.
  • the method may maximize cancellation of a total moment of the plurality of loops/spiral conductor coils arranged to form an inductor/transformer, comprising the steps of: A) placing (2002) a plurality of at least three planar adjacent same structure loops/spiral conductor coils interconnected electrically, one after another in a simple/compound loop fashion; B) injecting (2004) a current produced by a signal source, into the plurality of planar adjacent loops/spiral 1 S conductor coils are arranged to maximize cancellation of a total moment of the plurality of loops/spiral conductor coils.
  • the coupled magnetic field in the plane of the multiloop structure has been computed (FIGs. 21 -22) for a 4-loop, 6-loop and 8-loop implementation (see FIGs. 3, 4, 5).
  • the horizontal axis represents distance from the center of the multiloop structure relative to the lateral dimension of the structure.
  • the vertical axis represents a measure of the mutual inductance with a test loop.
  • the coupled magnetic field of the multiloop structure is plotted as a function of distance from the center and compared to the magnetic field for a simple circular loop which has the same inductance. The coupling depends on the direction. A best (FIG. 21 -perpendicular to a side of a polygon) and a worst (FIG. 22-along a diagonal of a polygon) case coupling are shown.
  • the coupling is reduced by 20dB for a 4-loop (2204) structure at a distance of 2 inductor lengths away, as compared to a simple loop (2202).
  • the reduction in coupling for a 6-loop (2206) structure and 8-loop (2208) structure at the same distance is 30dB and 40dB respectively.
  • the reduction in coupling is more than 60dB for a 4-loop structure at 10 inductor lengths away.
  • the 6-loop and 8-loop structure show even smaller coupling at this distance.
  • FIG. 23, numeral 2300 is a graphical representation of the inductance of a 4-loop spiral inductor implementation of the present invention and a simple circular spiral occupying the same area on a two-layer printed circuit board.
  • the coupling is reduced by at least 80dB for the 4-loop (2104), 6-loop (2106) and 8-loop (2108) structures at 2 inductor lengths away and beyond compared to coupling for a simple circular loop (2102).
  • FIG. 23, numeral 2300 is a graphical representation of the inductance of a 4-loop spiral inductor (2304) implementation of the present invention and a simple circular spiral (2302) occupying the same area on a two-layer printed circuit board.
  • FIG. 24, numeral 2400 is a graphical representation of the resistance of a 4-loop spiral inductor (2404) implementation of the present invention and a simple circular spiral (2402) occupying the same area on a two-layer printed circuit board.
  • FIG. 25, numeral 2500 is a graphical representation of the quality factor (Q) of a 4-loop spiral inductor (2504) implementation of the present invention and a simple circular spiral (2502) occupying the same area on a two-layer printed circuit board.
  • the inductance, series resistance and Q of a PCB implementation of the 4-loop planar spiral has been analyzed.
  • the inductance and Q available in a certain area on a PCB with a given resolution has been characterized.
  • the maximum inductance for a given planar area and a trace width is obtained from a simple spiral.
  • the inductance and quality factor (Q) of a 4-loop spiral is compared to a simple spiral, both made out of the same PCB process.
  • the printed circuit board inductor may have a topology that includes at least three consecutively coupled conducting loops/spirals (2702, 2704, 2706; 2802, 2804, 2806) that also form a central conducting loop/spiral (2708; 2808), wherein the conducting loop/spirals are arranged on a polygonal lattice on/in a printed circuit board and an overall 2.1 configuration of the conducting loops/spirals is scaled from the topology to provide a zero net moment of the printed circuit board inductor.
  • the shapes of each of the conducting loops/spirals may be polygonal.
  • the printed circuit board may be multi-layered, and predetermined portions of the conducting loops/spirals may be implemented on different levels (layer 1 - 2710; layer 2-2712) of the multi-layer printed circuit board and connected by vias to form the printed circuit board inductor.
  • FIG. 29, numeral 2900 is a schematic representation of positive (2902) and negative (2904) moments with respect to the embodiment of the present invention shown in FIGs. 27 and 28.
  • a non-interacting concentric inductor may be arranged in extreme proximity above/below the printed circuit board inductor.
  • the printed circuit board inductor has a polygonal shape, and the size and orientation of the printed circuit board inductor is determined by magneto-static analysis.
  • predetermined portions of the non-interacting concentric inductor may be implemented on different levels of the multi- layered printed circuit board, The portions of the non- interacting concentric inductor are typically connected by vias to form the complete non-interacting concentric inductor.
  • spiral indicates a winding conducting structure (e.g., a wire, a trace) in a clockwise or counterclockwise direction.
  • a “spiral” thus includes rectangular, polygonal, oval, elliptical, circular as well as other irregular generally spirally shapes.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

La présente invention se rapporte à un transformateur/inducteur à champ magnétique plan (100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 1700, 1800) ainsi qu'au procédé (1900, 2000) correspondant. Ledit transformateur/inducteur possède un ensemble d'au moins trois bobines conductrices planes (106, 108, 110, 112), spiralées ou en boucles, qui sont disposées l'une après l'autre suivant une configuration en boucle simple ou composée. Lesdites boucles (106, 108, 110, 112) assurent le passage d'un courant produit par une source de signaux et l'ensemble des bobines conductrices adjacentes planes (106, 108, 110, 112), spiralées ou en boucles, est conçu pour maximiser l'annulation d'un moment magnétique qu'il génère sur un domaine préétabli.
PCT/US1997/011900 1996-07-29 1997-07-10 Transformateur/inducteur plan a faible rayonnement et procede correspondant WO1998005048A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU35978/97A AU3597897A (en) 1996-07-29 1997-07-10 Low radiation planar inductor/transformer and method

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US68168996A 1996-07-29 1996-07-29
US08/681,689 1996-07-29

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Cited By (17)

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WO2001063964A2 (fr) * 2000-02-25 2001-08-30 Benefon Oyj Circuit ferme a induction
WO2004012213A1 (fr) * 2002-07-25 2004-02-05 Philips Intellectual Property & Standards Gmbh Inductance plane
WO2005096328A1 (fr) * 2004-03-03 2005-10-13 Telefonaktiebolaget L M Ericsson (Publ) Procede et configuration de bobines d'induction pour reduction du couplage entre vco
WO2006105184A1 (fr) * 2005-03-30 2006-10-05 Silicon Laboratories Inc. Inducteurs differentiels au plan magnetique et procedes associes
EP1942574A1 (fr) * 2005-10-28 2008-07-09 Hitachi Metals, Ltd. Convertisseur cc/cc
US7432794B2 (en) 2004-08-16 2008-10-07 Telefonaktiebolaget L M Ericsson (Publ) Variable integrated inductor
EP2273613A1 (fr) 2009-07-07 2011-01-12 Nxp B.V. Disposition de bouclier magnétique, dispositif semi-conducteur et application
US7955886B2 (en) 2005-03-30 2011-06-07 Silicon Laboratories Inc. Apparatus and method for reducing interference
EP2421011A1 (fr) 2010-08-19 2012-02-22 Nxp B.V. Inducteur symétrique
US8305182B1 (en) * 2011-05-23 2012-11-06 Siliconware Precision Industries Co., Ltd. Symmetric differential inductor structure
GB2497310A (en) * 2011-12-06 2013-06-12 Cambridge Silicon Radio Ltd Inductor structure
US8810071B2 (en) 2008-04-03 2014-08-19 Koninklijke Philips N.V. Wireless power transmission system
GB2522090A (en) * 2014-01-10 2015-07-15 Cambridge Silicon Radio Ltd Integrated circuit chip inductor configuration
US9196409B2 (en) 2010-12-06 2015-11-24 Nxp, B. V. Integrated circuit inductors
TWI622066B (zh) * 2017-04-26 2018-04-21 國立成功大學 用於降低電磁互相干擾之電感器
EP3596835A4 (fr) * 2017-03-17 2020-10-14 Efficient Power Conversion Corporation Bobine d'alimentation sans fil extensible à résonance élevée de grande surface
US12002618B2 (en) 2017-12-27 2024-06-04 Huawei Technologies Co., Ltd. Transformer

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JPH0382106A (ja) * 1989-08-25 1991-04-08 Fujitsu Ltd 平面コイル
US5572179A (en) * 1992-05-27 1996-11-05 Fuji Electric Co., Ltd. Thin film transformer
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US4959631A (en) * 1987-09-29 1990-09-25 Kabushiki Kaisha Toshiba Planar inductor
JPH0382106A (ja) * 1989-08-25 1991-04-08 Fujitsu Ltd 平面コイル
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US5572179A (en) * 1992-05-27 1996-11-05 Fuji Electric Co., Ltd. Thin film transformer

Cited By (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001063964A3 (fr) * 2000-02-25 2002-01-10 Benefon Oyj Circuit ferme a induction
WO2001063964A2 (fr) * 2000-02-25 2001-08-30 Benefon Oyj Circuit ferme a induction
WO2004012213A1 (fr) * 2002-07-25 2004-02-05 Philips Intellectual Property & Standards Gmbh Inductance plane
EP2819131A1 (fr) * 2004-03-03 2014-12-31 Telefonaktiebolaget L M Ericsson (PUBL) Procédé et configuration de bobines d'induction pour réduction du couplage entre VCO
WO2005096328A1 (fr) * 2004-03-03 2005-10-13 Telefonaktiebolaget L M Ericsson (Publ) Procede et configuration de bobines d'induction pour reduction du couplage entre vco
US7151430B2 (en) 2004-03-03 2006-12-19 Telefonaktiebolaget Lm Ericsson (Publ) Method of and inductor layout for reduced VCO coupling
JP2007526642A (ja) * 2004-03-03 2007-09-13 テレフオンアクチーボラゲット エル エム エリクソン（パブル） Ｖｃｏ結合を低減する方法およびインダクタのレイアウト
US7432794B2 (en) 2004-08-16 2008-10-07 Telefonaktiebolaget L M Ericsson (Publ) Variable integrated inductor
US7955886B2 (en) 2005-03-30 2011-06-07 Silicon Laboratories Inc. Apparatus and method for reducing interference
WO2006105184A1 (fr) * 2005-03-30 2006-10-05 Silicon Laboratories Inc. Inducteurs differentiels au plan magnetique et procedes associes
EP1942574A1 (fr) * 2005-10-28 2008-07-09 Hitachi Metals, Ltd. Convertisseur cc/cc
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