WO1996024953B1 - TRENCH FIELD EFFECT TRANSISTOR WITH REDUCED PUNCH-THROUGH SUSCEPTIBILITY AND LOW R¿DSon? - Google Patents
TRENCH FIELD EFFECT TRANSISTOR WITH REDUCED PUNCH-THROUGH SUSCEPTIBILITY AND LOW R¿DSon?Info
- Publication number
- WO1996024953B1 WO1996024953B1 PCT/US1996/000941 US9600941W WO9624953B1 WO 1996024953 B1 WO1996024953 B1 WO 1996024953B1 US 9600941 W US9600941 W US 9600941W WO 9624953 B1 WO9624953 B1 WO 9624953B1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- region
- layer
- trench
- transistor
- conductivity type
- Prior art date
Links
- 230000005669 field effect Effects 0.000 title claims abstract 8
- 210000000746 body regions Anatomy 0.000 claims abstract 16
- 239000002019 doping agent Substances 0.000 claims abstract 7
- 238000009825 accumulation Methods 0.000 claims abstract 6
- 239000000758 substrate Substances 0.000 claims 9
- 239000004065 semiconductor Substances 0.000 claims 2
- 230000000875 corresponding Effects 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 3
- 229910052710 silicon Inorganic materials 0.000 abstract 2
- 239000010703 silicon Substances 0.000 abstract 2
- 238000009877 rendering Methods 0.000 abstract 1
Abstract
To reduce susceptibility to punchthrough, the channel region of the P body region (104) of a trench field effect transistor is formed in a layer of lightly doped epitaxial silicon (101). As a result, the channel region has less counterdoping from the background epitaxial silicon and has a greater net P type dopant concentration. Due to the higher net dopant concentration of the P body region, the depletion regions on either side of the P body region expand less far inward through the P body region at a given voltage, thereby rendering the transistor less susceptible to source-to-drain punchthrough. To maintain a low RDSon, the relatively high conductivity of an accumulation region formed along a sidewall of the trench of the transistor when the transistor is on is used to form a conductive path from the channel region to an underlying relatively highly conductive layer (103, 102) upon which the lightly doped epitaxial layer is formed.
Claims
1. A field effect transistor comprising: a substrate of a first conductivity type being a drain region; a lower layer of the first conductivity type formed on the substrate and having a doping level less than that of the substrate; an upper layer of the first conductivity type formed entirely overlying the lower layer and having a doping level less than that of the lower layer; a trench defined in the upper layer and lower layer and extending to within a predetermined distance of the drain region, the trench being at least partially filled with a conductive gate electrode; a source region of the first conductivity type formed in the upper layer and extending to a principal surface of the upper layer and lying adjacent to sidewalls of the trench; and a body region of a second conductivity type extending from the principal surface of the upper layer down to and into at least an upper portion of the lower layer and being spaced apart from a lower portion of the trench, wherein two spaced apart portions of the body region lying respectively on two sides of the trench define a lateral extent of the upper layer, whereby an accumulation region extends from the body region to the lower layer when the transistor is in an on state.
2. The transistor of Claim 1, wherein the upper layer has a dopant concentration of N type dopants at least on an order of magnitude lower than a dopant concentration of P type dopants in the body region.
3. The transistor of Claim 1, wherein the body region has a net peak dopant concentration in the range of 3X1016 to 9X1016/cm3.
4. The transistor of Claim 1, wherein the upper and lower layers are each an epitaxial layer.
5. The transistor of Claim 1, wherein no portion of the lower layer is laterally adjacent any portion of the upper layer.
6. A field effect transistor comprising: a substrate of a first conductivity type being a drain region; a layer of the first conductivity type formed on the substrate and having a doping level less than that of the substrate; a trench defined in the first layer and in the substrate, the trench being at least partially filled with a conductive gate electrode; a source region of the first conductivity type formed in the first layer and extending to a principal surface of the first layer and lying adjacent to sidewalls of the trench; and a body region of a second conductivity type extending from the principal surface of the first layer into at least an upper portion of the first layer and being spaced apart from a lower portion of the trench, wherein two portions of the body region lying respectively on two sides of the trench define a lateral extent of the first layer, whereby an accumulation region extends from the substrate to the body region when the transistor is in an on state.
7 . A method, comprising :
1 6 forming a lightly doped epitaxial layer on a relatively highly conductive layer, said epitaxial layer being more lightly doped than said relatively highly conductive layer; forming a body region of a trench power field effect transistor such that a channel region of said trench field effect transistor is disposed in said epitaxial layer; and using an accumulation region formed when said trench field effect transistor is in an on state to conduct current between said channel region and said relatively highly conductive layer, said accumulation region extending from said channel region to said relatively highly conductive layer.
8. The method of Claim 7, wherein said relatively highly conductive layer is a substrate layer.
9. The method of Claim 7, wherein said relatively highly conductive layer is a second epitaxial layer directly underlying said lightly doped epitaxial layer, said second epitaxial layer being more heavily doped than said lightly doped epitaxial layer.
10. A transistor structure, comprising: a first region of a first semiconductor type; a second region of said first semiconductor type disposed on said first region, said first region being more heavily doped than said second region; a body region contacting said second region; a source region contacting said body region, said source region having an upper surface; a trench extending from said upper surface of said source region and extending into said first region, a sidewall of said trench forming a boundary of said source region, a boundary of said body region, and a
1 7 boundary of said second region; and a gate disposed at least partly in said trench.
11. A transistor structure, comprising: a lightly doped epitaxial region of a first conductivity type disposed between a channel region of a trench field effect transistor and an underlying epitaxial layer of said first conductivity type, said underlying epitaxial layer being more heavily doped than said lightly doped epitaxial region, said lightly doped epitaxial region forming an accumulation region along a sidewall of said trench from said channel region to said underlying epitaxial layer.
18 STATEMENT UNDER ARTICLE 19
This Statement is made under Article 19(1) explaining the current amendments to the claims.
The amendments to the claims are to improve the clarity and form of the claims.
Furthermore, Applicant points out that the claims of this application correspond to the claims of the corresponding U.S. application, serial no. 08/386,895 and the U.S. claims were allowed over references similar
and/or identical to those cited by the Authorized Officer in the International Search Report.
Therefore, it is believed that these present claims do patentably distinguish over the references cited in the International Search Report.
19
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU49650/96A AU4965096A (en) | 1995-02-10 | 1996-02-07 | Trench field effect transistor with reduced punch-through susceptibility and low rdson |
JP08524276A JP3108439B2 (en) | 1995-02-10 | 1996-02-07 | Trench field-effect transistor with reduced punch-through and low RDSon |
EP96906189A EP0808513A4 (en) | 1995-02-10 | 1996-02-07 | TRENCH FIELD EFFECT TRANSISTOR WITH REDUCED PUNCH-THROUGH SUSCEPTIBILITY AND LOW R DSon? |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/386,895 | 1995-02-10 | ||
US08/386,895 US5558313A (en) | 1992-07-24 | 1995-02-10 | Trench field effect transistor with reduced punch-through susceptibility and low RDSon |
Publications (2)
Publication Number | Publication Date |
---|---|
WO1996024953A1 WO1996024953A1 (en) | 1996-08-15 |
WO1996024953B1 true WO1996024953B1 (en) | 1996-10-03 |
Family
ID=23527518
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1996/000941 WO1996024953A1 (en) | 1995-02-10 | 1996-02-07 | TRENCH FIELD EFFECT TRANSISTOR WITH REDUCED PUNCH-THROUGH SUSCEPTIBILITY AND LOW R¿DSon? |
Country Status (6)
Country | Link |
---|---|
US (2) | US5558313A (en) |
EP (1) | EP0808513A4 (en) |
JP (1) | JP3108439B2 (en) |
AU (1) | AU4965096A (en) |
CA (1) | CA2212765A1 (en) |
WO (1) | WO1996024953A1 (en) |
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-
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- 1996-02-07 WO PCT/US1996/000941 patent/WO1996024953A1/en not_active Application Discontinuation
- 1996-02-07 AU AU49650/96A patent/AU4965096A/en not_active Abandoned
- 1996-02-07 CA CA002212765A patent/CA2212765A1/en not_active Abandoned
- 1996-02-07 JP JP08524276A patent/JP3108439B2/en not_active Expired - Lifetime
- 1996-06-04 US US08/658,115 patent/US5981344A/en not_active Expired - Lifetime
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