Classifications

• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of dc power input into dc power output
  • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
  • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
  • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
  • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
  • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
  • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
  • H02M3/33592—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
  • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
  • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

• the invention relates to a forward converter of continuous mode, comprising: a transformer which is provided with a primary and a secondary winding, and through which power is transferred from a primary circuit of the converter to a secondary circuit thereof, a control circuit for controlling the output voltage of the converter by means of a first control signal generated by it, using pulse width modulation, a first switching means provided in the primary circuit for cutting off the current passing through the primary winding of the transformer in response to the first control signal, an element positioned in the secondary circuit for storing energy, a second switching means provided in the secondary circuit and synchronized with the first switching means in such a manner that said switches are substantially simultaneously in a conduct ⁇ ing and, correspondingly, in a non-conducting state, a third.switching means provided in the secondary circuit and synchronized with the first switching means in such a manner that said switches are substantially alternate ⁇ ly in a conducting and, correspondingly, in a non ⁇ conducting state, and converter means for controlling the second and the third switching means responsive to the first control signal
• the invention relates particularly to a converter intended for providing low output voltages of below 5V and comprising synchronous rectification.
• Converters wherein synchronous rectification is used can be divided roughly into two main groups: control-driven and self-driven.
• the present invention relates to the first main group, i.e. control-driven forward converters.
• a prior art forward converter of continuous mode is controlled by one transistor switch in the primary circuit and two transistor switches in the secondary circuit.
• the circuitry in question comprises a control circuit for controlling the output voltage of the converter.
• the control circuit maintains the output voltage at a desired level by utilizing pulse width modulation (PWM), i.e. by adjusting the ratio between the lengths of ON and OFF periods of the transistor switches in the converter.
• PWM pulse width modulation
• the above-mentioned known converter is provided with a control unit for controlling the switching transistors of the secondary circuit.
• the control unit controls the transistors of the secondary circuit independently of the switching transistors of the primary circuit.
• the power needed for controlling the transistors is derived from a separate power source provided in the secondary circuit.
• the object of the present invention is to solve the above-mentioned problem and to provide a forward converter of continuous mode which is simpler and more economical than the known solutions.
• the invention is based on the idea that the control of the converter according to the invention can be implemented in a considerably less complicated and expensive manner than in the known solutions when the control pulses of the switches in the secondary circuit of the converter are derived from the edges of a PWM control signal in the control circuit of the converter, and, in addition, when the power needed for controlling the switches is transferred by said control pulses.
• the control pulses of the switches in the secondary circuit of the converter are derived from the edges of a PWM control signal in the control circuit of the converter, and, in addition, when the power needed for controlling the switches is transferred by said control pulses.
• the control pulses of the switching means are, moreover, used as memories, the control pulses can be very narrow, which enhances the efficiency of the converter.
• Figure 1 illustrates a forward converter according to the invention
• Figures 2A to 2F illustrate voltages occurring in the converter shown in Figure 1.
• Figure 1 illustrates the connection of the forward converter according to the invention in a general manner.
• the PWM control circuit is positioned on the side of the primary voltages.
• the converter shown in Figure 1 is used in continuous mode, which means that the energy stored in winding L is not discharged completely during the OFF state of switch SI.
• the converter comprises, in a manner known per se, a main transformer 1, through which power is transferred from the primary circuit to the secondary circuit.
• the primary circuit comprises a switch SI, which may be, for example, a power MOSFET or a bipolar transistor.
• the switch SI whose drain electrode is connected to one pole of the primary winding of the transformer 1, and whose source electrode is connected to the minus pole of the input voltage Uin, is used to cut off the primary current passing through the primary winding.
• the input voltage of the converter shown in Figure 1 may vary depending on the application. In tele ⁇ communication equipment, for example, it is preferably from about +40V to about +70V.
• the output voltage of the converter illustrated in Figure 1 is controlled by a control circuit IC, which by controlling the operating cycle of transistors SI, S2 and S3 generates a desired output voltage, which in the case of Figure 1 is +3.3V, for the converter.
• the output voltage is controlled by means of pulse width modulation (PWM), i.e. by adjusting the ratio between the lengths of ON and OFF periods.
• PWM pulse width modulation
• the control circuit IC comprises, in addition to other components, an oscillator (not shown).
• the control circuit IC controls the output voltage on the basis of voltage information and primary current information obtained from the output of the converter.
• the output voltage information is given by a differentiating amplifier 6 provided with galvanic isolation.
• the differentiating amplifier 6 feeds the output voltage information to the input Vfb of the control circuit.
• Information on the primary current is taken from the primary circuit by means of a current measuring transformer 5, and fed to a current measuring input Is of the control circuit.
• the operating voltage Vc of the control circuit IC is taken from the input of the converter.
• An input capacitor Cin is provided in a manner known per se in association with the input of the converter.
• the converter illustrated in Figure 1 comprises a transformer 1, through which power is transferred from the primary circuit to the secondary circuit of the converter.
• the secondary circuit comprises a winding, i.e. an output choke L, in which energy is alternately stored during the use of the converter, and from which the stored energy is discharged.
• the secondary circuit comprises a second S2 and a third S3 switching means, and an output capacitor Cout.
• the switches S2 and S3 in the secondary circuit are FET transistors. When the converter shown in Figure 1 operates, switch SI and switch S2 are simultaneously conducting, whereas switch S3 is non-conducting.
• the power transferred through the transformer 1 from the primary circuit to the secondary circuit is divided in such a way that part of it charges winding L, while part of it is transferred to the load connected to the output of the converter.
• switches SI and S2 become non ⁇ conducting, and switch S3 becomes conducting, the energy stored in winding L is discharged through switch S3 to the load connected to the output of the converter. Since winding L is dimensioned to continuously supply current, it supplies current to the load until the first control pulse changes its state from logic 0-level to logic 1- level.
• the control of switches S2 and S3 is therefore based on the first control signal obtained from the PWM output of the control circuit IC; by means of this control signal, the control circuit controls the transistor switch SI, which cuts off the primary circuit.
• the first control signal supplied from the PWM output is supplied to the control output of switch SI, and also to a converter means 2.
• the converter means 2 generates narrow control pulses based on the first control signal to FET transistors S2 and S3 via blocks 3 and 4.
• the converter means 2 supplies a positive voltage to the input of block 3, and a negative voltage to the input of block 4.
• the converter 2 supplies a negative voltage to the input of block 3, and a positive voltage to the input of block 4.
• the converter block 2 is provided with the graphic symbol of a transformer to illustrate that blocks 3 and 4 are galvanically isolated from the control circuit by means of the converter means 2, and that the polarity of the secondary winding belonging to blocks 3 and 4 is different.
• the same pulse that is supplied to block 3 is thus also supplied to block 4, but in an inverted form.
• Blocks 3 and 4 are completely identical.
• Blocks 3 and 4 can be preferably implemented by means of logic comprising, in addition to other components, a FET transistor and a diode, as shown in Figure 1.
• a positive ON pulse supplied to block 3 for example, the gate charge of the FET transistor S4 is discharged, whereby transistor S4 becomes non-conducting.
• a positive charge is formed at the gate of FET transistor S2; the charge is stored in the memory, as there is no discharge path.
• FET transistor S2 thus remains conducting even when the control pulse supplied by the converter means 2 returns to the 0-level, i.e. the charge is stored in the memory.
• the control pulse is inverted so as to be positive by means of logic located in block 3.
• FET transistor S4 is thus rendered conducting, whereby it discharges the gate charge of FET transistor S2, and transistor S2 becomes non-conducting.
• the original control signal of the control circuit IC is thus produced at the gate of transistor S2, and said first control signal is formed in an inverted form at the gate of transistor S3.
• the term 'inverted' refers herein to replacing the logic 1-level by the logic O-level and vice versa.
• the structure of blocks 3 and 4 is, however, preferably such that the control pulses by which the FET transistors are rendered conducting are slightly delayed, whereas the discharge takes place without any delays.
• Such a structure ensures that transistors S2 and S3 cannot be simultaneously conducting, not even instantaneously.
• the FET transistors functioning as synchron ⁇ ous rectifiers in the secondary circuit of the converter are controlled by narrow control pulses derived from the edges of a PWM control pulse, and as the power needed to control the FET transistors is also transferred by the control pulses, it is not necessary to have a separate power source for controlling the FET transistors functioning as synchronous rectifiers.
• Figures 2A to 2F illustrate voltages occurring in the converter shown in Figure 1.
• Figure 2A illustrates a PWM control pulse, i.e. the first control signal, generated by the control circuit IC.
• Figure 2B illustrates a narrow control pulse generated by the converter means 2 responsive to the PWM control pulse, and supplied by the converter means 2 to block 3.
• Figure 2C illustrates a narrow control pulse generated by the converter means 2 responsive to the PWM control pulse, and supplied by the converter means 2 to block 4. From Figures 2B and 2C it can be seen that the converter means 2 supplies to block 4 the same pulse as to block 3, but in an inverted form.
• Figure 2D illustrates a control pulse supplied to transistor SI, which cuts off the primary circuit of the converter; the control pulse corresponds to the PWM pulse.
• Figure 2E illustrates a pulse supplied by block 3 to the gate of FET transistor S2; the control pulse corresponds to the PWM pulse.
• Figure 2F illustrates a pulse supplied by block 4 to the gate of FET transistor S3; the pulse corresponds to the inverted PWM control pulse.

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• Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Dc-Dc Converters (AREA)

Priority Applications (4)

Applications Claiming Priority (2)

Publications (1)

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Citations (2)

• 1994
  • 1994-02-25 FI FI940925A patent/FI940925A/fi unknown
• 1995
  • 1995-02-22 DE DE19581532T patent/DE19581532T1/de not_active Withdrawn
  • 1995-02-22 WO PCT/FI1995/000093 patent/WO1995023451A1/en active Application Filing
  • 1995-02-22 AU AU17103/95A patent/AU1710395A/en not_active Abandoned
  • 1995-02-22 GB GB9617646A patent/GB2301494B/en not_active Expired - Fee Related
• 1996
  • 1996-08-20 SE SE9603018A patent/SE511081C2/sv not_active IP Right Cessation

Patent Citations (2)

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