WO1993006652A1 - Minimisation de pertes des circuits d'attaque de la gachette de desamorçage lorsque la diode antiparallele conduit le courant - Google Patents

Minimisation de pertes des circuits d'attaque de la gachette de desamorçage lorsque la diode antiparallele conduit le courant Download PDF

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Publication number
WO1993006652A1
WO1993006652A1 PCT/US1992/006218 US9206218W WO9306652A1 WO 1993006652 A1 WO1993006652 A1 WO 1993006652A1 US 9206218 W US9206218 W US 9206218W WO 9306652 A1 WO9306652 A1 WO 9306652A1
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WO
WIPO (PCT)
Prior art keywords
current
gto
phase
power
gating
Prior art date
Application number
PCT/US1992/006218
Other languages
English (en)
Inventor
Ajith Kuttannair Kumar
Thomas Detlor Stitt
Original Assignee
General Electric Company
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Company filed Critical General Electric Company
Priority to BR9205391A priority Critical patent/BR9205391A/pt
Priority to JP5506011A priority patent/JPH06505621A/ja
Publication of WO1993006652A1 publication Critical patent/WO1993006652A1/fr

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/505—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
    • H02M7/515—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
    • H02M7/521—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only in a bridge configuration
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters

Definitions

  • This invention relates to inverter systems and, more particularly, to inverter systems using gate turn-off (GTO) devices for controlling power to a reactive load and to a method and apparatus for reducing power consumption in such GTO devices and associated gate driver circuits when reactive current prevents current transfer into the GTO device.
  • GTO gate turn-off
  • inverters Power conversion systems for converting direct current (DC) power to alternating current (AC) power, commonly referred to as inverters, are well known in the art.
  • these inverters comprise a pair of switching devices, such as GTO devices, serially connected between relatively positive and relatively negative power busses.
  • a junction intermediate the GTO devices is connected to a load, such as an AC motor.
  • a load such as an AC motor.
  • three such inverters are utilized, each coupled to a respective one of the motor phases.
  • In each inverter phase only one GTO device conducts current at any time, one of the devices being connected to conduct current in a first direction through the load and the other of the devices being connected to conduct current in a second direction through the load.
  • gating of the associated GTO device is ineffective to reverse the direction of current in the connected reactive load. More specifically, when current is flowing through the diode, the parallel connected GTO is reverse biased. If gate current is applied to the GTO device during this time period, the only effect is to draw a relatively large current from the GTO gate driver circuit. Since the gate current when the GTO device is being gated is much higher than when it is not being gated and the power dissipation even without anode current is relatively large, it is desirable to avoid gating of the GTO device when the device is reverse biased, i.e., when the parallel connected diode is carrying current.
  • a power control system for an AC electric, multi-phase motor including an inverter circuit coupled to the motor for supplying regulated AC power to control the power output and/or speed of the motor.
  • the system includes an inverter having a plurality of stages each coupled to a respective one of the phase windings of the motor.
  • Each inverter stage includes a pair of series connected semiconductor switching devices serially coupled between relatively positive and relatively negative DC power busses.
  • a unidirectional device, such as a diode, is coupled in anti-parallel circuit arrangement with each switching device.
  • Means are provided for determining current flow in each phase winding of the motor.
  • a microcomputer control supplies gating signals through a gate driver circuit to each of the switching devices to effect their conduction at preselected times in order to regulate operation of the motor.
  • the control includes means responsive to the current in the motor windings for inhibiting gating of the switching devices when current in an associated anti-parallel diode exceeds a threshold value that prevents the switching device to effect a current reversal in the respective motor phase winding.
  • the switching devices are preferably GTO thyristors and current in at least one phase of the motor is computed from monitored current in the other phases.
  • FIG. 1 is a partial schematic, partial block diagram of a power conversion circuit implementing the present invention.
  • FIG. 2 is a functional block diagram of the method of the present invention.
  • FIG. 1 is a simplified partial schematic, partial block diagram of a power conversion system incorporating the teachings of the present invention.
  • the power conversion system is illustrated as a three phase inverter comprising inverter sections 10A, 10B, and IOC connected for controlling power to a three phase induction motor M.
  • the inverter sections are coupled between relatively positive and relatively negative voltage rails 12 and 14, respectively.
  • the rails 12 and 14 are connected to a power source 16 which may comprise a battery or other power generating means.
  • a filter comprising series inductor 18 and shunt capacitor 20 isolates the battery 16 from the transients generated by the inverter circuit.
  • Each of the inverter sections 10A, 10B, and 10C are substantially identical.
  • Each section includes a pair of controllable switching devices 22 and 24 coupled in series between rails 12 and 14.
  • Each of the switching devices 22, 24 has coupled in parallel with it a snubber circuit 26, 28, respectively, to limit the rate of change of current when turning on and to limit the rate of change of voltage when turning off.
  • Various types of snubber circuits are well known in the art and no additional description is deemed necessary. Discussions of snubber circuits are set forth in a paper by A. Ferraro, "An Overview of Low Loss Snubber Technology for Transistor Converters", published in the Conference Record IEEE Power Electronics Specialists Conference, 1982, pp. 466-477.
  • the controllable switching devices 22, 24 may be thyristors, transistors, or other semiconductor devices but in a preferred form comprise gate turn-off (GTO) devices or GTO thyristors.
  • GTO thyristor is a multi-layer semiconductor designed to freely conduct "forward" anode current, i.e., current flowing into its anode and out of its cathode, when its gate electrode is triggered by a suitable turn-on or firing signal.
  • a GTO thyristor is distinguished from a conventional thyristor by its ability to interrupt or block forward anode current if a voltage of relatively negative polarity and appropriate magnitude and duration is applied across its gate-cathode junction.
  • Such voltage is negative in the sense that the electrical potential of the gate is negative with respect to the cathode. It causes current to flow in a reverse direction in the thyristor 1 s gate. In other words, to turn off a GTO thyristor, current is drained from the gate.
  • such current is referred to as either “negative gate current” or the "turn-off signal*.
  • the anode current-blocking or turn-off process of a GTO thyristor can be initiated at any time without waiting for a natural or externally forced zero crossing of the anode current.
  • the negative gate current rapidly rises to a high peak that depends on the magnitude of anode current to be interrupted and then subsides as the thyristor recovers its ability to withstand off-state anode voltage.
  • the resistance of the gate-cathode junction is very high and limits negative gate current to a trivial magnitude.
  • the GTO devices 22, 24 are alternately conductive so as to provide bi ⁇ directional current to each phase of the induction motor M.
  • inverter section 10A having corresponding GTO devices 22A and 24A
  • current I is directed into motor M in the direction of arrow 30.
  • GTO device 22A is gated out of conduction. Since the motor M is an inductive reactive load, current I 1 cannot immediately cease without creating an infinite voltage rise. Accordingly, current I 1 transfers from the GTO device 22A to unidirectional conducting device 32A.
  • the device 32A preferably a power diode, is connected in a parallel circuit path with GTO device 24A but poled reversely with respect to device 24A.
  • a companion unidirectional device 34A is connected in parallel with GTO device 22 in the same manner as device 32A.
  • GTO devices can be gated into and out of conduction, they require gate drive current of two polarities.
  • the bias current to hold the device in conduction may be from three to six amps for a typical induction motor load whereas the gate leakage current when the device is off may be only a few microamps. Consequently, the power dissipated in the GTO device when initially gated between on and off states and when in the on state is significantly higher than when the GTO device is in an off state.
  • the gate driver circuit 38 which is connected to provide the bipolar gate drive current to each of the GTO devices 22, 24, experiences similar high power dissipation each time that the circuit 38 switches polarity at one of its outputs or when it is supplying "on" gate drive current.
  • a gate drive circuit suitable for use as gate drive circuit 38 may take various forms and one exemplary form is shown in U.S. Patent No. 4,593,204 issued June 3, 1986 to McMurray, assigned to the assignee of the present invention.
  • the present invention is intended to minimize the power dissipation in the gate driver circuit 38 and in the GTO devices 22, 24 by inhibiting generation of gate drive current to respective ones of the GTO devices 22, 24 when a corresponding parallel connected diode device 32, 34 is conducting current above a predetermined level.
  • the drive current to at least two of the three phases of motor M is monitored by current sensors 40 and 42.
  • the third phase could also be monitored, the sum of I 1f I 2 , and I 3 must equal zero allowing current in the third phase to be determined from current in the other phases.
  • current I 1 and I 3 are monitored by sensors 40 and 42, respectively, and current I 2 is calculated within control processor 44.
  • Processor 44 may take the form of a microcomputer programmed to control gating of GTO devices 22, 24 in a manner to regulate power output of motor M or to maintain a preselected speed profile of motor M.
  • the processor 44 may include various logic circuits and include analog-to-digital (A/D) converter 46 for translating the analog current signals from sensors 40, 42 to corresponding digital values, Control processors suitable for use as processor 44 are well known in the art.
  • the inhibit function described herein may be implemented by logically combining the current signals from sensors 40, 42 with the gating commands to the GTO devices 22, 24.
  • the signal from sensor 40 can be logically ANDED with the signal from processor 44 to inhibit the actuation of gate driver circuit 38 until current I, is less than a preselected threshold value.
  • the current signal I x i.e., I,, l 2 , or I, is tested to determine if it exceeds the threshold value I ⁇ .
  • I ⁇ may be zero or some predetermined non-zero value at which gating of a corresponding GTO device will be effective to reverse current flow in a respective one of the motor phases. If the I x signal is representative of phase current less than the threshold value, no inhibiting of gating of the GTO devices is necessary and the program function loops back to the start location.
  • Block 52 determines, from the gating signals issued to gate driver circuit 38, if GTO device 22 is conducting. If device 22 is conducting, inhibiting is unnecessary and the program loops to start. If device 22 is not conducting, the program checks for gating commands to GTO 24, block 54, and inhibits such commands, block 56.
  • gating of GTO device 24 is inhibited if current in parallel connected diode 32 is above a preselected threshold value I ⁇ since such gating is ineffective with the device 24 reversed biased except to increase power dissipation in device 24 and gate driver circuit 38.
  • the system verifies the operation of GTO device 24, block 58, testing for gating signals to GTO device 22, block 60, and inhibiting such gating signals, block 62, if the system attempts to gate GTO device 22 while current through diode 34 has device 22 reverse biased.
  • the functional block diagram of FIG. 2 is descriptive of system operation whether the implementation is in a microcomputer or a hardwired logic circuit.
  • the arrangement assures that an "on" gate drive current is only supplied when needed and not when the associated GTO device is reverse biased by a forward biased anti-parallel diode. Further, additional losses occurring due to redundant switching are avoided, including the aforemen'tioned losses associated with switching the GTO device to an "off" state even if the device does not experience an anode- cathode current.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

Système de conversion de puissance destiné à fournir du courant alternatif à un moteur électrique à courant alternatif et à phases multiples qui comprend un onduleur comportant une pluralité de dispositifs de commutation commandables indépendamment afin de coupler sélectivement chaque phase du moteur à une source de puissance électrique unipolaire. Un processeur de commande déclenche sélectivement les dispositifs de commutation commandables afin de commander la puissance envoyée au moteur. Chacun des dispositifs de commuation est dérivé par une diode respective d'une pluralité de diodes à couplage antiparallèle. Le processeur de commande combiné à des capteurs de courant détermine l'amplitude et la direction du courant lors de chaque phase du moteur. Ledit processeur de commande inhibe le déclenchement des dispositifs de commutation commandables lorsque le courant dans l'une des diodes associées dépasse une amplitude présélectionnée si bien que les dispositifs de commutation ne sont pas déclenchés pendant la période lors de laquelle la polarisation des dispositifs est inversée. Ce système permet ainsi de réduire la consommation de puissance et la dissipation de chaleur dans les dispositifs et dans le circuit de commande de perte associé.
PCT/US1992/006218 1991-09-13 1992-07-24 Minimisation de pertes des circuits d'attaque de la gachette de desamorçage lorsque la diode antiparallele conduit le courant WO1993006652A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
BR9205391A BR9205391A (pt) 1991-09-13 1992-07-24 Minimizaçáo de perdas em excitadores de terminal porta de comutadores de porta (GTO) quando da conduçáo anti-paralela de um diodo
JP5506011A JPH06505621A (ja) 1991-09-13 1992-07-24 逆並列ダイオードが導電するときのｇｔｏゲート駆動器の損失の最小化

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US75924591A 1991-09-13 1991-09-13
US759,245 1991-09-13

Publications (1)

Publication Number Publication Date
WO1993006652A1 true WO1993006652A1 (fr) 1993-04-01

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PCT/US1992/006218 WO1993006652A1 (fr) 1991-09-13 1992-07-24 Minimisation de pertes des circuits d'attaque de la gachette de desamorçage lorsque la diode antiparallele conduit le courant

Country Status (6)

Country Link
EP (1) EP0557475A1 (fr)
JP (1) JPH06505621A (fr)
AU (1) AU3849493A (fr)
BR (1) BR9205391A (fr)
CA (1) CA2096243A1 (fr)
WO (1) WO1993006652A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8499277B2 (en) 2006-03-29 2013-07-30 Mitsubishi Electric Corporation Programming support apparatus, programming support method, program for causing computer to implement the method, and recording medium containing the program

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1074187C (zh) * 1998-07-02 2001-10-31 北京中利兴机电电子技术有限公司 无触点智能开关装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
JOSHI R. P., BOSE B. K.: "BASE/GATE DRIVE SUPPRESSION OF INACTIVE POWER DEVICES OF A VOLTAGE-FED INVERTER AND PRECISION SYNTHESIS OF AC VOLTAGE AND DC LINK CURRENT WAVES.", SIGNAL PROCESSING AND SYSTEM CONTROL, FACTORY AUTOMATION. PACIFIC GROVE, NOV. 27 - 30, 1990., NEW YORK, IEEE., US, vol. 02., 27 November 1990 (1990-11-27), US, pages 1034 - 1040., XP000216845, ISBN: 978-0-87942-600-2, DOI: 10.1109/IECON.1990.149280 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8499277B2 (en) 2006-03-29 2013-07-30 Mitsubishi Electric Corporation Programming support apparatus, programming support method, program for causing computer to implement the method, and recording medium containing the program

Also Published As

Publication number Publication date
EP0557475A1 (fr) 1993-09-01
JPH06505621A (ja) 1994-06-23
BR9205391A (pt) 1994-06-21
AU3849493A (en) 1993-09-23
CA2096243A1 (fr) 1993-03-14

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