WO1990008437A2 - Raccordement de postes a des bus - Google Patents

Raccordement de postes a des bus Download PDF

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Publication number
WO1990008437A2
WO1990008437A2 PCT/DE1989/000794 DE8900794W WO9008437A2 WO 1990008437 A2 WO1990008437 A2 WO 1990008437A2 DE 8900794 W DE8900794 W DE 8900794W WO 9008437 A2 WO9008437 A2 WO 9008437A2
Authority
WO
WIPO (PCT)
Prior art keywords
bus
bus line
resistor
subscriber
resistors
Prior art date
Application number
PCT/DE1989/000794
Other languages
German (de)
English (en)
Other versions
WO1990008437A3 (fr
Inventor
Andreas Weigl
Original Assignee
Robert Bosch Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch Gmbh filed Critical Robert Bosch Gmbh
Publication of WO1990008437A2 publication Critical patent/WO1990008437A2/fr
Publication of WO1990008437A3 publication Critical patent/WO1990008437A3/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40169—Flexible bus arrangements
    • H04L12/40176—Flexible bus arrangements involving redundancy
    • H04L12/40182—Flexible bus arrangements involving redundancy by using a plurality of communication lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L2012/40267—Bus for use in transportation systems
    • H04L2012/40273—Bus for use in transportation systems the transportation system being a vehicle

Definitions

  • the invention is based on a coupling of a subscriber of at least one transmitting and / or receiving part of a local network, in particular of a motor vehicle, to a data bus with two bus lines according to the preamble of claim 1.
  • Two-wire bus lines are used as data lines, in particular in motor vehicle construction. By vibrations in the The bus lines can be injured in the vehicle, so that a short circuit of one of the two lines to ground or to the battery voltage or a line break occurs. It is also possible for a short circuit to occur between the two bus lines.
  • the coupling according to the invention with the features listed in claim 1 has the advantage over that even if an interruption of one of the data or bus lines of a network, but also in the event of a short circuit of the data lines to ground, the voltage supply or among themselves, the data that can be detected the data or bus lines are transmitted.
  • the subscriber which has at least one transmitting and / or receiving part, is connected to the data bus via RC Switching elements connected, each assigned to a bus line.
  • a resistance network is provided, which puts the inputs of the receiver part at a predetermined potential.
  • the resistance network is particularly simple; it consists of a parallel connection of two resistors in series, the inputs of the data evaluation circuit or the receiver of the subscriber being connected to the connection points of the series of resistors.
  • a controllable switching element is provided, which is assigned between a bus line and an RC switching element assigned to this bus line.
  • Appropriate wiring of the switching element which is designed, for example, as a transistor, makes it possible for the associated bus line to be disconnected if a short circuit occurs between the two bus lines. In this way, the useful signal arriving on the other bus line is not subjected to any undesired damping.
  • the coupling according to the invention with the features mentioned in claim 9 has the advantage over the known prior art that errors occurring on the bus lines do not lead to damage to the transmission part of a subscriber connected to the data bus. This leads to a particularly high operational reliability of the participants connected to the data bus.
  • driver circuits of the transmitting part of the subscriber are connected to the respective bus lines via a series connection of a diode and two resistors. At the junction of the two resistors, diodes are provided which are connected to an operating voltage or to ground. This ensures that excessive positive or negative voltages on the bus lines are kept away from the driver stages of the transmitting part.
  • FIG. 1 shows a basic circuit diagram of a local area network with a linear bus structure
  • Figure 2 shows a first embodiment of a bus coupling
  • 3 shows the potential profile on the bus lines BO and B1 in the event of a short circuit of the line B1 to ground, and the potential profile at the input of the receiver circuit shown in FIG. 2;
  • FIG. 4 shows the potential curve at the input of the receiver circuit shown in FIG. 2 in the event of a short circuit between the bus lines BO and B1;
  • FIG. 5 shows a further exemplary embodiment of a bus coupling
  • FIG. 6 shows the potential profile on the bus lines BO and B1 in the event of a short circuit of the line B1 to ground, and the profile of the potentials at the input of the receiver circuit shown in FIG. 5 and
  • FIG. 7 shows the course of the potential on the bus lines B0 and B1 in the event of a short circuit between the data lines and the potential course at the input of the receiver circuit of a subscriber shown in FIG.
  • Figure 1 shows an example of a network with a linear bus structure.
  • Several nodes 2, 3, 4 and 5 are connected to a bus line 1.
  • the connection between bus line 1 and the participants is made via connecting lines 6.
  • the data bus is terminated via suitable passive bus terminations 7.
  • suitable passive bus terminations 7. instead of the linear bus structure shown, for example, ring and star configurations are also possible.
  • FIG. 2 shows a network interface, that is to say the coupling of one of the subscribers 10 shown in FIG. 1 to a data bus 20.
  • the subscriber is, for example, a CAN IC, the external wiring of which is shown in detail, while its internal circuit is limited to a few components.
  • the subscriber 10 has a transmitting part and a receiving part.
  • the transmitting part is connected to the data bus 20 via two terminals TX0 and TX2.
  • the receiving part of subscriber 10 is connected to data bus 20 via terminals RX0 and RX1.
  • the data bus 20 here consists of the bus lines B0 and B1.
  • the transmitting part of the subscriber has a first driver stage T1, which is assigned to the first bus line B1.
  • a first driver stage T1 which is assigned to the first bus line B1.
  • the driver stage is controlled by a suitable circuit of the participant, the so-called CAN controller.
  • the subscriber's output terminal TX1 is connected to the first bus line B1 via a diode D2 and a resistor R4.
  • the diode is poled so that it lies with the cathode at the terminal TX1 and the anode at the resistor R4.
  • a second driver stage T2 is assigned to the second bus line B0.
  • an electronic switch of this driver stage is shown here, which is connected on the one hand to a supply voltage VCC and on the other hand to the output terminal TX0 of the transmitting part of the subscriber.
  • control takes place via a suitable control circuit of the transmitting part.
  • the output terminal TX0 is connected to the second bus line B0 via a diode D1 and via a resistor R3.
  • the diode D1 is polarized so that its anode is connected to the output terminal TX0 and its cathode to the resistor R3.
  • the diodes D1 and D2 prevent the signals present on the bus lines B1 and B0 from having an effect on the driver stages T1 and T2 or the transmitting part.
  • the two bus lines B0 and B1 are driven in phase opposition by the driver stages T2 and T1 or by the control circuit, the CAN controller of the subscriber 10.
  • the receiver part of subscriber 10 is connected to terminals RX1 and RX0 with bus lines B0 and B1.
  • the receiver has, for example, a comparator which is connected to the terminals RX0 and RX1. This comparator is not shown here for reasons of better clarity.
  • the receiver converts the signals that arrive on the bus lines for subscriber 10.
  • the first input terminal RX0 is connected via a capacitor C1 and a resistor R5, which together form an RC Form switching element, connected to the first bus line B1.
  • the second input terminal of the receiver RX1 is connected to the second bus line B0 via a capacitor C2 and a resistor R6, which also form an RC switching element.
  • the input terminals can be connected to ground via suitable capacitors C3.
  • Two diodes D3 and D4 are arranged between the input terminals RX1 and RX0, the diode D4 with its cathode at the terminal RX1 and the diode D3 with its cathode at the terminal RX0.
  • the input terminals of the receiver part of the subscriber 10 are connected to a resistance network 30.
  • This consists of two series connections 31 and 32, each having two resistors, which are arranged in parallel with one another.
  • the resistance network is connected to the supply voltage +5 V on the one hand and to ground on the other.
  • the first series circuit 31, which consists of the resistors R7 and R8, is assigned to the first input terminal RX0 of the receiver. This is connected to the junction of the two resistors R7 and R8.
  • the second series circuit 32 comprising the resistors R9 and R10 is assigned to the second input terminal RX1 of the receiver. This is connected to the junction of the two resistors.
  • the receiver input terminals can be set to a certain potential. In the present case, a potential of approximately 2.6 to 2.5 V is selected for the first input terminal RX0 and a potential of 2.4 V for the second input terminal RX1.
  • a series circuit comprising the diodes D5, D6, D7 is connected to the RC switching element of the second bus line B0. These are all of the same polarity, the anode of the first diode D5 of the series circuit being at the junction of the resistor R6 with the capacitor C2 and the cathode of the last diode D7 being at ground.
  • this potential jump is transmitted via the RC switching elements R5, C1 and R6, C2 to the inputs of the receiver part RX0 and RX1.
  • the potential at the inputs is limited to diode forward voltage by diodes D3 and D4. With such a level jump, for example, the voltage at RX0 drops, while the voltage at RX1 increases. As a result, the input comparator of subscriber 10 connected to the input terminals switches.
  • the discharge time constant of the first RC switching element which is determined by the design of the associated components C1, R7, R8 or that of the RC switching element C2, R9 and RIO is determined, must be measured so that the maximum number of consecutive dominant bits of the respective baud rate can be bridged without the comparator switching back. In one exemplary embodiment of a bus system, it must be possible to bridge 12 dominant bits that follow one another directly.
  • the voltage preset by the resistor network 30 is reset at the comparator inputs RX1 and RX0.
  • the signal reaches the associated input RX0 or RX1 of the receiver part of the subscriber via the associated RC switching element R5, C1 or R6, C2.
  • the respective other comparator input that is to say the input assigned to the faulty line, follows the signal arriving on the intact bus line with the same frequency. However, the level of the signal at the input of the faulty line is reduced by the diode forward voltage of the diode D3 or D4.
  • a short circuit of the first bus line B1 to ground is shown by way of example below in the diagram in FIG. 3. So it is at 0 V.
  • the time course of a signal on the second bus line B0 is also shown.
  • the lowest point of the illustration also corresponds to 0 V.
  • the level at the input terminals RX0 and RX1 of the receiver part of the subscriber 10 is shown over the time profile of the signals on the bus lines.
  • the level at input terminal RX0 is solid;
  • the level at the input terminal RX1 is shown in dotted lines. It is indicated here that the potential difference between the levels is 0.3 V, this voltage corresponding to the diode forward voltage.
  • the signal at the inputs RXO and RXl is evaluated with the aid of a comparator.
  • the comparator switches at the intersection of the two potential curves. It turns out that even if one of the two bus lines is short-circuited, there are clear intersection points of the curves, that is, clear switching points S of the comparator. The signal on the bus lines can therefore be clearly evaluated on the basis of the circuit present.
  • the lines are assigned different internal resistances, both lines having the same voltage swing.
  • the voltage level is determined by the ratio of the resistance values of the parallel circuit R2 and R3 or R1 and R4. The values selected here result in a voltage of 2.8 V. This signal swing is forwarded via R5 and C1 to the comparator input RX0.
  • Both the dominant and the recessive bus level lie above the diode total voltage of the series circuit comprising the diodes D5, D6, D7. This means that no signal swing occurs at C2. This means that no signal is transmitted to the comparator input RX1.
  • the signal at the comparator input RX1 follows that at the input RX0 frequency and phase synchronized. However, the level is reduced by the diode forward voltage of the diode D3 or D4.
  • the potential curve at the terminals RX0 and RX1 of the input part of the subscriber 10 is indicated in FIG. 4.
  • the potential difference here is e.g. 125 mV.
  • the intersections between the two potential courses can be clearly seen. Each intersection corresponds to a comparator switching point.
  • FIG. 5 shows a further exemplary embodiment of a bus coupling. The same parts are provided with the same reference numerals.
  • FIG. 1 In this illustration too, only one subscriber 10 of the network shown in FIG. 1 is shown. It is connected to a data bus 20 with an r first bus line B1 and a second bus line B0 connected.
  • the subscriber 10 for example a CAN IC, has a transmitter part and a receiver part.
  • the transmitter part comprises a first driver stage T1 and a second driver stage T2. Of the driver stages, only the electronic switching elements, the transistors, are shown here.
  • the driver transistor of the first driver stage T1 is connected to the first output terminal TX1 of the transmitter part. On the other hand, it is due to mass. It is controlled by a suitable control circuit, for example a CAN controller.
  • the output terminal TX1 is connected to the first bus line B1 via a diode D2 and a series circuit comprising the resistors R41, R42.
  • the diode is connected so that its cathode is at the terminal TX1.
  • the anode of a diode D6 is connected, the cathode of which is connected to a supply voltage of, for example, +5 V.
  • the driver stage T2 also only shows an electronic switching element, a transistor, which is connected to the output terminal TX0 on the one hand and to a supply voltage VCC on the other. This transistor is also controlled via a suitable control circuit.
  • Terminal TX0 is connected via a diode D1 and a
  • the diode D1 is polarized so that its anode is at the terminal TX0.
  • the cathode of a diode D5 is connected, the anode of which is connected to ground.
  • the transmitter transistors By connecting the output terminals of the transmitter part, the transmitter transistors are protected against impermissibly high voltages on the bus lines. Voltages of more than 5.7 V on bus line B1 and negative voltages of less than 0.7 V on bus line B0 are derived via diodes D5 and D6. In the event of negative voltages on the first bus line B1 and positive voltages which are greater than the predetermined value on the second bus line BO, the diodes D1 and D2 block.
  • the bus terminating resistors R1 and R2 shown here in dashed lines are provided only once, regardless of the number of stations or subscribers connected to the data bus.
  • the first bus line B1 is connected via a resistor R2 to a supply voltage of, for example, +5 V, while the second bus line BO is connected to ground via a resistor R1 and the collector-emitter path of a transistor T2.
  • R1 1 / 2R
  • R2 1 / 2R
  • R41 + R42 R4 R.
  • the receiver part of the subscriber 10 has a first input terminal RX0, which is connected to the first bus line B1 via a first RC switching element.
  • This switching element comprises a capacitor C1 and a resistor R5.
  • the second input terminal RXl of the receiver part of the subscriber 10 is over another RC switching element with a capacitor C2 and a resistor R6 with the. second bus line B0 connected.
  • the collector-emitter path of a controllable switching element, here a transistor T1 is connected between the resistor R6 and the bus line B0, the base of which is connected to a series circuit 33 composed of the resistors R11 and R12. It lies at the junction of the two resistors.
  • the series circuit 33 is connected on the one hand to a supply voltage with, for example, +5 V and on the other hand to ground.
  • the inputs RX1 and RX0 are otherwise connected to a resistor network 30, which consists of two series circuits 31 and 32.
  • the first series circuit 31 has the resistors R7 and R8, the second series circuit 32 has the resistors R9 and R10.
  • the series connections are parallel to one another and on the one hand to a supply voltage of, for example, +5 V and on the other hand to ground.
  • two diodes D3 and D4 are provided, the anode of the diode D3 being at the terminal RX1 and the anode of the diode D4 being at the terminal RX0.
  • the capacitors C3 provided in FIG. 2, which lie between the input terminals and ground, are omitted in this exemplary embodiment. However, they can of course also be activated here.
  • the functions of the circuit are discussed in more detail below.
  • the transistors of the driver stages T1 and T2 of the transmitter part of the subscriber 10 are driven in phase opposition by the control circuit, the CAN controller. In a recessive case, this results in a voltage of +5 V on the first bus line and a voltage of 0 V on the second bus line BO. In this case, the transistors of the driver stages block. This state is denoted by "1".
  • both transistors conduct. This reduces the potential on the first bus line B1 to approximately 3.5 V due to the resistors R2, R41 and R42. In contrast, the potential on the second bus line BO increases to approximately 1.5 in accordance with the division ratio R31 + R32, R1 V. This state is designated with "0".
  • the function of the receiver corresponds to that of the exemplary embodiment explained with reference to FIG. 2. Reference is made to these statements here.
  • a first fault condition is explained on the basis of FIG. 6, namely a short circuit, one of the two bus lines to ground or to the battery voltage or a line break.
  • the bus signal is transmitted via the intact bus line, via the associated RC switching element R5, C1 or R6, C2 the signal reaches the RX0 or RX1 input of the receiver.
  • the other input assigned to the defective bus line follows this level with the same frequency but with a level reduced by the diode forward voltage. It there is always a comparator switching point, as can be seen from FIG. 6.
  • the potential curve on the bus lines B0 and B1 is shown below, there being a short circuit of the first bus line B1 to ground.
  • the potential curve at the inputs RX0 and RX1 of the receiver part of the subscriber 10 is shown in FIG. 6 above.
  • the comparator connected to the inputs has a switching point at each intersection of the two potential curves at the input terminals.
  • the bus terminating resistor R1 is separated from the second bus line B0 by the switching element designed as transistor T2. This increases the recessive bus level to +5 V and guarantees a dominant level change with symmetrical driver resistors.
  • the design chosen here results in a potential of 1.5 V.
  • the symmetry of the driver resistors is there by ensuring that the sum of the resistors R31 + R32 and R41 + R42 is the same.
  • transistor T1 blocks in this case and thus interrupts the coupling of the second bus line B0 to the input terminal RX1 of the input part of the subscriber 10 as soon as the voltage on the bus line assumes a potential of more than 2 V.
  • the base voltage of the transistor T1 via the voltage divider 33 with the resistors R11 and R12 is e.g. set to 2.5 V.
  • no signal swing occurs at signal voltages at B0 of +5 V or 3.5 V at the capacitor C2 of the RC switching element of the second bus line B0. This means that no signal is transmitted to the RX1 input of the comparator.
  • the potential at the comparator input RX1 follows the frequency and phase synchronism at the input RX0, but is reduced by the diode forward voltage of the diode D3 or D4. In this way, a comparator switching point is ensured in any case.
  • the potential curve at the input terminals RXO and RX1 for this fault is also shown in FIG. 7. It can be seen from the fact that the potential curves have intersections that the comparator assigned to the input terminals RX0 and RX1 reaches switching points. In this case, an evaluation of the signal on the bus lines is ensured even in the event of an error.
  • the potential values mentioned for the bus line or input and output terminals of the subscriber 10 can be freely selected are.
  • the resistance values, inter alia, of the resistance network 30 may have to be adapted to other voltage levels.
  • the difference between the exemplary embodiment shown in FIG. 5 and that in FIG. 2 is that the transistors of the driver stages T1 and T2 of the subscriber 10 are additionally protected. Furthermore, a further improvement in the functional behavior in the event of a short circuit between the bus lines B1 and B0 is ensured. Here it is also ensured that the attenuation of the useful signal which occurs through the diodes D5, D6 and D7 is omitted in the event of a short circuit. Instead, the bus line B0 is cut off by the transistor T1.
  • both exemplary embodiments ensure that the data to be transmitted are protected in a variety of ways against blocking the transmission by short-circuited or dropped bus lines. This protection is particularly important when using a computer network in motor vehicles, since the probability of such errors is particularly high due to the vibrations. An extremely low quiescent current consumption of only 25 ⁇ A is achieved.
  • mass shifts In motor vehicles in particular, the problem frequently arises that individual components are at different potentials, so-called mass shifts. Through the capacitive coupling of the individual participants on Mass shifts based on common mode disturbances excluded.

Abstract

Un raccordement permet de raccorder un poste comprenant au moins une partie de transmission et/ou une partie de réception dans un réseau local, notamment d'un véhicule à moteur, à un bus de données ayant deux lignes de bus. Le raccordement comprend des circuits RC (R5, C1; R6, C2) associés aux lignes de bus (B0, B1) et connectés à un réseau de résistances (30). L'action combinée des condensateurs avec les résistances du réseau produit au niveau des bornes d'entrée (RX0, RX1) de la partie de réception du poste (10) des potentiels qui permettent de reconnaître de manière fiable les données dans le bus de données (20) même en cas de court-circuit d'une des lignes du bus avec la masse, avec la tension de la batterie ou avec l'autre ligne de bus, ou lors de la coupure d'une des lignes.
PCT/DE1989/000794 1989-01-20 1989-12-29 Raccordement de postes a des bus WO1990008437A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DEP3901589.0 1989-01-20
DE19893901589 DE3901589A1 (de) 1989-01-20 1989-01-20 Ankopplung eines busteilnehmers

Publications (2)

Publication Number Publication Date
WO1990008437A2 true WO1990008437A2 (fr) 1990-07-26
WO1990008437A3 WO1990008437A3 (fr) 1990-09-07

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Application Number Title Priority Date Filing Date
PCT/DE1989/000794 WO1990008437A2 (fr) 1989-01-20 1989-12-29 Raccordement de postes a des bus

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DE (1) DE3901589A1 (fr)
WO (1) WO1990008437A2 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0661849A1 (fr) * 1993-12-09 1995-07-05 TEMIC TELEFUNKEN microelectronic GmbH Système de bus de données
WO1997036399A1 (fr) * 1996-03-26 1997-10-02 Daimler-Benz Aktiengesellschaft Procede pour determiner des decalages de potentiel entre modules electroniques d'un reseau a bus filaire

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4306361A1 (de) * 1993-03-02 1994-09-08 Daimler Benz Ag Datenkommunikationssystem
DE4327035A1 (de) * 1993-08-12 1995-02-16 Daimler Benz Ag Anordnung zur bidirektionalen Datenübertragung
DE19813952C1 (de) * 1998-03-28 1999-11-04 Telefunken Microelectron Signalisierungsendstufe zur Erzeugung digitaler Spannungssignale auf einem Bussystem
DE19926173A1 (de) * 1999-06-09 2000-12-21 Bosch Gmbh Robert Bustreiberschaltung für ein Zweileiter-Bussystem
DE102006048109B4 (de) * 2006-10-11 2011-01-13 Audi Ag CAN-Steuergerät, CAN-Bussystem und Kraftfahrzeug

Citations (2)

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Publication number Priority date Publication date Assignee Title
FR2443770A1 (fr) * 1978-12-04 1980-07-04 Materiel Telephonique Recepteur pour bus ac a isolation galvanique par capacite
EP0171555A1 (fr) * 1984-07-20 1986-02-19 Siemens Aktiengesellschaft Système de ligne bus comportant deux conducteurs de signaux connectés à des dispositifs de transmission par deux sorties différentielles

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2443770A1 (fr) * 1978-12-04 1980-07-04 Materiel Telephonique Recepteur pour bus ac a isolation galvanique par capacite
EP0171555A1 (fr) * 1984-07-20 1986-02-19 Siemens Aktiengesellschaft Système de ligne bus comportant deux conducteurs de signaux connectés à des dispositifs de transmission par deux sorties différentielles

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0661849A1 (fr) * 1993-12-09 1995-07-05 TEMIC TELEFUNKEN microelectronic GmbH Système de bus de données
WO1997036399A1 (fr) * 1996-03-26 1997-10-02 Daimler-Benz Aktiengesellschaft Procede pour determiner des decalages de potentiel entre modules electroniques d'un reseau a bus filaire
US6405330B1 (en) 1996-03-26 2002-06-11 Daimlerchrysler Ag Process for determining potential shifts between eletronic modules in a wire bus network

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WO1990008437A3 (fr) 1990-09-07
DE3901589A1 (de) 1990-07-26

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