WO1989011134A1 - Systeme electronique de calcul et d'enregistrement pour machines d'affranchissement - Google Patents
Systeme electronique de calcul et d'enregistrement pour machines d'affranchissement Download PDFInfo
- Publication number
- WO1989011134A1 WO1989011134A1 PCT/CH1989/000081 CH8900081W WO8911134A1 WO 1989011134 A1 WO1989011134 A1 WO 1989011134A1 CH 8900081 W CH8900081 W CH 8900081W WO 8911134 A1 WO8911134 A1 WO 8911134A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- memory
- franking
- microcontroller
- storage unit
- computing
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07B—TICKET-ISSUING APPARATUS; FARE-REGISTERING APPARATUS; FRANKING APPARATUS
- G07B17/00—Franking apparatus
- G07B17/00185—Details internally of apparatus in a franking system, e.g. franking machine at customer or apparatus at post office
- G07B17/00362—Calculation or computing within apparatus, e.g. calculation of postage value
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/74—Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
- G06F11/167—Error detection by comparing the memory output
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07B—TICKET-ISSUING APPARATUS; FARE-REGISTERING APPARATUS; FRANKING APPARATUS
- G07B17/00—Franking apparatus
- G07B17/00185—Details internally of apparatus in a franking system, e.g. franking machine at customer or apparatus at post office
- G07B17/00193—Constructional details of apparatus in a franking system
- G07B2017/00233—Housing, e.g. lock or hardened casing
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07B—TICKET-ISSUING APPARATUS; FARE-REGISTERING APPARATUS; FRANKING APPARATUS
- G07B17/00—Franking apparatus
- G07B17/00185—Details internally of apparatus in a franking system, e.g. franking machine at customer or apparatus at post office
- G07B17/00314—Communication within apparatus, personal computer [PC] system, or server, e.g. between printhead and central unit in a franking machine
- G07B2017/00338—Error detection or handling
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07B—TICKET-ISSUING APPARATUS; FARE-REGISTERING APPARATUS; FRANKING APPARATUS
- G07B17/00—Franking apparatus
- G07B17/00185—Details internally of apparatus in a franking system, e.g. franking machine at customer or apparatus at post office
- G07B17/00362—Calculation or computing within apparatus, e.g. calculation of postage value
- G07B2017/00395—Memory organization
- G07B2017/00411—Redundant storage, e.g. back-up of registers
Definitions
- the invention relates to an arithmetic and storage unit for franking machines for storing and debiting franking amounts in accordance with the preamble of claim 1 and its operating method.
- Fig. 1 shows the block diagram of this franking machine, which is composed of two main assemblies.
- the first main assembly is the so-called drive unit 11, to which the mail item 12, in particular letters to be franked, is fed.
- the drive unit 11 comprises a switch 13 for detecting and a notor-operated feeder 14 for transporting the letters and a clutch 15 for driving the units of the second main assembly which are still to be discussed.
- the units mentioned are contained in a basic chassis, which also contains the feed unit 16 for the overall franking machine, a first processor 17 with an associated data memory 18 and a printer 19.
- the latter units are used primarily for the accounting of the franking machine operator, e.g. when different departments of a company use the same franking machine.
- the drive unit 11 is unproblematic because it is not subject to any postal regulations.
- the franking unit 20 is detachably connected to the drive unit 11 and is subject to very strict postal regulations, since with it it is impossible to enforce very large amounts of money, for example 100,000 currency units per year, for example Swiss Franconia.
- the franking machine 20 u contains as the heart a second processor 21 with an associated memory 22, to which a keyboard 23 as input means and an electronic display 24 are assigned. Further inputs and outputs can take place via electrical feed lines D and P from external units, for example a postal scale with an assigned port computer.
- the electronic assemblies listed here are now assigned purely mechanical assemblies via an electromechanical interface 25. These are the so-called rotor 26, a cam mechanism 27, an inking unit 28, an arithmetic unit 29 and two. Counters 30, 31.
- the required postage amount is set in the rotor 26 via the interface 25.
- the rotor 26 is then driven via the clutch 15 and the cam mechanism 27 in such a way that it executes a single, complete revolution, wherein it is colored by the inking unit 28 and the color is stamped on the letter running through synchronously.
- the arithmetic unit 29 is forcibly actuated via mechanical coupling elements and a new counter reading is formed in the counters 30, 31.
- the counter 30 counts up as a charge counter, the counter 31 counts down as a default counter.
- The. Franking unit 20 forms a closed unit which can only be operated in cooperation with the drive unit 11 and whose counters 30, 31 are only accessible via a so-called mail lock.
- This is e.g. a mechanical security lock, the key of which is kept by the approving post office, so that only an authorized person, e.g. a counter clerk at the local post office who can reset counters.
- the counters 30, 31 are designed as robust, mechanical roller counters, which can be read off directly via a viewing window and whose count value or their counter reading at Switching off the franking machine is automatically retained without any measures.
- the counters thus form visually readable, fail-safe memories for accumulated amounts of money that can be changed manually, for example resettable to zero.
- the object of the invention is therefore to replace the mechanical counters or arithmetic units in franking machines by electronic storage and arithmetic units.
- all existing postal requirements and regulations for franking machines must be observed. Above all, this is absolute protection against abuse and fraud, e.g. by franking letters without paying the postage. This also means that you can work according to the credit or default method.
- the credit process subsequent payment of the amounts of money accumulated in the storage units, e.g. per month.
- the storage units are set to any amounts of money to be paid in advance. Postage can then be paid until the remaining amount has been used up.
- the solution to the task under consideration of all secondary conditions is given by the independent claims.
- the dependent claims reflect embodiments of the invention.
- the specified solution enables electronic franking machines to be built up to a greater extent. This clears the way for connecting the franking machines to other electronic devices such as remote reading devices, remote setting devices for the targeted storage of specified amounts of money, data evaluation units, fully automatic inserting and franking lines, etc.
- the solution is based on the primary idea of redundantly equipping the electronic storage unit with memories in such a way that the security against a total failure is drastically increased.
- two or more semiconductor memories of different technical designs are provided, which are operated in parallel under constant mutual and other control. This significantly reduces the likelihood of all memory failing at the same time due to the same cause, e.g. due to faulty voltage levels.
- FIG. 1 block diagram of a known franking machine as
- Fig. 2 block diagram of an arithmetic and storage unit Fig. 3 - example of the memory organization Fig. 4 - flow diagram for the operational sequence.
- Fig. 1 was discussed as prior art in the introduction.
- the new electronic arithmetic and storage unit 40 to be described below essentially replaces the arithmetic unit 29 as well as the counters 30 and 31, the outer shape of the franking unit 20 being largely retained and the electromechanical interface, comparable to the one described (25), only is only necessary for the franking setting in the rotor 26.
- the said second processor 21 and the memory 22 are for practical reasons in the computing and Storage unit 40 included.
- FIG. 2 shows a block diagram of the arithmetic and storage unit 40 according to the invention.
- This comprises a microcontroller 42, four memories 44 to 47 constructed independently of one another, a bus line 50, two separate monitoring units 53, 54 and two gatekeeper units 56, 57 a mail lock 60 of the type described.
- First: - Memory 44 is a RAM memory (random access memory) and serves as a general working memory of the microcontroller 42 and as a buffer for smaller amounts of money that have been used up as postage or as franking amounts.
- the second memory 45 is an EPROM memory (erasable programmable read only memory), a ROM memory (read only memory) or, less sensibly, a PROM memory (programmable read only memory), the selection being made essentially according to practical aspects.
- This memory 45 contains all the programs for operating the microcontroller 42 and thus forms the program memory of the arithmetic and storage unit 40.
- the third memory 46 is in turn a RAM memory which is fed by a buffer battery 39 in such a way that its data content is retained even in the absence of the actual supply voltage.
- the fourth memory 47 is an EEPROM memory (electrically erasable programmable read only memory). This is a non-volatile semiconductor memory to which data can be input in a limited number of memory cycles, e.g. 10,000 cycles at most.
- the third 46 and in parallel the fourth 47 and the first memory 44 each serve to store and store one important data for the respective postal administration. This will be discussed in more detail later.
- the four memories 44 to 47 are connected to the microcontroller 42 via the bus line 50.
- This bus line is formed in a manner known per se as a bundle of lines for data exchange.
- the microcontroller 42 is further connected via inputs / outputs 43 to other units, in particular the input keyboard 23 and the electronic display 24 (FIG. 1), and via connections 66, 67 to the gatekeeper units 5-5 and 57 respectively.
- the microcontroller 42 operates in the usual way on the basis of the programs contained in the program memory 45. He generally uses the first memory 44 as a working memory. In its function as a replacement for the arithmetic unit 29, the microcontroller 42 works in a special way with the memories 44, 46 and 47.
- the gatekeeper units 56, 57 are used for special control and allow access to the memories 46 and 47 only after prior registration. They also ensure that any further access is prevented after each access. These functions are essentially independent of the microcontroller 42 and its program contained in the memory 45.
- the structure of the gatekeeper units 56, 57 is e.g. in a simple design from a plurality of AND gates operated in parallel, which are inserted into the individual lines of the bus line 50 and can thus block these lines. There is also a separate controller for controlling the gates, which receives its instructions via connections 66 and 67, respectively.
- the functionality of the microcontroller 42 is continuously monitored by units 53 and 54, which are also independent of this (42).
- the monitoring unit 53 monitors in particular the supply voltage (power fall) and work interruptions (interrupts) and emits error signals as soon as an error occurs is determined, ie if, for example, the supply voltage breaks down because the franking machine has been switched off (at the possibly wrong time).
- the monitoring circuit 54 takes effect when all other safety measures are unsuccessful. It checks whether a signal occurs in the signal flow of the microcontroller 42 at very short intervals, for example every 8 ms. If this is not the case, then it immediately blocks the microcontroller 42, ie after, for example, 10 ms.
- the unit 54 thus forms a kind of emergency brake for the arithmetic and storage unit 40.
- the computing and storage unit 40 is mechanically encapsulated from the outside and is only accessible after the aforementioned mail lock 60 has been actuated.
- This lock 60 is equipped with a further backup battery 61 and with a magnetic switch 62.
- This switch 62 must first be activated by the microcontroller 42 after each start-up of the franking machine, before the other functions of the machine can be started.
- each data record 69 comprises several data in the same order, in particular a consecutive number 70 as a counter for the total number of frankings, the date 71, a status display 72 about the machine status, for example "freshly switched on", a fee counter 73 (total value of all postage and / or Franking amounts) to indicate the integral franking amount of all previous frankings, a default count 74 for indicating the remaining amount of the last amount entered by the post office, a CRC amount 75 and possibly further details such as an operator xamen.
- CRC-Sumne cyclic redundancy check
- an error check value is too understand, which provides more information than a parity bit about all possible errors or the absence of errors in the respective memory line.
- the calculation of the CRC sum is carried out, for example, with the aid of a standardized 16th degree test polynomial from the bytes of the respective line in accordance with standardized procedural information from the international standardization body CCITT, Geneva.
- the memory 47 as an EEPROM memory is limited in the number of write cycles. It is therefore organized in such a way that a line is not saved for every franking process, but only for special processes.
- the memory 47 interacts with the memory 44 in such a way that the data records 69 assigned to the franking operations are temporarily stored in the memory 44 in the manner described until a predetermined amount for postage or a predetermined amount, for example 20 currency units (dollar, Swiss franc, ..) has accumulated.
- a predetermined amount for postage or a predetermined amount for example 20 currency units (dollar, Swiss franc, ..) has accumulated.
- the last data record 69 is transferred to a line provided in the memory 47 and is thus stored in a non-volatile manner.
- a corresponding transfer or backup also takes place, when the monitoring unit 53 announces an imminent failure of the supply voltage (power fail) of the volatile memory 44, ie for example each time the franking machine is switched off.
- the secure, relatively long-term storage of the franking amounts thus takes place in parallel in the two non-volatile memories 46 and 47. These are therefore referred to below as the first and second franking amount memories.
- the arithmetic and storage unit 40 now works as follows (FIG. 4):
- a corresponding message is made via the inputs / outputs 43 and the necessary postage amount is entered, e.g. 50 centimes and a start order.
- the microcontroller 42 then creates a new data record 69 in accordance with the program in the program memory 45 and in cooperation with the working memory 44. This means that the microcontroller 42 forms the next sequential number 70, indicates the status 71, calculates the new fee 73 and default count 74 and forms the CRC sum 75.
- the microcontroller 42 logs on to the first gatekeeper unit 56 via the connection 66.
- the microcontroller 42 then reads the content of the line just occupied, calculates the CRC sum 75 again for checking purposes, and compares the result with the data record 69 still stored in the working memory 44.
- the gatekeeper unit 56 then blocks the bus line 50 again.
- the microcontroller 42 now examines whether one in the working memory 44 with the data record 69 mentioned Amount has been reached that requires storage in the second franking amount memory 47. If this is not the case, then the microcontroller 42 ends its work. If, on the other hand, the said amount has been reached or exceeded, the microcontroller 42 logs on to the second porter unit 57 via the connection 67. This then releases the bus line 50 to the second franking amount memory 47, the microcontroller 42 now transfers the data record 69 from the working memory 44 to the second franking amount memory 47, reads the line described again and compares the data with the corresponding data record 69 in the first franking memory 46. The gatekeeper unit 57 then blocks the bus line 50 again.
- the computing and storage unit 40 recognizes this very quickly and emits a warning message. If there is a serious discrepancy, the arithmetic and storage unit 40 is blocked.
- the arithmetic and storage unit 40 described can be varied in many ways without departing from the actual inventive concept. The following variants are therefore mentioned:
- the calculation and writing of the franking amounts into the different franking amount memories takes place in a changed order based on the same or different algorithms.
- the information content of the memory lines can be expanded compared to the data described and reduced to a limited extent. eg by omitting the date.
- the consecutive numbering can correspond to the absolute number of frankings or another criterion, for example the number of registration cycles.
- the structure of the microcontroller 42 can be of any design. In particular, a hard-wired logic unit can also be used, which jointly replaces the program memory 45 and the microcontroller 42.
- the memory contents can be read visually via the display 24. Should the entire memory content be checked, e.g. in the event of a malfunction, the contents of the memory can be printed out using a printer belonging to the post office.
- the gatekeeper units 56, 57 can e.g. be omitted for price reasons.
- program memory 45 can be designed as a ROM, PROM or EPROM memory or as another read-only memory.
- the electronic arithmetic and storage unit 40 forms an inexpensive unit which fully meets the tough requirements and which offers the advantages of flexibility, the enormously increased storage capacity and the ability to connect to almost any external peripheral device compared to conventional arithmetic and storage units.
- the electronic arithmetic and storage unit 40 thus forms a unit that brings real progress in the field of franking machines.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Quality & Reliability (AREA)
- General Engineering & Computer Science (AREA)
- Devices For Checking Fares Or Tickets At Control Points (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Un système de calcul et d'enregistrement (40) mécaniquement scellé comprend un microcontrôleur électronique (42) qui coopère avec quatre mémoires indépendantes au moyen d'un bus (50). Les mémoires forment une mémoire de travail (44), une mémoire de programme (45) et deux mémoires rémanentes (46, 47) de taxes d'affranchissement de types technologiques différents. Deux unités de surveillance (53, 54) surveillent indépendamment l'une de l'autre le fonctionnement du microcontrôleur (42) et un verrou postal (60) ferme et rend inaccessible le système de calcul et d'enregistrement (40). Lors de chaque opération d'affranchissement, le microprocesseur (42) reçoit par ses entrées/sorties (43) les informations nécessaires et inscrit sériellement dans deux mémoires (44, 46, 47) la taxe appropriée d'affranchissement ainsi qu'une série d'autres données. Après chaque opération d'inscription dans une des mémoires de taxes d'affranchissement (46, 47), il vérifie si la dernière ligne écrite concorde avec la dernière ligne écrite dans l'autre mémoire. Lorsqu'un manque de concordance entre des données ou un défaut de l'agencement dans son ensemble est détecté, le système de calcul et d'enregistrement (40) se bloque alors que le contenu des mémoires des taxes d'affranchissement (46, 47) est préservé dans sa totalité.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CH1752/88-3 | 1988-05-09 | ||
CH175288 | 1988-05-09 |
Publications (1)
Publication Number | Publication Date |
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WO1989011134A1 true WO1989011134A1 (fr) | 1989-11-16 |
Family
ID=4217733
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/CH1989/000081 WO1989011134A1 (fr) | 1988-05-09 | 1989-05-05 | Systeme electronique de calcul et d'enregistrement pour machines d'affranchissement |
Country Status (1)
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WO (1) | WO1989011134A1 (fr) |
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5276844A (en) * | 1991-08-05 | 1994-01-04 | Ascom Autelca Ltd. | Protection system for critical memory information |
EP0636984A1 (fr) * | 1993-07-30 | 1995-02-01 | Sextant Avionique | Procédé et dispositif de contrôle des données dans un calculateur |
FR2713795A1 (fr) * | 1993-12-10 | 1995-06-16 | Socetec Sa | Méthode et dispositif pour mémoriser des données transactionnelles. |
FR2722595A1 (fr) * | 1994-07-18 | 1996-01-19 | Neopost Ind | Systeme d'affranchissement postal electronique ayant un programme d'exploitation rechargeable in situ |
US5559992A (en) * | 1993-01-11 | 1996-09-24 | Ascom Autelca Ag | Apparatus and method for protecting data in a memory address range |
US5654614A (en) * | 1995-04-14 | 1997-08-05 | Ascom Hasler Mailing Systems Ag | Single-motor setting and printing postage meter |
US5668973A (en) * | 1995-04-14 | 1997-09-16 | Ascom Hasler Mailing Systems Ag | Protection system for critical memory information |
US5689098A (en) * | 1995-05-26 | 1997-11-18 | Ascom Hasler Mailing Systems Ag | Postage meter with improved postal lock |
US5706727A (en) * | 1995-03-14 | 1998-01-13 | Ascom Hasler Mailing Systems Ag | Postage meter with improved paper path |
US5719381A (en) * | 1995-04-14 | 1998-02-17 | Ascom Hasler Mailing Systems Ag | Postage meter with hollow rotor axle |
US5746133A (en) * | 1995-05-22 | 1998-05-05 | Ascom Hasler Mailing Systems Ag | Postage meter with rotor movement and die cover sensor |
US6098032A (en) * | 1996-04-23 | 2000-08-01 | Ascom Hasler Mailing Systems, Inc. | System for providing early warning preemptive postal equipment replacement |
US6176178B1 (en) | 1995-03-07 | 2001-01-23 | Ascom Hasler Mailing Systems Ag | Tamper-resistant postage meter |
US7257558B2 (en) | 1996-04-23 | 2007-08-14 | Neopost Technologies | System and method for conducting a financial transaction between a sender and recipient of a mail piece |
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EP0230658A2 (fr) * | 1985-12-26 | 1987-08-05 | Pitney Bowes Inc. | Système pour comptabiliser la taxe postale dépensée par une machine à affranchir munie de moyens de protection des données pendant l'impression |
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GB2080202A (en) * | 1980-07-14 | 1982-02-03 | Pitney Bowes Inc | Re-funding postage meters |
EP0085385A2 (fr) * | 1982-01-29 | 1983-08-10 | Pitney Bowes Inc. | Dispositif d'affranchissement électronique controllé par un système à microprocesseur |
WO1985003583A1 (fr) * | 1984-02-06 | 1985-08-15 | Sundstrand Data Control, Inc. | Memoire a circuits integres resistant a un accident pour des systemes d'enregistrement de donnees de vol d'un avion |
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Cited By (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5276844A (en) * | 1991-08-05 | 1994-01-04 | Ascom Autelca Ltd. | Protection system for critical memory information |
US5559992A (en) * | 1993-01-11 | 1996-09-24 | Ascom Autelca Ag | Apparatus and method for protecting data in a memory address range |
EP0636984A1 (fr) * | 1993-07-30 | 1995-02-01 | Sextant Avionique | Procédé et dispositif de contrôle des données dans un calculateur |
FR2708765A1 (fr) * | 1993-07-30 | 1995-02-10 | Sextant Avionique | Procédé et dispositif de contrôle des données dans un calculateur. |
US5615133A (en) * | 1993-12-10 | 1997-03-25 | Socetec | Method and device for storing transaction data |
EP0658845A1 (fr) * | 1993-12-10 | 1995-06-21 | Socetec | Méthode et dispositif pour mémoriser des donnés transactionnelles |
FR2713795A1 (fr) * | 1993-12-10 | 1995-06-16 | Socetec Sa | Méthode et dispositif pour mémoriser des données transactionnelles. |
FR2722595A1 (fr) * | 1994-07-18 | 1996-01-19 | Neopost Ind | Systeme d'affranchissement postal electronique ayant un programme d'exploitation rechargeable in situ |
EP0694886A1 (fr) * | 1994-07-18 | 1996-01-31 | Neopost Industrie | Système d'affranchissement postal électronique ayant un programme d'exploitation rechargeable in situ |
US6176178B1 (en) | 1995-03-07 | 2001-01-23 | Ascom Hasler Mailing Systems Ag | Tamper-resistant postage meter |
US5706727A (en) * | 1995-03-14 | 1998-01-13 | Ascom Hasler Mailing Systems Ag | Postage meter with improved paper path |
US5654614A (en) * | 1995-04-14 | 1997-08-05 | Ascom Hasler Mailing Systems Ag | Single-motor setting and printing postage meter |
US5668973A (en) * | 1995-04-14 | 1997-09-16 | Ascom Hasler Mailing Systems Ag | Protection system for critical memory information |
US5719381A (en) * | 1995-04-14 | 1998-02-17 | Ascom Hasler Mailing Systems Ag | Postage meter with hollow rotor axle |
US5746133A (en) * | 1995-05-22 | 1998-05-05 | Ascom Hasler Mailing Systems Ag | Postage meter with rotor movement and die cover sensor |
US5689098A (en) * | 1995-05-26 | 1997-11-18 | Ascom Hasler Mailing Systems Ag | Postage meter with improved postal lock |
US6098032A (en) * | 1996-04-23 | 2000-08-01 | Ascom Hasler Mailing Systems, Inc. | System for providing early warning preemptive postal equipment replacement |
US7257558B2 (en) | 1996-04-23 | 2007-08-14 | Neopost Technologies | System and method for conducting a financial transaction between a sender and recipient of a mail piece |
US7769694B2 (en) | 1996-04-23 | 2010-08-03 | Neopost Technologies | Secure postage payment system and method |
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