WO1987001866A1 - Dispositif a semiconducteurs - Google Patents

Dispositif a semiconducteurs Download PDF

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Publication number
WO1987001866A1
WO1987001866A1 PCT/JP1986/000145 JP8600145W WO8701866A1 WO 1987001866 A1 WO1987001866 A1 WO 1987001866A1 JP 8600145 W JP8600145 W JP 8600145W WO 8701866 A1 WO8701866 A1 WO 8701866A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrode
semiconductor device
anode
pressure contact
main
Prior art date
Application number
PCT/JP1986/000145
Other languages
English (en)
Inventor
Hiroyasu; Hagino
Original Assignee
Mitsubishi Denki Kabushiki Kaisha
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Denki Kabushiki Kaisha filed Critical Mitsubishi Denki Kabushiki Kaisha
Publication of WO1987001866A1 publication Critical patent/WO1987001866A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
    • H01L29/744—Gate-turn-off devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
    • H01L24/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01042—Molybdenum [Mo]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301—Thyristor

Definitions

  • the present invention relates to a semiconductor device having pressure contact, structure for use in high power application.
  • Fig. 1 is a cross-sectional view of a conventional thyristor having pressure contact structure, wherein 1 denotes an n-type base layer, 2 denotes a p-type base layer, 3 denotes an n-type emitter layer, 4 denotes a p-type emitter layer, 5 denotes an anode, 6 denotes a cathode, and 7 denotes a gate electrode, and the anode 5 is made of a metal plate such as molybdenum plate or a tungsten plate, having a coefficient of thermal expansion which is similar to that of silicon, and it is brazed to a silicon substrate in view of mechanical reinforcement on the occasion of pressure contact.
  • 1 denotes an n-type base layer
  • 2 denotes a p-type base layer
  • 3 denotes an n-type emitter layer
  • 4 denotes a p-type emitter layer
  • 5 denotes an anode
  • 6 denotes a catho
  • Electrode 8 is an electrode connecting plate made of a molybdenum plate or a tungsten plate attached to said cathode 6
  • 9 and 10 are electrode blocks of the anode side and the cathode side, respectively, coupled to a package, and the blocks are generally placed in pressure contact in the directions shown by the arrows.
  • 11 is a surface covering made of an organic substance or the like such as polyimide vanish or silicone rubber
  • J» and J 2 are junctions controlling a main breakdown voltage.
  • Semiconductor devices of an ordinary pressure contact structure employ mesa structure having these junctions J 1 and J_ terminated at the side surface.
  • mesa structure is used in a semiconductor device of a pressure contact structure
  • the breakdown voltage characteristic of the device may be deteriorated by contamination of an insulating film covering the planar junction in brazing the anode 5
  • surface processing of the junctions is possible after the brazing.
  • Conventional semiconductor devices of pressure contact structure as described above involve problems such that the quality of a device is hard to be stabilized as an organic substance such as polyimide vanish or silicone rubber is used as a surface covering, and, in addition, a process becomes complicated and operation efficiency is greatly impaired as the surface processing is carried out with an electrode connecting plate made of a molybdenum plate or a tungsten plate attached thereto.
  • a semiconductor device comprises a semiconductor device of pressure contact structure, in which first and second main electrodes formed on a semiconductor chip of planar structure are in pressure contact by means of electrode blocks of the first electrode side and the second electrode side, respectively, connected to a package, wherein an electrode reinforcing plate is interposed between said first electrode and the electrode block of the first electrode side, whereby the quality of the device can be stabilized, and a semiconductor device of pressure contacts structure of a simple manufacturing process and high operation efficiency can be obtained.
  • Fig. 1 is a cross-sectional view of a thyristor having conventional pressure contact structure
  • GTO gate turn off thyristor
  • Fig. 2 is a cross-sectional view showing one embodiment of a semiconductor device according to the present invention, wherein 21 is an n-type base layer, 22 is a p-type base layer, 25 are guardring regions, 26, 27 and 28 are anode, gate electrode and cathode, respectively, formed of a metal such as Al, these forming a semiconductor chip 20 having planar structure.
  • 29 and 30 are electrode blocks of the anode side and the cathode side, respectively, 31 is an electrode connecting plate formed of molybdenum or tungsten, etc., mounted on said cathode 28, 32 is an anode reinforcing plate formed of molybdenum or tungsten, etc, interposed between said anode 26 and the electrode block 29 on the anode side.
  • the mechanical stress upon pressure contact can be buffered by interposing the anode reinforcing plate 32 between the anode 26 and the electrode block 29 on the anode side and, therefore, conventional necessity of brazing the anode is eliminated.
  • the semiconductor chip 20 can be made in planar structure, passivation can be performed in a wafer state, whereby necessity of surface processing of a junction using an organic substance after the brazing of the anode, which is done in a semiconductor device having conventional mesa structure, is eliminated. Accordingly, the quality of a device can be stabilized, and in addition, the operation becomes easy, especially in the case of multi chip structure in which a number of elements are obtained by cutting out one wafer. Meanwhile, since this GTO is provided with guardring regions 25 to reduce the concentration of an electric field at a curved portion A of the junction, it provides a breakdown voltage which is close to that of mesa structure, although it has planar structure itself.
  • Fig. 3 is a cross-sectional view of another embodiment of a semiconductor device of the present invention, which is designed to enhance a reverse directional breakdown voltage as well as a forward directional breakdown voltage: the structure of this embodiments has guardring regions 25 formed in the n-type base layer 21 which is adjacent to both sides of the p-type emitter layer 24 of the anode side.
  • Fig. 4 is also a cross-sectional view of yet another embodiment of a semiconductor device of the present invention, which is designed to enhance a reverse directional breakdown voltage as well as a forward directional breakdown voltage: instead of forming guardring regions 25 in the anode side as in the above embodiment shown in Fig. 3, this embodiment being structured with both sides of the p-type emitter layer extended to the surface of the cathode side.
  • an anode in a GTO corresponds to a collector electrode
  • a cathode corresponds to a base electrode
  • a gate electrode corresponds to an emitter electrode, respectively.
  • the present invention comprises an anode reinforcing plate interposed between an anode and an electrode block of the anode side of a semiconductor chip having planar structure, passivation can be done in a wafer state, and, since there is no necessity of surface processing of the junction using an organic substance, such meritorious effects are brought about that the devices can be stabilized, the manufacturing process becomes simple, and the operation efficiency is improved.
  • the present invention is utilized in a semiconductor device for high power application, such as a thyristor, transistor, and a diode.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)
  • Wire Bonding (AREA)
  • Thyristors (AREA)

Abstract

Dispositif à semiconducteurs possédant une structure de contact par pression pour des utilisations requérant une puissance élevée, dans laquelle les électrodes principales formées sur une puce à semiconducteurs de structure plane sont en contact par pression à l'aide d'un premier et d'un deuxième bloc d'électrodes (29, 30) reliés à un module, une plaque de renforcement d'électrodes (32) étant intercalée entre l'électrode (26) et le bloc d'électrode (29).
PCT/JP1986/000145 1985-09-20 1986-03-27 Dispositif a semiconducteurs WO1987001866A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP20940785A JPH079919B2 (ja) 1985-09-20 1985-09-20 半導体装置
JP60/209407 1985-09-20

Publications (1)

Publication Number Publication Date
WO1987001866A1 true WO1987001866A1 (fr) 1987-03-26

Family

ID=16572372

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1986/000145 WO1987001866A1 (fr) 1985-09-20 1986-03-27 Dispositif a semiconducteurs

Country Status (4)

Country Link
EP (1) EP0238665A1 (fr)
JP (1) JPH079919B2 (fr)
IT (1) IT1213490B (fr)
WO (1) WO1987001866A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0428916A1 (fr) * 1989-10-31 1991-05-29 Kabushiki Kaisha Toshiba Dispositif semi-conducteur à contact par pression et son procédé de fabrication
US5040051A (en) * 1988-12-05 1991-08-13 Sundstrand Corporation Hydrostatic clamp and method for compression type power semiconductors
US5063436A (en) * 1989-02-02 1991-11-05 Asea Brown Boveri Ltd. Pressure-contacted semiconductor component
US5210601A (en) * 1989-10-31 1993-05-11 Kabushiki Kaisha Toshiba Compression contacted semiconductor device and method for making of the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4099201A (en) * 1977-04-11 1978-07-04 General Electric Company Semiconductor rectifier assembly having an insulating material therein that evolves gases when exposed to an arc
EP0080953A1 (fr) * 1981-12-02 1983-06-08 Le Silicium Semiconducteur Ssc Montage en boîtier pressé de composants de puissance à structure d'électrodes ramifiée

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56153767A (en) * 1980-04-28 1981-11-27 Mitsubishi Electric Corp Manufacture of planar type thyristor
JPS5778178A (en) * 1980-11-04 1982-05-15 Toshiba Corp Input protective circuit
JPS59218774A (ja) * 1983-05-26 1984-12-10 Nec Corp サイリスタ

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4099201A (en) * 1977-04-11 1978-07-04 General Electric Company Semiconductor rectifier assembly having an insulating material therein that evolves gases when exposed to an arc
EP0080953A1 (fr) * 1981-12-02 1983-06-08 Le Silicium Semiconducteur Ssc Montage en boîtier pressé de composants de puissance à structure d'électrodes ramifiée

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5040051A (en) * 1988-12-05 1991-08-13 Sundstrand Corporation Hydrostatic clamp and method for compression type power semiconductors
US5063436A (en) * 1989-02-02 1991-11-05 Asea Brown Boveri Ltd. Pressure-contacted semiconductor component
EP0428916A1 (fr) * 1989-10-31 1991-05-29 Kabushiki Kaisha Toshiba Dispositif semi-conducteur à contact par pression et son procédé de fabrication
US5210601A (en) * 1989-10-31 1993-05-11 Kabushiki Kaisha Toshiba Compression contacted semiconductor device and method for making of the same

Also Published As

Publication number Publication date
JPS6269522A (ja) 1987-03-30
IT8621655A0 (it) 1986-09-09
IT1213490B (it) 1989-12-20
JPH079919B2 (ja) 1995-02-01
EP0238665A1 (fr) 1987-09-30

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