WO1986007493A1 - Calibration apparatus for integrated circuits - Google Patents
Calibration apparatus for integrated circuits Download PDFInfo
- Publication number
- WO1986007493A1 WO1986007493A1 PCT/GB1986/000346 GB8600346W WO8607493A1 WO 1986007493 A1 WO1986007493 A1 WO 1986007493A1 GB 8600346 W GB8600346 W GB 8600346W WO 8607493 A1 WO8607493 A1 WO 8607493A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- thin film
- resistive layer
- components
- film components
- test system
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Definitions
- the present invention relates to calibration apparatus for the automated on-wafer testing of integrated circuits and in particular for the automated on-wafer testing of Gallium Arsenide (Ga As) integrated circuits.
- Ga As Gallium Arsenide
- Network analysis in a coaxial or waveguide medium is, conventially, achieved by using a wide range of calibration and verification components.
- a variety of such components e.g. matched load, short circuit, open circuit etc.
- error models for the measurement ports and thus remove the error terms from subsequent measurements.
- This technique is known as 8 to 12 term error and is described in "Error Models " for Systems Measurements", Microwave Journal, May 1978 by J. Fitzpatrick.
- no such components are available for variable geometry microwave probe measurements and furthermore, such components would not permit an automated calibration/test procedure to be achieved, resulting in higher production costs of the devices under test.
- apparatus for calibrating an integrated circuit test system comprising a substrate having a substantially planar array of thin film components formed thereon, at least one of the components having contact pads arranged such that they can be engaged by a coplanar waveguide probe of the integrated circuit test system.
- the substrate may comprise alumina and the thin film components may comprise a resistive layer haying an overlay of metallised conductors.
- the resistive layer may comprise nichrome and the metallised conductors may comprise gold.
- the resistive layer may be deposited to a thickness to provide a sheet resistance of 50.ilper square for the resistive layer.
- low inductance ground connections for the components are provided by via holes containing conductive meterial, such as conductive epoxy or metal.
- the thin film components 1 to 9 are formed on an alumina substrate, typically 1 inch square, with a thin resistive layer - NiCr for example - and plated gold conductors.
- the resistive layer is deposited to a thickness which provides sheet resistance of 50 per square.
- the components 1 to 9 comprise as follows:- (1) 50- ⁇ terminations for alignment check,
- Offset short circuits low inductance short circuits displaced by a length of 50-i2-transmission line;
- the components 1 to 9 achieve low inductance local grounding by the use of via holes which may be filled with conductive material, such as conductive epoxy or metal or a metal plating on the wall of the via holes.
- conductive material such as conductive epoxy or metal or a metal plating on the wall of the via holes.
- the components are arranged to have the same width as the IC to be tested to remove the need for adjustment of the measuring probes between calibration and measurement and to permit auto-stepped execution of the calibration procedure.
- the particular example illustrated is designed for an IC having one input and two output RF ports, but other designs may be used for alternative input/output port combinations.
- Calibration using such a substrate allows the use of error correction under computer control resulting in S-parameter measurements with reference planes at the •probe tips, i.e. the IC RF contact pads. This removes the need for sophisticated but error-prone de-embedding techniques and is particularly valuable in individual IC component element characterisation.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Abstract
Apparatus for calibrating an integrated circuit test system comprises a substrate having a substantially planar array of thin film components (1-9) formed thereon. The components are provided with contact pads which, for each component, have a spacing which enable the components to be engaged by the tip of a coplanar waveguide probe of the test system. Such apparatus permits error correction to be achieved under computer control, resulting in scatter parameter measurements to be made with reference planes at the tips of the probe, obviating the need for sophisticated but error prone de-embedding techniques.
Description
Calibration Apparatus for Integrated Circuits
The present invention relates to calibration apparatus for the automated on-wafer testing of integrated circuits and in particular for the automated on-wafer testing of Gallium Arsenide (Ga As) integrated circuits.
In order to minimise costs and timescales in the production of monolithic microwave integrated circuits, it is desirable to measure the microwave performance of an integrated circuit (IC) on-wafer prior to dicing the wafer into individual chips. A means of transferring the microwave signals from the coaxial media of the test equipments to the coplanar medium of the IC radio frequency connecting pads by low-loss, low voltage standing wave ratio (VS R) probes is described in UK patent application No. 8511169, the contents of which is specifically incorporated herein by reference. The usefulness of such probe systems, however, is dependent on the accuracy of the measurements made and, to minimise errors, it is necessary to obtain a means of calibration for the test eqipment used.
For simple gain and power measurements it is possible to characterise the probes and feeds from the test equipment for insertion loss and use this information to compensate the actual results obtained. For sensitive vector S-parameter (scatter-para eter) measurements, however, a more precise model of the imperfections between
the test equipment and the device under test must be determined.
Network analysis in a coaxial or waveguide medium is, conventially, achieved by using a wide range of calibration and verification components. By measuring a variety of such components, e.g. matched load, short circuit, open circuit etc. , it is possible to construct error models for the measurement ports and thus remove the error terms from subsequent measurements. This technique is known as 8 to 12 term error and is described in "Error Models" for Systems Measurements", Microwave Journal, May 1978 by J. Fitzpatrick. However, no such components are available for variable geometry microwave probe measurements and furthermore, such components would not permit an automated calibration/test procedure to be achieved, resulting in higher production costs of the devices under test.
It is an object of the present invention to provide apparatus for enabling grounded coplanar waveguide calibration of integrated circuit test equipment whereby the grounded coplanar probes used to measure the parameters of an integrated circuit under test can be utilised in the procedure for calibrating the test equipment.
Accordingly there is provided apparatus for calibrating an integrated circuit test system, the apparatus comprising a substrate having a substantially
planar array of thin film components formed thereon, at least one of the components having contact pads arranged such that they can be engaged by a coplanar waveguide probe of the integrated circuit test system.
The substrate may comprise alumina and the thin film components may comprise a resistive layer haying an overlay of metallised conductors.
The resistive layer may comprise nichrome and the metallised conductors may comprise gold.
The resistive layer may be deposited to a thickness to provide a sheet resistance of 50.ilper square for the resistive layer.
Preferably, low inductance ground connections for the components are provided by via holes containing conductive meterial, such as conductive epoxy or metal.
The present invention will now be described by way of example, with reference to the accompanying drawings which illustrates an enlarged schematic plan view of apparatus in accordance with the present invention.
Referring to the drawing, the thin film components 1 to 9 are formed on an alumina substrate, typically 1 inch square, with a thin resistive layer - NiCr for example - and plated gold conductors. The resistive layer is deposited to a thickness which provides sheet resistance of 50 per square. In the example shown the components 1 to 9 comprise as follows:-
(1) 50-Λterminations for alignment check,
(2) Distribution matched loads incorporating pseudo T attenuators; as described by H.J. Finlay et al, "Design and application of precision microstrip multi-octave attenuators and loads' Proc. 6th European Microwave Conference, Rome 1976.
(3) Short circuits;
(4) Through lines; to provide 50-Λ-transmission lines;
(5) 50-Ω-terminations for isolation measurement, to permit termination of both probes used in the IC test procedure simultaneously.
(6) Mismatch terminations;
(7) Offset short circuits; low inductance short circuits displaced by a length of 50-i2-transmission line;
(8) Offset open circuits; low inductance open circuits displaced by a length of 50-Ω_transmission line;
(9) Large test cell to determine sheet resistivity;
The components 1 to 9 achieve low inductance local grounding by the use of via holes which may be filled with conductive material, such as conductive epoxy or metal or a metal plating on the wall of the via holes.
The components are arranged to have the same width as the IC to be tested to remove the need for adjustment
of the measuring probes between calibration and measurement and to permit auto-stepped execution of the calibration procedure. The particular example illustrated is designed for an IC having one input and two output RF ports, but other designs may be used for alternative input/output port combinations.
Calibration using such a substrate allows the use of error correction under computer control resulting in S-parameter measurements with reference planes at the •probe tips, i.e. the IC RF contact pads. This removes the need for sophisticated but error-prone de-embedding techniques and is particularly valuable in individual IC component element characterisation.
Furthermore, the use of integrated calibration components as described above facilitates and enhances the quality of measurements made using the microwave probe system thereby providing a valuable tool in monolithic microwave circuit production.
It can be seen, therefore, that considerable advantages can be achieved with the apparatus of the present invention, leading to low unit cost for the tested IC components..
Although the present invention has been described with respect to a particular embodiment it should be understood that modification may be effected within the scope of the invention.
Claims
1. Apparatus for calibrating an integrated circuit test system, the apparatus comprising a substrate having a substantially planar array of thin film components formed thereon, at least one of the components having contact pads arranged such that they can be engaged by a coplanar waveguide probe of the integrated circuit test system.
2. Apparatus according to claim 1 wherein the substrate comprises alumina and the thin film components comprise a resistive layer having an overlay of metallised conductors.
3. Apparatus according to claim 2 wherein the resistive layer comprises nichrome.
4. Apparatus according to claim 2 or claim 3 wherein the metallised conductors comprise gold.
5. Apparatus according to any one of claims 2 to 4 wherein the resistive layer is arranged to have a thickness for providing a sheet resistance of 50-^2- per square for the resistive layer.
6. Apparatus according to any one of the preceding claims comprising via holes containing electrically conductive material for providing low inductance ground connections for the thin film components of the array.
7. Apparatus according to claim 6 wherein the electrically conductive material comprises conductive epoxy.
8. Apparatus according to claim 6 wherein the electrically conductive material comprises metal.
9. Apparatus according to any one of the preceding claims wherein the thin film components comprise, in any combination, a 5θi-i termination for alignment check, a distribution matched load incorporating a pseudo-T attenuator, a short circuit, a through line for simulating a 50S transmission line, a 50-f2— termination for isolation measurement, a mismatch termination, an offset short circuit, an offset open circuit and a large test cell for determining the sheet resistivity of the apparatus.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8515025 | 1985-06-13 | ||
GB858515025A GB8515025D0 (en) | 1985-06-13 | 1985-06-13 | Calibration apparatus |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1986007493A1 true WO1986007493A1 (en) | 1986-12-18 |
Family
ID=10580709
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/GB1986/000346 WO1986007493A1 (en) | 1985-06-13 | 1986-06-13 | Calibration apparatus for integrated circuits |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0224582A1 (en) |
JP (1) | JPS63500907A (en) |
GB (2) | GB8515025D0 (en) |
WO (1) | WO1986007493A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005043176A2 (en) * | 2003-10-22 | 2005-05-12 | Cascade Microtech, Inc. | Probe testing structure |
US7138813B2 (en) | 1999-06-30 | 2006-11-21 | Cascade Microtech, Inc. | Probe station thermal chuck with shielding for capacitive current |
US7492172B2 (en) | 2003-05-23 | 2009-02-17 | Cascade Microtech, Inc. | Chuck for holding a device under test |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4183859B2 (en) * | 1999-09-02 | 2008-11-19 | 株式会社アドバンテスト | Semiconductor substrate testing equipment |
DE10056882C2 (en) | 2000-11-16 | 2003-06-05 | Infineon Technologies Ag | Method for calibrating a test system for semiconductor components and test substrate |
CN103954927B (en) * | 2014-05-21 | 2016-03-23 | 常州天合光能有限公司 | Volume resistance and square resistance change calibrating installation and calibration steps thereof |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0128986A2 (en) * | 1982-12-23 | 1984-12-27 | Sumitomo Electric Industries Limited | Monolithic microwave integrated circuit and method for selecting it |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4349792A (en) * | 1978-07-14 | 1982-09-14 | Kings Electronics Co., Inc. | Pi pad attenuator |
US4272739A (en) * | 1979-10-18 | 1981-06-09 | Morton Nesses | High-precision electrical signal attenuator structures |
-
1985
- 1985-06-13 GB GB858515025A patent/GB8515025D0/en active Pending
-
1986
- 1986-06-13 EP EP19860904232 patent/EP0224582A1/en not_active Withdrawn
- 1986-06-13 WO PCT/GB1986/000346 patent/WO1986007493A1/en not_active Application Discontinuation
- 1986-06-13 GB GB08614398A patent/GB2184849A/en not_active Withdrawn
- 1986-06-13 JP JP50355186A patent/JPS63500907A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0128986A2 (en) * | 1982-12-23 | 1984-12-27 | Sumitomo Electric Industries Limited | Monolithic microwave integrated circuit and method for selecting it |
Non-Patent Citations (3)
Title |
---|
Microwave Journal, Volume 21, No. 5, May 1978, Dedham (US) J. FITZPATRICK: "Error Models for Systems Measurement" pages 63-66 (cited in the application) * |
New Electronics, Volume 17, No. 6, March 1984, London (GB) S. WENDEL et al.: "High Reliability Substrate Attach for Thin Film Hybrids" pages 97-100 * |
Proceedings of the 6th European Microwave Conference, 1976, Roma (IT) H.J. FINLAY et al.: "Design and Applications of Precision Microstrip Multioctave Attenuators and Loads", pages 692-696 (cited in the application) * |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7138813B2 (en) | 1999-06-30 | 2006-11-21 | Cascade Microtech, Inc. | Probe station thermal chuck with shielding for capacitive current |
US7492172B2 (en) | 2003-05-23 | 2009-02-17 | Cascade Microtech, Inc. | Chuck for holding a device under test |
US7876115B2 (en) | 2003-05-23 | 2011-01-25 | Cascade Microtech, Inc. | Chuck for holding a device under test |
WO2005043176A2 (en) * | 2003-10-22 | 2005-05-12 | Cascade Microtech, Inc. | Probe testing structure |
WO2005043176A3 (en) * | 2003-10-22 | 2005-12-15 | Cascade Microtech Inc | Probe testing structure |
GB2423588A (en) * | 2003-10-22 | 2006-08-30 | Cascade Microtech Inc | Probe testing structure |
US7250626B2 (en) * | 2003-10-22 | 2007-07-31 | Cascade Microtech, Inc. | Probe testing structure |
GB2423588B (en) * | 2003-10-22 | 2007-08-08 | Cascade Microtech Inc | Probe testing structure |
Also Published As
Publication number | Publication date |
---|---|
GB8614398D0 (en) | 1986-07-16 |
GB2184849A (en) | 1987-07-01 |
JPS63500907A (en) | 1988-03-31 |
EP0224582A1 (en) | 1987-06-10 |
GB8515025D0 (en) | 1985-07-17 |
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