UST100402I4 - Method and means for defective bit processing in a fault tolerant bubble storage system - Google Patents

Method and means for defective bit processing in a fault tolerant bubble storage system Download PDF

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Publication number
UST100402I4
UST100402I4 US06/166,718 US16671880A UST100402I4 US T100402 I4 UST100402 I4 US T100402I4 US 16671880 A US16671880 A US 16671880A US T100402 I4 UST100402 I4 US T100402I4
Authority
US
United States
Prior art keywords
byte
bad
bits
bit
accessed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US06/166,718
Inventor
Abraham M. Gindi
Magdi R. Orfali
Arvind M. Patel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Priority to US06/166,718 priority Critical patent/UST100402I4/en
Application granted granted Critical
Publication of UST100402I4 publication Critical patent/UST100402I4/en
Abandoned legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
    • G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

A method and means for modifying up to k bits in each byte of (n+k) bits to be accessed with respect to counterpart minor loops of a sequentially accessed byte-organized major/minor loop memory array. The combination of bad byte location pointers and a byte mask is used to delete bits on bad bytes extracted from the memory or to insert zeroes into defective loop locations when bad bytes are written into the memory. Alternatively, the ith bit in each byte of (n+1) bits to be accessed may be modified through the utilization of the value of the ith bit written into the byte position of n+1st bit, while the ith bit of a defective byte position is zeroed. As a bad byte is extracted, the value of the n+1st bit is substituted for the ith bit. A dense list, rather than a sparse bad byte pointer list, is used.
US06/166,718 1979-08-13 1980-07-07 Method and means for defective bit processing in a fault tolerant bubble storage system Abandoned UST100402I4 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US06/166,718 UST100402I4 (en) 1979-08-13 1980-07-07 Method and means for defective bit processing in a fault tolerant bubble storage system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US6627279A 1979-08-13 1979-08-13
US06/166,718 UST100402I4 (en) 1979-08-13 1980-07-07 Method and means for defective bit processing in a fault tolerant bubble storage system

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US6627279A Continuation 1979-08-13 1979-08-13

Publications (1)

Publication Number Publication Date
UST100402I4 true UST100402I4 (en) 1981-03-03

Family

ID=22068434

Family Applications (1)

Application Number Title Priority Date Filing Date
US06/166,718 Abandoned UST100402I4 (en) 1979-08-13 1980-07-07 Method and means for defective bit processing in a fault tolerant bubble storage system

Country Status (2)

Country Link
US (1) UST100402I4 (en)
JP (1) JPS5847791B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4819205A (en) 1985-03-25 1989-04-04 Motorola, Inc. Memory system having memory elements independently defined as being on-line or off-line

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4819205A (en) 1985-03-25 1989-04-04 Motorola, Inc. Memory system having memory elements independently defined as being on-line or off-line

Also Published As

Publication number Publication date
JPS5847791B2 (en) 1983-10-25
JPS5629886A (en) 1981-03-25

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