US8791726B2 - Controlled resonant power transfer - Google Patents

Controlled resonant power transfer Download PDF

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Publication number
US8791726B2
US8791726B2 US13/733,494 US201313733494A US8791726B2 US 8791726 B2 US8791726 B2 US 8791726B2 US 201313733494 A US201313733494 A US 201313733494A US 8791726 B2 US8791726 B2 US 8791726B2
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Prior art keywords
load capacitance
circuit
clock
clock signal
transmission gate
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Expired - Fee Related
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US13/733,494
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English (en)
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US20140184295A1 (en
Inventor
Anthony R. Bonaccio
Jingdong DENG
Zhenrong Jin
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International Business Machines Corp
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International Business Machines Corp
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Priority to US13/733,494 priority Critical patent/US8791726B2/en
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION reassignment INTERNATIONAL BUSINESS MACHINES CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: BONACCIO, ANTHONY R., DENG, JINGDONG, JIN, ZHENRONG
Priority to CN201410002162.9A priority patent/CN103914584B/zh
Publication of US20140184295A1 publication Critical patent/US20140184295A1/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew

Definitions

  • FIG. 1 shows a circuit diagram for a resonant clock distribution circuit 5 that includes a clock driver 10 , a load capacitance 15 , an inductor 20 , and a decoupling capacitor 25 .
  • the clock driver 10 is associated with a clock signal and provides a supply current (e.g., a clock driver current) to the devices represented by the load capacitance 15 .
  • the load capacitance 15 represents the total capacitance of all clocked devices coupled to the output of the clock driver 10 , e.g., that are driven by the clock driver 10 in the clock distribution network.
  • the inductor 20 is connected in parallel with the load capacitance 15 and is biased at one-half the supply voltage (e.g., VDD/2).
  • FIG. 3 shows a diagram of a circuit 100 that provides resonant-power-transfer-assisted power reduction in differential clocking according to aspects of the invention.
  • the circuit 100 includes a first clock driver 105 (e.g., drive inverter) and a second clock driver 110 (e.g., driver inverter) that provide respective clock signals “C0” and “C180” that are 180° out of phase relative to one another.
  • the circuit 100 also includes a first load capacitance 115 that represents devices (e.g., flip-flops, etc.) that are driven by the first clock driver 105 , and a second load capacitance 120 that represents devices (e.g., flip-flops, etc.) that are driven by the second clock driver 110 .
  • a first transfer path 125 and a second transfer path 130 are connected between the first load capacitance 115 and the second load capacitance 120 .
  • the first transfer path 125 includes a first inductor 135 , a first diode 140 , and a first transmission gate 145 connected in series
  • the second transfer path 130 includes a second inductor 150 , a second diode 155 , and a second transmission gate 160 connected in series.
  • the first transmission gate 145 and the second transmission gate 160 may each comprise a field effect transistors (FET) or any other suitable switch that is capable of selectively opening and closing the respective first transfer path 125 and second transfer path 130 .
  • FET field effect transistors
  • the circuit 100 ′′ includes a dummy load capacitance 400 that temporarily stores and recycles energy for the load capacitance 115 .
  • the dummy load capacitance 400 comprises one or more devices that are structured and arranged to provide a capacitance similar to that of the load capacitance 115 .
  • Machines include, but are not limited to, any machine used in an IC design process, such as designing, manufacturing, or simulating a circuit, component, device, or system.
  • machines may include: lithography machines, machines and/or equipment for generating masks (e.g. e-beam writers), computers or equipment for simulating design structures, any apparatus used in the manufacturing or test process, or any machines for programming functionally equivalent representations of the design structures into any medium (e.g. a machine for programming a programmable gate array).

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Nonlinear Science (AREA)
US13/733,494 2013-01-03 2013-01-03 Controlled resonant power transfer Expired - Fee Related US8791726B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US13/733,494 US8791726B2 (en) 2013-01-03 2013-01-03 Controlled resonant power transfer
CN201410002162.9A CN103914584B (zh) 2013-01-03 2014-01-03 用于受控的谐振功率传输的方法和电路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/733,494 US8791726B2 (en) 2013-01-03 2013-01-03 Controlled resonant power transfer

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US20140184295A1 US20140184295A1 (en) 2014-07-03
US8791726B2 true US8791726B2 (en) 2014-07-29

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CN (1) CN103914584B (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20200007112A1 (en) * 2017-09-25 2020-01-02 Rezonent Corporation Reduced-power electronic circuits with wide-band energy recovery using non-interfering topologies
US11023631B2 (en) * 2017-09-25 2021-06-01 Rezonent Corporation Reduced-power dynamic data circuits with wide-band energy recovery

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106156396B (zh) * 2015-04-24 2019-06-21 中芯国际集成电路制造(上海)有限公司 一种检测晶体振荡器电路是否起振的方法和电路结构
CN106655465B (zh) * 2016-11-07 2023-09-29 珠海格力电器股份有限公司 系统时钟供电装置、方法和电器
CN107678488B (zh) * 2017-11-23 2024-06-07 南京火零信息科技有限公司 一种跨时钟域事件传递的电路

Citations (14)

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US4413313A (en) 1980-10-07 1983-11-01 Texas Instruments Incorporated Electrical inverters
US4833584A (en) * 1987-10-16 1989-05-23 Wisconsin Alumni Research Foundation Quasi-resonant current mode static power conversion method and apparatus
US4931716A (en) * 1989-05-05 1990-06-05 Milan Jovanovic Constant frequency zero-voltage-switching multi-resonant converter
US5126589A (en) 1990-08-31 1992-06-30 Siemens Pacesetter, Inc. Piezoelectric driver using resonant energy transfer
US5508639A (en) * 1995-01-13 1996-04-16 Texas Instruments Incorporated CMOS clock drivers with inductive coupling
US5594635A (en) * 1993-03-30 1997-01-14 Motorola, Inc. Constant frequency, zero-voltage-switching converters with resonant switching bridge
US20040158758A1 (en) 2003-02-10 2004-08-12 Payman Zarkesh-Ha Energy recycling in clock distribution networks using on-chip inductors
US6882182B1 (en) 2003-09-23 2005-04-19 Xilinx, Inc. Tunable clock distribution system for reducing power dissipation
US7145408B2 (en) 2002-01-11 2006-12-05 The Trustees Of Columbia University In The City Of New York Resonant clock distribution for very large scale integrated circuits
US7571410B2 (en) 2003-11-24 2009-08-04 International Business Machines Corporation Resonant tree driven clock distribution grid
US7719317B2 (en) 2006-12-01 2010-05-18 The Regents Of The University Of Michigan Clock distribution network architecture with resonant clock gating
US20110006850A1 (en) 2009-07-10 2011-01-13 Fujitsu Limited Clock signal distributing device
US7872539B1 (en) 2005-05-25 2011-01-18 Athas William C Energy efficient waveform generation using tuned resonators
US7973565B2 (en) * 2007-05-23 2011-07-05 Cyclos Semiconductor, Inc. Resonant clock and interconnect architecture for digital devices with multiple clock networks

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1233086C (zh) * 2003-08-29 2005-12-21 清华大学 一种电荷泵电路

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4413313A (en) 1980-10-07 1983-11-01 Texas Instruments Incorporated Electrical inverters
US4833584A (en) * 1987-10-16 1989-05-23 Wisconsin Alumni Research Foundation Quasi-resonant current mode static power conversion method and apparatus
US4931716A (en) * 1989-05-05 1990-06-05 Milan Jovanovic Constant frequency zero-voltage-switching multi-resonant converter
US5126589A (en) 1990-08-31 1992-06-30 Siemens Pacesetter, Inc. Piezoelectric driver using resonant energy transfer
US5594635A (en) * 1993-03-30 1997-01-14 Motorola, Inc. Constant frequency, zero-voltage-switching converters with resonant switching bridge
US5508639A (en) * 1995-01-13 1996-04-16 Texas Instruments Incorporated CMOS clock drivers with inductive coupling
US7145408B2 (en) 2002-01-11 2006-12-05 The Trustees Of Columbia University In The City Of New York Resonant clock distribution for very large scale integrated circuits
US7082580B2 (en) 2003-02-10 2006-07-25 Lsi Logic Corporation Energy recycling in clock distribution networks using on-chip inductors
US20040158758A1 (en) 2003-02-10 2004-08-12 Payman Zarkesh-Ha Energy recycling in clock distribution networks using on-chip inductors
US6882182B1 (en) 2003-09-23 2005-04-19 Xilinx, Inc. Tunable clock distribution system for reducing power dissipation
US7571410B2 (en) 2003-11-24 2009-08-04 International Business Machines Corporation Resonant tree driven clock distribution grid
US7872539B1 (en) 2005-05-25 2011-01-18 Athas William C Energy efficient waveform generation using tuned resonators
US7719317B2 (en) 2006-12-01 2010-05-18 The Regents Of The University Of Michigan Clock distribution network architecture with resonant clock gating
US7973565B2 (en) * 2007-05-23 2011-07-05 Cyclos Semiconductor, Inc. Resonant clock and interconnect architecture for digital devices with multiple clock networks
US20110210761A1 (en) 2007-05-23 2011-09-01 Ishii Alexander T Resonant Clock And Interconnect Architecture For Digital Devices With Multiple Clock Networks
US20110006850A1 (en) 2009-07-10 2011-01-13 Fujitsu Limited Clock signal distributing device

Non-Patent Citations (4)

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Title
Chan et al, "A Resonant Global Clock Distribution for the Cell Broadband Engine Processor", IEEE Journal of Solid-State Circuits, vol. 44, Issue 1, Jan. 2009, pp. 64-72.
Chan et al., "A Resonant Global Clock Distribution for the Cell Broadband-Engine Processor", IEEE International Solid-State Circuits Conference, ISSCC 2008, Session 28, Non-Volatile Memory & Digital Clocking, Feb. 2008, pp. 512, 513 and 632.
Chan et al., "Resonant Global Clock-Distribution for the Cell Broadband-Engine Processor", IEEE International Solid-State Circuits Conference, 2008, 27 pages.
Sasaki, "A High Frequency Clock Distribution Network Using Inductively Loaded Standing-Wave Oscillators", IEEE Journal of Solid-State Circuits, vol. 44, Issue 10, Oct. 2009, pp. 2800-2807.

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20200007112A1 (en) * 2017-09-25 2020-01-02 Rezonent Corporation Reduced-power electronic circuits with wide-band energy recovery using non-interfering topologies
US11023631B2 (en) * 2017-09-25 2021-06-01 Rezonent Corporation Reduced-power dynamic data circuits with wide-band energy recovery
US11128281B2 (en) * 2017-09-25 2021-09-21 Rezonent Corporation Reduced-power electronic circuits with wide-band energy recovery using non-interfering topologies
US11763055B2 (en) 2017-09-25 2023-09-19 Rezonent Corporation Reduced-power dynamic data circuits with wide-band energy recovery

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CN103914584A (zh) 2014-07-09
CN103914584B (zh) 2017-06-30
US20140184295A1 (en) 2014-07-03

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