US8076214B2 - Display substrate and method of manufacturing the same - Google Patents

Display substrate and method of manufacturing the same Download PDF

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Publication number
US8076214B2
US8076214B2 US12/369,242 US36924209A US8076214B2 US 8076214 B2 US8076214 B2 US 8076214B2 US 36924209 A US36924209 A US 36924209A US 8076214 B2 US8076214 B2 US 8076214B2
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Prior art keywords
light
key
color filter
pattern
substrate
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US20090261333A1 (en
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Sun-Young Chang
Byoung-Joo Kim
Sang-hun Lee
Gwan-Soo KIM
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TCL China Star Optoelectronics Technology Co Ltd
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Samsung Electronics Co Ltd
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Assigned to SAMSUNG ELECTRONICS CO., LTD. reassignment SAMSUNG ELECTRONICS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KIM, BYOUNG-JOO, CHANG, SUN-YOUNG, KIM, GWAN-SOO, LEE, SANG-HUN
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Assigned to SAMSUNG DISPLAY CO., LTD. reassignment SAMSUNG DISPLAY CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SAMSUNG ELECTRONICS CO., LTD.
Assigned to TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD. reassignment TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SAMSUNG DISPLAY CO., LTD.
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133354—Arrangements for aligning or assembling substrates
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/973—Substrate orientation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/975—Substrate or mask aligning feature

Definitions

  • the present invention relates to a display substrate and a method of manufacturing the display substrate. More particularly, the present invention relates to a display substrate used in a liquid crystal display device and a method of manufacturing the display substrate.
  • a liquid crystal display (“LCD”) device typically includes a first substrate having a thin-film transistor (“TFT”) and a pixel electrode, a second substrate facing the first substrate and a liquid crystal layer interposed between the first substrate and the second substrate.
  • TFT thin-film transistor
  • the second substrate generally includes a color filter disposed at a position corresponding to a position of the pixel electrode on the first substrate.
  • the second substrate typically includes a light-blocking pattern formed at a periphery of the color filter between pixel electrodes of a plurality of the pixel electrodes.
  • COA color filter on array
  • a key pattern is first formed on a substrate. Then, a light-blocking layer is formed on the key pattern to cover the key pattern. After the light-blocking layer is formed on the key pattern, an exposure apparatus is aligned above the substrate using the key pattern, and the light-blocking layer is then patterned to form the light-blocking pattern using the exposure apparatus.
  • the exposure apparatus When the exposure apparatus is aligned on the substrate, the position of the key pattern must be accurately detected. To this end, the exposure apparatus may detect a position of the key pattern based on light reflected by the key pattern. However, as the key pattern is covered by the light-blocking layer, a recognition rate of the key pattern by the exposure apparatus is reduced, since the light-blocking layer has a low reflection ratio.
  • Exemplary embodiments of the present invention provide a display substrate having an enhanced recognition rate of a key pattern thereof.
  • Exemplary embodiments of the present invention also provide a method of manufacturing the display substrate having the enhanced recognition rate of the key pattern.
  • a display substrate includes a signal line, a thin-film transistor (“TFT”), a key pattern, a light-blocking pattern and an alignment key.
  • the signal line is formed on a substrate.
  • the TFT is electrically connected to the signal line.
  • the key pattern is formed on the substrate.
  • the light-blocking pattern is formed on the substrate to cover the signal line, the TFT and the key pattern.
  • the alignment key is formed on the light-blocking pattern, and a position of the alignment key on the substrate corresponds to a position of the key pattern on the substrate.
  • the alignment key is an alignment metal part formed on the light-blocking pattern to cover the key pattern.
  • a thickness of the alignment metal part may have a range of approximately 1000 ⁇ to approximately 3,000 ⁇ .
  • the alignment metal part may have reflective properties, e.g., may be configured to reflect light.
  • the alignment key may be an alignment groove formed in the light-blocking pattern to expose the key pattern therethrough.
  • the key pattern may have reflective properties, e.g., may reflect light.
  • the key pattern may include a material substantially the same as a material of a data line of the signal lines.
  • a method of manufacturing a display substrate includes: forming a signal line, a thin-film transistor electrically connected to the signal line, and a key pattern on a substrate; forming a light-blocking layer on the substrate to cover the signal line, the thin-film transistor and the key pattern; forming an alignment key on the light-blocking layer, a position of the alignment key on the light-blocking layer corresponding to a position of the key pattern on the substrate; aligning an exposure apparatus above the substrate using the alignment key; patterning the light-blocking layer using the exposure apparatus to form a light-blocking pattern on the substrate.
  • the alignment key may be an alignment metal part formed on the light-blocking pattern to cover the key pattern. Further, the alignment metal part may be formed on the light-blocking layer by a chemical vapor deposition (“CVD”) repair apparatus.
  • CVD chemical vapor deposition
  • the alignment key may be an alignment groove formed through the light-blocking pattern to expose the key pattern therethrough.
  • the alignment groove may be formed by removing a portion of the light-blocking layer by a laser repair apparatus.
  • the method may further includes forming a color filter in a unit pixel area of the substrate, forming a pixel electrode electrically connected to the thin-film transistor on the color filter.
  • the substrate may include a display area and a peripheral area.
  • the display area may include the signal line, the TFT, the color filter and the pixel electrode formed therein.
  • the peripheral area may substantially surround an outer periphery of the display area.
  • the peripheral area may have the key pattern formed therein.
  • a boundary line between the display area and the peripheral area defines the outer periphery of the display area.
  • the method may further include cutting the substrate along the boundary line.
  • the method may further include forming a plurality of the key patterns on the substrate.
  • the outer periphery of the display area may have a rectangular shape.
  • Key patterns of the plurality of key patterns may have a rectangular shape and may be formed proximate to four opposite corners of the outer periphery of the display area.
  • the key patterns may be formed in the peripheral area.
  • the key patterns may be formed in the display area.
  • the forming the color filter may be performed before the forming the light-blocking layer.
  • the forming the color filter may include forming a color filter layer on the substrate to cover the signal line, the TFT and the key pattern and patterning the color filter layer to form the color filter.
  • the patterning the color filter layer may include aligning a mask on the substrate using the key pattern.
  • the forming the color filter may be performed after the forming light-blocking pattern.
  • the forming the color filter may include: jetting a color filter ink into the unit pixel area on an area of the substrate on which the light-blocking pattern is not formed; and drying the color filter ink to form the color filter.
  • an alignment key is formed on a light-blocking layer covering a key pattern at a position corresponding to the key pattern on a substrate, and an exposure apparatus may thereby accurately detect a position of the key pattern using the alignment key.
  • a recognition rate of the key pattern for the exposure apparatus is substantially enhanced by an alignment metal part formed on the light-blocking layer or, alternatively, an alignment groove formed through the light-blocking layer.
  • FIG. 1 is a plan view illustrating a step for forming a key pattern on a mother substrate in a method for manufacturing a display substrate in accordance with an exemplary embodiment of the present invention
  • FIG. 2 is a partial cross-sectional view taken along line I-I′ of FIG. 1 ;
  • FIG. 3 is a partial cross-sectional view illustrating a thin-film transistor (“TFT”) formed on the mother substrate of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 1 ;
  • TFT thin-film transistor
  • FIG. 4 is a partial cross-sectional view illustrating a step for forming a color filter in a unit pixel of the mother substrate of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 1 ;
  • FIG. 5 is a partial cross-sectional view illustrating a step for forming a light-blocking layer covering the key pattern of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 4 ;
  • FIG. 6 is a partial cross-sectional view illustrating a step for forming an alignment key on the light-blocking layer of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 5 ;
  • FIG. 7 is a partial cross-sectional view illustrating a step for exposing a light-blocking layer using the alignment key of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 6 ;
  • FIG. 8 is a partial cross-sectional view illustrating a step for removing a portion of the light-blocking layer of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 7 ;
  • FIG. 9 is a partial cross-sectional view illustrating a step for forming a pixel electrode on the color filter of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 8 ;
  • FIG. 10 is a plan view illustrating a key pattern disposed in a display area of the mother substrate according to an alternative exemplary embodiment of the present invention.
  • FIG. 11 is a partial cross-sectional view illustrating a step for forming an alignment key on a light-blocking layer in a method for manufacturing a display substrate in accordance with an alternative exemplary embodiment of the present invention
  • FIG. 12 is a partial cross-sectional view illustrating a step for patterning a light-blocking layer by using the alignment key of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 11 ;
  • FIG. 13 is a partial cross-sectional view illustrating a step for forming a color filter in a unit pixel of the mother substrate of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 12 ;
  • FIG. 14 is a partial cross-sectional view illustrating a step for forming a pixel electrode on the color filter of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 13 ;
  • FIG. 15 is a partial cross-sectional view illustrating a step for forming an alignment key on a light-blocking layer in a method for manufacturing a display substrate in accordance with yet another alternative exemplary embodiment of the present invention
  • FIG. 16 is a partial cross-sectional view illustrating a step for patterning a light-blocking layer using the alignment key of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 15 ;
  • FIG. 17 is a partial cross-sectional view illustrating a step for forming a pixel electrode on a color filter of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 16 .
  • first,” “second,” “third” etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
  • Exemplary embodiments of the present invention are described herein with reference to cross section illustrations which are schematic illustrations of idealized embodiments of the present invention. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the present invention should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes which result, for example, from manufacturing. For example, a region illustrated or described as flat may, typically, have rough and/or nonlinear features. Moreover, sharp angles which are illustrated may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the present invention.
  • a key pattern 120 , signal lines and a TFT TR are formed on a mother substrate 100 .
  • the signal lines include a gate line (not shown) and a data line DL.
  • the TFT includes a gate electrode GE, an active pattern AP, an ohmic contact pattern OP, a source electrode SE and a drain electrode DE.
  • the mother substrate 100 includes at least one display area 100 a and a peripheral area 110 b formed in the periphery of the display area 100 a .
  • a boundary line BL divides the display area 100 a from the peripheral area 110 b .
  • the mother substrate 100 includes four display areas 110 a each having a substantially rectangular shape, as shown in FIG. 1 , but alternative exemplary embodiments are not limited thereto.
  • a gate metal layer (not fully shown) is formed on the mother substrate 100 , and then the gate metal layer is patterned to form the gate line (not shown) and the gate electrode GE.
  • a gate insulation layer 110 is formed on the mother substrate 100 to substantially cover the gate line and the gate electrode GE.
  • the gate insulation layer 110 may include silicon oxide (“SiOx”) or silicon nitride (“SiNx”), but alternative exemplary embodiments are not limited thereto.
  • An active layer (not fully shown) and an ohmic contact layer (not fully shown) are then formed on the gate insulation layer 110 , and the active layer and the ohmic contact layer are thereafter patterned to form the active pattern AP and the ohmic contact pattern OP, respectively.
  • the active pattern AP is formed on the gate insulation layer 120 and overlaps at least a portion of the gate electrode GE.
  • the ohmic contact pattern OP is formed on the active pattern AP.
  • the active pattern AP includes amorphous silicon (“a-Si”)
  • the ohmic contact pattern OP includes n+ amorphous silicon (“n+ a-Si”), but alternative exemplary embodiments of the present invention are not limited thereto.
  • n+ a-Si according to an exemplary embodiment, N-type dopants are doped into the n+ amorphous silicon (n+ a-Si) of the ohmic contact pattern OP at a high concentration.
  • a data metal layer (not fully shown) is formed on the gate insulation layer 110 to cover at least a portion of each of the active pattern AP and the ohmic contact pattern OP. Then, the data metal layer is patterned to form the key pattern 120 , the data line DL, the source electrode SE and the drain electrode DE.
  • the key pattern 120 is formed in the peripheral area 100 b of the mother substrate 100 , as shown in FIG. 1 , but alternative exemplary embodiments are not limited thereto, as will be described in further detail below with reference to FIG. 10 .
  • the key pattern 120 is formed at adjacent portions of four opposing peripheral corners of the display area 100 a having the substantially rectangular shape.
  • the key pattern 120 may have a substantially rectangular shape, as viewed in the plan view of FIG. 1 . More specifically, for example, the key pattern 120 according to an exemplary embodiment may have a substantially square shape having sides with lengths of approximately 100 ⁇ m each, but alternative exemplary embodiments are not limited thereto.
  • the data line DL extends along a second direction substantially perpendicular to and crossing the first direction in the display area 100 a of the mother substrate 100 .
  • the active layer, the ohmic contact layer and the data metal layer may be sequentially formed on the gate insulation layer 110 , and then the data metal layer, the active layer and the ohmic contact layer may be patterned through an etch-back process.
  • the color filter layer in an exemplary embodiment of the present invention is patterned using the key pattern 120 at a predetermined position on the mother substrate 100 .
  • a mask of the exposure apparatus is thereafter aligned on the mother substrate 100 corresponding to the key pattern 120 .
  • the color filter 130 may include, for example, a red color filter, a green color filter and a blue color filter. More specifically, in an exemplary embodiment of the present invention, a red color filter layer is formed, and then the red color filter layer is patterned to form the red color filter. Then, a green color filter layer is formed on the entire surface of the resultant structure including the red color filter, and then the green color filter layer is patterned to form the green color filter. Then, a blue color filter layer is formed on the entire surface of the resultant structure including the red color filter and the green color filter, and then the blue color filter layer is patterned to form the blue color filter.
  • the light-blocking layer key pattern may be omitted.
  • the light-blocking layer key pattern is omitted, at least one of the red, green and blue color key patterns functions as the omitted light-blocking layer key pattern.
  • the green color key pattern may perform the function of the light-blocking layer key pattern when the light-blocking layer key pattern is not included.
  • FIG. 5 is a partial cross-sectional view illustrating a step for forming a light-blocking layer covering the key pattern 120 of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 4 .
  • a light-blocking layer 140 is formed on the gate insulation layer 110 to cover at least a portion of the key pattern 120 , the data line DL, the color filter 130 and the TFT TR.
  • the light-blocking layer 140 includes a negative photoresist material. More specifically, for example, the light-blocking layer 140 according to an exemplary embodiment may include a solvent material, a binder material, an initiator material and a monomer material, but alternative exemplary embodiments of the present invention are not limited thereto.
  • the solvent material may have a property which promotes gasification
  • the binder material may be a material which forms a main structure of the light-blocking layer 140
  • the initiator material may have properties which cause reactions with the monomer material when light is irradiated thereon, and the monomer material may thereby form chains between materials of the binder material when reacting with the initiator material.
  • the monomer material forms a chain between the binder materials, curing the binder material to form the light-blocking layer 140 .
  • the light-blocking layer 140 includes carbon black, for example, which blocks light transmission through the light-blocking layer 140 .
  • an optical density of the light-blocking layer 140 according to an exemplary embodiment is greater than approximately four (4), for example.
  • FIG. 6 is a partial cross-sectional view illustrating a step for forming an alignment key on the light-blocking layer 140 of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 5 .
  • an alignment key 150 is formed on the light-blocking layer 140 to correspond with a position of the key pattern 120 .
  • the alignment key 150 may be an alignment metal part 150 formed on the light-blocking layer 140 to cover at least a portion of the key pattern 120 .
  • the alignment metal part 150 may have a size sufficient to fully cover the key pattern 120 , as shown in FIG. 6 .
  • a thickness of the alignment metal part 150 according to an exemplary embodiment may be in a range from approximately 1,000 ⁇ to approximately 3,000 ⁇ .
  • the alignment metal part 150 includes a reflective property.
  • the alignment metal part 150 according to an exemplary embodiment of the present invention may include aluminum (Al) and/or molybdenum (Mo), but alternative exemplary embodiments are not limited thereto.
  • the alignment metal part 150 is formed on the light-blocking layer 140 with a chemical vapor deposition (“CVD”) repair apparatus 200 , as shown in FIG. 6 .
  • the CVD repair apparatus 200 is an apparatus which deposits a metal material, for example, at a predetermined position on the mother substrate 100 using a CVD process or method.
  • the CVD repair apparatus 200 may be a laser CVD repair apparatus 200 which deposits a metal material on a portion of the mother substrate 100 onto which a laser beam 205 is irradiated thereon.
  • FIG. 7 is a partial cross-sectional view illustrating a step for exposing the light-blocking layer 140 using the alignment key 150 of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 6 .
  • an exposure apparatus 300 is aligned on the mother substrate 100 using the alignment key 150 , and then the light-blocking layer 140 is exposed by using the exposure apparatus 300 .
  • the exposure apparatus 300 includes a light-generating part 310 which generates light 315 and a mask 320 disposed below the light-generating part 310 , e.g., disposed between the mother substrate 100 and the light-generating part 310 .
  • the light 315 generated by the light-generating part 310 includes ultraviolet (“UV”) rays or, alternatively, infrared (“IR”) rays.
  • the mask 320 may include a light-blocking area 322 blocking light 315 and a light-transmitting area 324 transmitting the light 315 therethrough.
  • the exposure apparatus 300 senses the light 315 reflected by the alignment key 150 to detect a position of the alignment key 150 on the mother substrate 100 , and a position of the key pattern 120 may thereby be indirectly detected. Thus, the exposure apparatus 300 aligns the mask 320 above the mother substrate 100 based on the position of the alignment key 150 sensed by the exposure apparatus 300 .
  • the mask 320 is aligned above the mother substrate 100 , and the light-generating part 310 then generates the light 315 .
  • the light 315 generated from the light-generating part 310 transmits through the light-transmitting area 324 of the mask 320 to expose a portion of the light-blocking layer 140 .
  • the light-blocking layer 140 is a negative photoresist type, and a portion of the light-blocking layer 140 is thereby cured.
  • FIG. 8 is a partial cross-sectional view illustrating a step for removing a portion of the light-blocking layer 140 of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 7 .
  • a portion of the light-blocking layer 140 not cured by the light 315 is removed using an etching solution, for example, to form a light-blocking pattern 142 .
  • the light-blocking pattern 142 covers the data line DL ( FIG. 8 ), the gate line and the TFT TR ( FIG. 3 ).
  • a contact hole (not shown) is formed through the light-blocking pattern 142 .
  • the contact hole exposes a portion of the drain electrode DE of the TFT TR.
  • the light-blocking pattern 142 may be formed at a peripheral edge portion of the color filter 130 , as shown in FIG. 8 .
  • FIG. 9 is a partial cross-sectional view illustrating a step for forming a pixel electrode on the color filter 130 of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 8 .
  • a transparent electrode layer (not fully shown) is formed on the gate insulation layer 110 to cover the light-blocking pattern 142 and the color filter 130 . Then, the transparent electrode layer is patterned to form a pixel electrode 160 .
  • the pixel electrode 160 is formed on the color filter 130 , as shown in FIG. 9 .
  • the pixel electrode 160 according to an exemplary embodiment of the present invention may be formed at a peripheral edge portion of the light-blocking pattern 142 .
  • the pixel electrode 160 is electrically connected to the drain electrode DE ( FIG. 3 ) through the contact hole (not shown) formed through the light-blocking pattern 142 .
  • an alignment layer (not shown) may be formed on the gate insulation layer 110 to cover the pixel electrode 160 and the light-blocking pattern 142 .
  • the boundary line BL ( FIG. 1 ) between the display area 100 a and the peripheral area 110 b is then cut to form a display substrate having the display area 100 a.
  • FIG. 10 is a plan view illustrating the key pattern 120 disposed in a display area of a mother substrate of according to an alternative exemplary embodiment of the present invention.
  • the key pattern 120 may be disposed within the display area 100 a of the mother substrate 100 . More specifically, for example, the key pattern 120 according to an exemplary embodiment may be formed at adjacent portions of four opposite peripheral corners of the display area 100 a , as shown in FIG. 10 .
  • the display area 100 a according to an exemplary embodiment of the present invention has a substantially rectangular shape, but alternative exemplary embodiments are not limited thereto.
  • the key pattern 120 includes substantially the same material as the data line DL.
  • the display substrate according to an exemplary embodiment of the present invention includes the alignment key 150 disposed to cover the key pattern 120 formed on the gate insulation layer 110 and the key pattern 120 formed on the light-blocking pattern 142 .
  • FIG. 11 is a partial cross-sectional view illustrating a step for forming an alignment key on a light-blocking layer in a method for manufacturing a display substrate in accordance with an alternative exemplary embodiment of the present invention.
  • Steps, methods, and/or processes for forming a gate insulation layer, a key pattern, a signal line and a TFT of a display substrate according to an exemplary embodiment of the present invention are substantially the same as described in greater detail above with reference to FIGS. 1 to 10 , and thus any repetitive detailed explanation will hereinafter be omitted. Likewise, the same reference characters refer to the same or like components.
  • a gate insulation layer 110 , a key pattern 120 , a signal line and a TFT TR are formed on a mother substrate 100 .
  • the signal line may include a gate line (not shown) and a data line DL.
  • a light-blocking layer 140 is formed on the gate insulation layer 110 to cover at least a portion of the key pattern 120 , the data line DL and the TFT TR.
  • the light-blocking layer 140 includes carbon black which blocks light.
  • an optical density of the light-blocking layer 140 may be greater than approximately four (4).
  • an alignment key 150 is formed on the light-blocking layer 140 at a position which corresponds with the key pattern 120 on the mother substrate 100 .
  • the alignment key 150 may be an alignment metal part 150 formed on the light-blocking layer 140 to cover the key pattern 120 .
  • the alignment metal part 150 according to an exemplary embodiment has a size which is sufficient to fully cover the key pattern 120 , as shown in FIG. 11 .
  • a thickness of the alignment metal part 150 in an exemplary embodiment is in a range from approximately 1,000 ⁇ to approximately 3,000 ⁇ . Further, the alignment metal part 150 may have reflective properties.
  • the alignment metal part 150 according to an exemplary embodiment of the present invention may include aluminum (Al) and/or molybdenum (Mo), for example, but alternative exemplary embodiments are not limited thereto.
  • the alignment metal part 150 is formed on the light-blocking layer 140 using a CVD repair apparatus 200 ( FIG. 6 ).
  • the CVD repair apparatus 200 may be, for example, a laser CVD repair apparatus 200 which deposits a metal material on a portion of the mother substrate 100 on which a laser beam 205 is thereafter irradiated onto.
  • FIG. 12 is a partial cross-sectional view illustrating a step for patterning the light-blocking layer 140 using the alignment key 120 of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 11 .
  • an exposure apparatus 300 ( FIG. 7 ) is aligned on the mother substrate 100 using the alignment key 150 , and then the light-blocking layer 140 is exposed by using the exposure apparatus 300 .
  • the exposure apparatus 300 may include a light-generating part 310 generating light 315 and a mask 320 disposed below the light-generating part 310 , as described in further detail above.
  • the mask 320 may include a light-blocking area 322 which blocks the light 315 and a light-transmitting area 322 which transmits the light 315 therethrough.
  • the exposure apparatus 300 senses the light 315 reflected by the alignment key 150 to detect a position of the alignment key 150 , and a position of the key pattern 120 may thereby be indirectly detected.
  • the exposure apparatus 300 accurately aligns the mask 320 above the mother substrate 100 based on the position of the alignment key 150 sensed by the exposure apparatus 300 .
  • the mask 320 is accurately aligned above the mother substrate 100 , and the light-generating part 310 then generates the light 315 .
  • the light 315 generated from the light-generating part 310 transmits through the light-transmitting area 324 of the mask 320 to expose and cure a portion of the light-blocking layer 140 .
  • a portion of the light-blocking layer 140 which is not cured is removed using an etching solution, for example to form a light-blocking pattern 142 .
  • the light-blocking pattern 142 covers the data line DL, the gate line and the TFT TR ( FIG. 3 ).
  • a contact hole (not shown) may be formed through the light-blocking pattern 142 , to expose the drain electrode DE of the TFT TR therethrough.
  • FIG. 13 is a partial cross-sectional view illustrating a step for forming a color filter in a unit pixel of the mother substrate 100 of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 12 .
  • a color filter ink 144 is jetted onto the gate insulation layer 110 that the light-blocking pattern 142 is not formed.
  • the color filter ink 144 may be formed, by jetting, within a unit pixel in which the light-blocking pattern 142 is not formed, as shown in FIG. 13 .
  • the color filter ink 144 does not be mix with a color filter ink 144 outside the light-blocking pattern 142 , e.g., in an adjacent unit pixel of the mother substrate 100 .
  • a surface of the light-blocking pattern 142 includes a hydrophobic property.
  • affinity of the surface of the light-blocking pattern 142 with the color filter ink 144 is low.
  • a plasma process is performed on the light-blocking pattern 142 before the color filter ink 144 is jetted, to provide the surface of the light-blocking pattern 142 with the hydrophobic property.
  • the color filter ink 144 is dried to form a color filter 130 .
  • a cross-sectional thickness of the color filter ink 144 decreases to form the color filter 130 .
  • the thickness of the color filter 130 is decreased to be substantially equal to a cross-sectional thickness of the light-blocking pattern 142 , as shown in FIG. 13 .
  • an upper peripheral surface of the color filter ink 144 is planarized.
  • the upper peripheral surface of the color filter 130 is planarized.
  • FIG. 14 is a partial cross-sectional view illustrating a step for forming a pixel electrode on the color filter 130 of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 13 .
  • a transparent electrode layer (not fully shown) is formed on the gate insulation layer 110 to cover the light-blocking pattern 142 and the color filter 130 , and then the transparent electrode layer is thereafter patterned to form a pixel electrode 160 .
  • the pixel electrode 160 is formed on the color filter 130 .
  • the pixel electrode 160 contacts the drain electrode DE ( FIG. 3 ) through the contact hole formed through the light-blocking pattern 142 .
  • an alignment layer (not shown) may be formed on the gate insulation layer 110 to cover the pixel electrode 160 and the light-blocking pattern 142 .
  • the boundary line BL ( FIG. 1 ) between the display area 100 a and the peripheral area 110 b is then cut to form the display substrate having the display area 100 a according to an exemplary embodiment of the present invention.
  • the key pattern 120 may be disposed within the display area 100 a of the mother substrate 100 , as described in greater detail above.
  • the key pattern 120 remains within the display substrate when the boundary line BL between the display area 100 a and the peripheral area 110 b is cut to form the display substrate according to an exemplary embodiment of the present invention.
  • the display substrate includes the alignment key 150 disposed to cover the key pattern 120 formed on the gate insulation layer 110 and the key pattern 120 formed on the light-blocking pattern 142 .
  • FIG. 15 is a partial cross-sectional view illustrating a step for forming an alignment key on a light-blocking layer in a method for manufacturing a display substrate in accordance with another exemplary embodiment of the present invention.
  • Steps, methods, and/or processes for forming a gate insulation layer, a key pattern, a signal line and a TFT of a display substrate according to an exemplary embodiment of the present invention are substantially the same as described in greater detail above with reference to FIGS. 1 to 14 , and thus any repetitive detailed explanation will hereinafter be omitted. Likewise, the same reference characters refer to the same or like components.
  • a gate insulation layer 110 a key pattern 120 , signal lines and a TFT TR ( FIG. 3 ) are formed on a mother substrate 100 .
  • the signal lines include a gate line (not shown) and a data line DL.
  • a color filter layer (not fully shown) is formed on the gate insulation layer 110 to cover the key pattern 120 , the data line DL and the TFT TR.
  • the color filter layer is then patterned to form a color filter 130 .
  • the color filter 130 is formed within a unit pixel of the display area 100 a ( FIGS. 1 and 10 ) of the mother substrate 100 .
  • the color filter layer according to an exemplary embodiment includes a negative photoresist material.
  • the color filter layer is patterned using the key pattern 120 at a predetermined position on the mother substrate 100 .
  • a mask 320 of the exposure apparatus 300 is accurately aligned on the mother substrate 100 using the key pattern 120 .
  • a light-blocking layer 140 is formed on the gate insulation layer 110 to cover the key pattern 120 , the data line DL, the color filter 130 and the TFT TR.
  • the light-blocking layer 140 includes a negative photoresist material.
  • the light-blocking layer 140 further includes carbon black which blocks light.
  • an optical density of the light-blocking layer 140 according to an exemplary embodiment of the present invention is greater than approximately four (4).
  • an alignment key 150 is formed on the light-blocking layer 140 to correspond to a position of the key pattern 120 on the mother substrate 100 .
  • the alignment key 150 is an alignment groove 150 formed through the light-blocking layer 140 which covers the key pattern 120 .
  • the alignment groove 150 has size which is sufficient to fully cover the key pattern 120 , as shown in FIG. 15 .
  • the alignment groove 150 may be formed by removing a portion of the light-blocking layer 140 by laser repair apparatus 400 .
  • the laser repair apparatus 400 denotes an apparatus from which a laser beam 405 is irradiated to a silicon layer, a metal wiring, etc., to remove a portion of the silicon layer and the metal wiring.
  • the key pattern 120 is not damaged by the laser repair apparatus 400 , when the alignment groove 150 is formed.
  • FIG. 16 is a partial cross-sectional view illustrating a step for patterning a light-blocking layer using the alignment groove 150 of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 15 .
  • an exposure apparatus 300 ( FIG. 7 ) is aligned on the mother substrate 100 using the key pattern 120 exposed by the alignment groove 150 , and then the light-blocking layer 140 is exposed by using the exposure apparatus 300 .
  • the exposure apparatus 300 may include a light-generating part 310 which generates light 315 and the mask 320 disposed below the light-generating part 310 .
  • the mask 320 may include a light-blocking area 322 which blocks the light 315 and a light-transmitting area 324 which transmits the light 315 therethrough.
  • the exposure apparatus 300 senses the light 315 reflected by the key pattern 120 exposed by the alignment groove 150 to detect a position of the key pattern 120 . As a result, a position of the key pattern 120 is accurately detected. Thus, the exposure apparatus 300 aligns the mask 320 above the mother substrate 100 based on the position of the alignment key 150 detected by the exposure apparatus 300 .
  • the mask 320 is aligned on the mother substrate 100 , and then the light-generating part 310 generates the light 315 .
  • the light 315 generated from the light-generating part 310 transmits through the light-transmitting area 320 to expose a portion of the light-blocking layer 140 , thereby curing it.
  • a portion of the light-blocking layer 140 not cured is removed by using an etching solution, for example, to form a light-blocking pattern 142 .
  • the light-blocking pattern 142 covers the data line DL, the gate line and the TFT TR ( FIG. 3 ).
  • a contact hole (not shown) which exposes the drain electrode DE of the TFT TR may be formed through the light-blocking pattern 142 .
  • the light-blocking pattern 142 according to an exemplary embodiment of the present invention may be formed at a peripheral edge portion of the color filter 130 , as shown in FIG. 16 .
  • FIG. 17 is a partial cross-sectional view illustrating a step for forming a pixel electrode on a color filter of the display substrate according to the exemplary embodiment of the present invention shown in FIG. 16 .
  • a transparent electrode layer (not fully shown) is formed on the gate insulation layer 110 to cover the light-blocking pattern 142 and the color filter 130 , and then the transparent electrode layer is patterned to form a pixel electrode 160 .
  • the pixel electrode 160 may be formed on the color filter 130 , and the pixel electrode 160 may be formed at a peripheral edge portion of the light-blocking pattern 142 , as shown in FIG. 17 . Further, the pixel electrode 160 according to an exemplary embodiment of the present invention is electrically connected to the drain electrode DE ( FIG. 3 ) through the contact hole formed through the light-blocking pattern 142 .
  • an alignment layer (not shown) is formed on the gate insulation layer 110 to cover the pixel electrode 160 and the light-blocking pattern 142 .
  • the boundary line BL between the display area 100 a and the peripheral area 110 b is cut to form the display substrate having the display area 100 a according to an exemplary embodiment of the present invention.
  • the color filter 130 is formed before the light-blocking layer 140 is formed.
  • a color filter ink 144 may be jetted to form the color filter 130 after the light-blocking pattern 142 is formed.
  • the key pattern 120 of an exemplary embodiment is thereby disposed within the display area 100 a of the mother substrate 100 .
  • the key pattern 120 remains within the display area 100 a when the boundary line BL between the display area 100 a and the peripheral area 110 b is cut to form the display substrate according to an exemplary embodiment of the present invention.
  • the display substrate includes the key pattern 120 formed on the gate insulation layer 110 and the light-blocking pattern 142 including the alignment key 150 exposing the key pattern 120 therethrough.
  • the alignment key 150 in an exemplary embodiment of the present invention is an alignment groove 150 formed through the light-blocking pattern 142 , as described above.
  • the key pattern 120 may have reflective properties to be detected by the exposure apparatus 300 through the alignment groove 150 .
  • an exposure apparatus 300 when the alignment key 150 is formed on a light-blocking layer 140 covering a key pattern 120 at a position corresponding to the key pattern 120 , an exposure apparatus 300 accurately detects a position of the key pattern 120 through the alignment key 150 .
  • an alignment key 150 e.g., and alignment metal part 150
  • the exposure apparatus 300 detects the light 315 reflected by the key pattern 120 exposed by the alignment metal part 150 or, alternatively, the alignment groove 150 , so that the position of the key pattern 120 is accurately detected.
  • a display substrate and manufacturing method the same according to an exemplary embodiment of the present invention have advantages which include, but are not limited to, an enhanced recognition rate of the key pattern 120 thereon.

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KR20130027188A (ko) * 2011-09-07 2013-03-15 삼성디스플레이 주식회사 표시 장치 및 그 제조 방법
CN104297995A (zh) * 2014-11-03 2015-01-21 合肥鑫晟光电科技有限公司 显示基板及制备方法、显示装置
KR102294311B1 (ko) * 2014-12-24 2021-08-26 엘지디스플레이 주식회사 유기발광표시패널 및 유기발광표시장치
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CN107505752B (zh) * 2017-09-14 2020-07-03 武汉华星光电技术有限公司 一种基板处理方法及液晶显示器
CN109116604B (zh) * 2018-09-11 2021-05-11 Tcl华星光电技术有限公司 混切制作显示面板的方法、显示面板
CN110716359A (zh) * 2019-10-14 2020-01-21 深圳市华星光电技术有限公司 阵列基板及其制造方法与对准精度检测方法
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