US7257669B2 - Method for addressing a memory card, a system using a memory card, and a memory card - Google Patents

Method for addressing a memory card, a system using a memory card, and a memory card Download PDF

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Publication number
US7257669B2
US7257669B2 US10/770,852 US77085204A US7257669B2 US 7257669 B2 US7257669 B2 US 7257669B2 US 77085204 A US77085204 A US 77085204A US 7257669 B2 US7257669 B2 US 7257669B2
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United States
Prior art keywords
memory card
memory
parameter
address
card
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Ceased, expires
Application number
US10/770,852
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English (en)
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US20040225860A1 (en
Inventor
Marko Ahvenainen
Kimmo Mylly
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Memory Technologies LLC
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Nokia Oyj
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First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=8565569&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=US7257669(B2) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Nokia Oyj filed Critical Nokia Oyj
Assigned to NOKIA CORPORATION reassignment NOKIA CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: AHVENAINEN, MARKO, MYLLY, KIMMO
Publication of US20040225860A1 publication Critical patent/US20040225860A1/en
Application granted granted Critical
Publication of US7257669B2 publication Critical patent/US7257669B2/en
Assigned to MEMORY TECHNOLOGIES LLC reassignment MEMORY TECHNOLOGIES LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NOKIA INC.
Assigned to NOKIA INC. reassignment NOKIA INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NOKIA CORPORATION
Priority to US13/902,258 priority Critical patent/USRE45486E1/en
Ceased legal-status Critical Current
Adjusted expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1694—Configuration of memory controller to different memory types
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7206—Reconfiguration of flash memory system
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • the operation is as follows.
  • the basic address is subtracted from the storage address, after which the difference is divided by the sector size READ_BL_LEN, which provides the address of that sector to which the data on the memory card 13 is to be stored.
  • the data of the sector in question is read from the memory card 13 in device 1 , for example, to the buffer memory, if they are not already read in the device 1 .
  • the value of that memory location, which is supposed to be changed with the memory card 13 is set in the buffer memory to the desired value.
  • the address of this memory location is clarified on the basis of the remainder of said division.
  • the memory cards 13 according to the invention are downwards compatible with the memory cards according to prior art.
  • the memory cards function, from the point of view of the device, as memory cards according to prior art.
  • a part of the memory capacity of the memory cards remains unutilized. Let us illustrate this further with an example. Let us assume that the memory card is a memory card according to the first advantageous embodiment of the invention, where an entire sector can be addressed with one address. However, the device assumes that each address addresses one memory location, even though the data transfer as such would take place as larger assemblies. Thus, each data (byte) is stored in the memory card in the first memory location of the sector. The next data is stored in the first memory location of the next sector, etc.
US10/770,852 2003-02-07 2004-02-02 Method for addressing a memory card, a system using a memory card, and a memory card Ceased US7257669B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US13/902,258 USRE45486E1 (en) 2003-02-07 2013-05-24 Method for addressing a memory card, a system using a memory card, and a memory card

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI20030191A FI117489B (fi) 2003-02-07 2003-02-07 Menetelmä muistikortin osoittamiseksi, muistikorttia käyttävä järjestelmä, ja muistikortti
FI20030191 2003-02-07

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US13/902,258 Reissue USRE45486E1 (en) 2003-02-07 2013-05-24 Method for addressing a memory card, a system using a memory card, and a memory card

Publications (2)

Publication Number Publication Date
US20040225860A1 US20040225860A1 (en) 2004-11-11
US7257669B2 true US7257669B2 (en) 2007-08-14

Family

ID=8565569

Family Applications (2)

Application Number Title Priority Date Filing Date
US10/770,852 Ceased US7257669B2 (en) 2003-02-07 2004-02-02 Method for addressing a memory card, a system using a memory card, and a memory card
US13/902,258 Active 2025-08-01 USRE45486E1 (en) 2003-02-07 2013-05-24 Method for addressing a memory card, a system using a memory card, and a memory card

Family Applications After (1)

Application Number Title Priority Date Filing Date
US13/902,258 Active 2025-08-01 USRE45486E1 (en) 2003-02-07 2013-05-24 Method for addressing a memory card, a system using a memory card, and a memory card

Country Status (5)

Country Link
US (2) US7257669B2 (fi)
EP (3) EP3040867B1 (fi)
ES (1) ES2445820T3 (fi)
FI (1) FI117489B (fi)
WO (1) WO2004075065A1 (fi)

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US20070011096A1 (en) * 2005-06-24 2007-01-11 Samsung Electronics Co., Ltd. Method and apparatus for managing DRM rights object in low-performance storage device
US10055343B2 (en) 2015-12-29 2018-08-21 Memory Technologies Llc Memory storage windows in a memory system

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FI117489B (fi) * 2003-02-07 2006-10-31 Nokia Corp Menetelmä muistikortin osoittamiseksi, muistikorttia käyttävä järjestelmä, ja muistikortti
US7199603B2 (en) * 2004-07-30 2007-04-03 Microchip Technology Incorporated Increment/decrement, chip select and selectable write to non-volatile memory using a two signal control protocol for an integrated circuit device
US7386700B2 (en) * 2004-07-30 2008-06-10 Sandisk Il Ltd Virtual-to-physical address translation in a flash file system
KR100746289B1 (ko) 2005-07-11 2007-08-03 삼성전자주식회사 메모리 용량 정보를 갱신하는 비휘발성 메모리 카드 장치및 방법
US8307180B2 (en) 2008-02-28 2012-11-06 Nokia Corporation Extended utilization area for a memory device
US8874824B2 (en) 2009-06-04 2014-10-28 Memory Technologies, LLC Apparatus and method to share host system RAM with mass storage memory RAM
WO2011106049A1 (en) 2010-02-23 2011-09-01 Rambus Inc. Time multiplexing at different rates to access different memory types
US9417998B2 (en) 2012-01-26 2016-08-16 Memory Technologies Llc Apparatus and method to provide cache move with non-volatile mass memory system
US9311226B2 (en) 2012-04-20 2016-04-12 Memory Technologies Llc Managing operational state data of a memory module using host memory in association with state change

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US6791557B2 (en) * 2001-02-15 2004-09-14 Sony Corporation Two-dimensional buffer pages using bit-field addressing
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Cited By (2)

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Publication number Priority date Publication date Assignee Title
US20070011096A1 (en) * 2005-06-24 2007-01-11 Samsung Electronics Co., Ltd. Method and apparatus for managing DRM rights object in low-performance storage device
US10055343B2 (en) 2015-12-29 2018-08-21 Memory Technologies Llc Memory storage windows in a memory system

Also Published As

Publication number Publication date
FI20030191A (fi) 2004-10-11
US20040225860A1 (en) 2004-11-11
FI117489B (fi) 2006-10-31
FI20030191A0 (fi) 2003-02-07
ES2445820T3 (es) 2014-03-05
EP3040867B1 (en) 2018-07-18
EP3040867A1 (en) 2016-07-06
EP2664992B1 (en) 2016-01-27
EP2664992A2 (en) 2013-11-20
EP1590739A1 (en) 2005-11-02
EP2664992A3 (en) 2014-03-19
EP1590739B1 (en) 2013-11-20
USRE45486E1 (en) 2015-04-21
WO2004075065A1 (en) 2004-09-02

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