US4743096A - Liquid crystal video display device having pulse-width modulated "ON" signal for gradation display - Google Patents
Liquid crystal video display device having pulse-width modulated "ON" signal for gradation display Download PDFInfo
- Publication number
- US4743096A US4743096A US07/008,894 US889487A US4743096A US 4743096 A US4743096 A US 4743096A US 889487 A US889487 A US 889487A US 4743096 A US4743096 A US 4743096A
- Authority
- US
- United States
- Prior art keywords
- liquid crystal
- selected period
- pulse
- display device
- electrodes
- Prior art date
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- Expired - Lifetime
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Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/367—Control of matrices with row and column drivers with a nonlinear element in series with the liquid crystal cell, e.g. a diode, or M.I.M. element
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
Definitions
- the present invention relates to video display devices. More particularly, the invention relates to liquid crystal display devices which are capable of video displays in which each element of the display is connected in series with a non-linear element.
- non-linear elements are disposed between either the liquid crystal material and the column electrodes or the liquid crystal material and the row electrodes to improve the behavior of the display when it is driven. Active matrices including such non-linear elements are described in the following publications:
- FIG. 3 the common line driving waveform C and the data line driving waveform D of Japanese Laid Open Application No. 57273/84 are shown. These waveforms drive the common line and the data line in the same manner as that in conventional time-sharing driving, which is also known as high duty-cycle driving in liquid crystal display.
- the cross-hatched portion of waveform C-D shows the voltage which is applied to the liquid crystal layer.
- FIG. 2 shows how the threshold voltage (V th ) is the turning point in the voltage-current characteristic of the series PI diode at which the current increases sharply. Use of the diode assures that the effective voltage applied to the liquid crystal layer during non-selected periods is extremely low, whereby the ON-signal to OFF-signal ratio of the liquid crystal material is improved to obtain high contrast.
- the pulse width of the ON-signal in the selected period is controlled by gray-scale data, that is, the width of the pulse is modulated.
- An example of a conventional data-line driving circuit is shown in FIG. 4 and a chart showing timing of the voltages in the driving circuit is shown in FIG. 5, where a selected time period T corresponds to pulse widths 301 and 302 of FIG. 3.
- a counter 401 (FIG. 4) counts sixteen clock signals f while outputting binary signals Q 0 to Q 3 .
- a grayscale reference pulse-forming circuit 405 decodes the binary signals Q 0 to Q 3 and, in response thereto, generates gray scale reference pulses P 0 to P 3 (FIG. 5).
- gray scale reference pulses P 0 , P 1 , and P 3 stand for 1/f, 2/f, 4/f, and 8/f.
- Memory 402 stores digital data which has been converted from analog gray-scale data. In the known circuit, memory 402 has a capacity of four bits.
- the signals M 0 -M 3 from memory 402 and P 0 -P 3 from gray-scale reference pulse forming circuit 405 are respectively coupled to four AND gates 403', where they are multiplied.
- each AND gate 403' is fed to an input of multiple-OR-gate 403, which sums the multiplied signals and as shown in FIG. 5, provides selected signals of sixteen levels of duty cycle in dependence on the data stored in memory 402.
- a pair of gates 404 are controlled by theoutput of gate 403 in normal or in inverted form for transmission as an ON voltage, V ON , or an OFF voltage, V OFF , to a row electrode as a data line driving signal.
- FIG. 6 is a symbolic representation of the structure of a picture element in an active-matrix liquid crystal display which has non-linear elements, depicting a non-linear element 603 and a layer of liquid crystal material 604 as connected in series at the intersection of a row electrode 601 and a column electrode 602.
- the voltages which appear across non-linear element 603 and liquid crystal layer 604 are hereinafter referred to as V NL to V LC , respectively.
- V NL to V LC the voltage which appears across two-terminal non-linear element 603 and liquid crystal layer 604 is shown in FIG. 7.
- the gray scale data signal (M 0 , M 1 , M 2 , M 3 ) is (0, 1, 0, 1).
- the liquid crystal layer is charged by a large flow of current during the periods t 0 and t 1 . Since V NL is large, V LC increases rapidly. However, during OFF period t 2 , even though V NL is reduced, the liquid crystal layer is not discharged, since V NL remains less than V th . Accordingly, V LC remains substantially level. In period t 3 , V NL is again increased and V LC increases, stopping at the level where V NL is equal to V th .
- the present invention solves the above problem in an improved liquid crystal video display having two substrates which respectively carry column electrodes and row electrodes, a layer of liquid crystal material therebetween and contacting the electrodes, and a plurality of non-linear elements on one of the substrates.
- Each non-linear element is located at a crossing of a column electrode and a row electrode and, together with a portion of the liquid crystal, provides a display-forming element.
- the elements are driven by pulse-width modulated signals which are generated by a data line driving circuit in which the ON pulses are transmitted continuously at the latter end of each selected period.
- a signal for discharging the charge stored in the liquid crystal layer is subsequently applied between a row electrode and a column electrode.
- a common line driving circuit generates voltage which is selectively applied to the column electrodes so that, in a selected period, the effective voltage between the row electrodes and the column electrodes is large, and in a non-selected period, the effective voltage is small.
- a data line driving circuit is provided which generates a pulse-width modulation signalf or displaying gray scale which is applied selectively to the row electrodes.
- the ON pulses, which turn the liquid crystal on are all transmitted together, e.g. continuously, in the latter portion of the selected period, following the OFF pulses, which turn the liquid crystal off.
- an additional signal is applied between the row electrode and the column electrode to discharge the electric charge which was stored in the liquid crystal layer during the selected period.
- the polarity of the voltage of the discharge signal is opposite to that applied between the row electrode and the column electrode during the selected period and cross-talk between adjacent display columns is eliminated.
- the ON pulses of the pulse-width modulation signal from the data line driving circuit appear together as one pulse in the latter portion of each selected period
- the length of the voltage pulse which is applied to the liquid crystal layer corresponds to the duty cycle of the selected signal.
- the invention accordingly comprises the several steps and the relation of one or more of such steps with respect to each of the others, and the apparatus embodying features of construction, combinations of elements and arrangements of parts which are adapted to effect such steps, all as exemplified in the following detailed disclosure, and the scope of the invention will be indicated in the claims.
- FIG. 1 is a block diagram of a liquid crystal video display and drive, in accordance with the present invention
- FIG. 2 shows the characteristic curve of a non-linear element used in the present invention
- FIG. 3 shows the waveform used for driving a known liquid crystal display having non-linear elements
- FIG. 4 is a schematic diagram of a known data line driving circuit
- FIG. 5 is a timing chart showing waveforms at selected points in the circuit of FIG. 4;
- FIG. 6 is a block diagram of a picutre element in the display
- FIG. 7 is the waveform used for driving the known liquid crystal display
- FIG. 8 is a chart showing the data line waveforms produced by the driving circuit of the present invention.
- FIGS. 9a and 9b are charts showing waveforms for driving the liquid crystal display of the present invention.
- FIGS. 10a, 10b and 10c are a first set of waveforms in which the ON pulses which drive the liquid crystal display are gathered at the end of the selected period in the present invention.
- FIGS. 11a, 11b and 11c are a second set of waveforms driving the liquid crystal display of the present invention in which pulses of voltage of opposite polarity are applied at the end of each selected period.
- FIG. 1 An illustrative embodiment of a circuit according to the present invention is shown in FIG. 1, where the elements of an active matrix for generating a video picture element in a liquid crystal display 101 are schematically represented.
- Each picture element, of a plurality of like picture elements, is formed by a portion of liquid crystal layer 107 which is electrically connected in series with a non-linear element 106 and which, for simplicity, is shown as located between a column electrode 105 and a row electrode 104 of the display. Only one such crossed pair of electrodes is shown, although many are required to form an image.
- a common line driving circuit 102 transmits a line driving signal on column connecting line C to column electrode 105 so that a large effective voltage is applied to the liquid crystal layer during a given selected period. During a non-selected period, a small effective voltage is applied to the liquid crystal layer.
- a data line driving circuit 103 outputs a data line driving signal to row electrode 104 on row connecting line D.
- the data line driving signal is a pulse-width modulated signal in which the ON pulse or pulses are generated at the end of the selected period appearing as one continuous pulse, as shown in FIG. 10.
- Data line driving dircuit 103 includes a counter 108 which functions in the same way as counter 401 of FIG. 4.
- a memory 109 in driving circuit 103 stores gray scale data and functions in the same way as memory 402 of FIG. 4.
- Four exclusive --NOR (EX--NOR) gates 110' detect the coincidence of output signals Q 0 , Q 1 , Q 2 , and Q 3 from counter 108 with output signals M 0 , M 1 , M 2 , and M 3 from memory 109, respectively, and multiple AND gate 110 receives and multiplies the outputs of the gates.
- AND gate 110 detects the coincidence of complement data from counter 108 and memory 109 and provides an output signal which is fed to and sets an RS latch 111.
- RS latch 111 is reset by a signal on line R which, as shown in FIG. 8, has a period that is equal to the selected period T. Thus, a pulse-width modulated signal is generated in accordance with code which is stored in memory 109.
- the output signal from RS latch 111 is fed to one side of a transmission gate 112 and the inverted ouput signal is fed to the other side.
- the transmission gate selects one of an ON voltage (V ON ) or an OFF voltage (V OFF ) for transmission on row line 104 to the row electrode and the display element.
- FIGS. 9a and 9b show representative waveforms of the voltage which appears across liquid crystal layer 107, e.g. the voltage applied to row electrode 104 and column electrode 105 when the data line is driven by data line driving circuit 103.
- FIG. 9a shows the waveform when M 0 , M 1 , M 2 , and M 3 are 0, 1, 1 and 1, respectively
- FIG. 9b shows the waveform when M 0 , M 1 , M 2 , and M 3 are 1, 1, 0, and 0, respectively.
- V LC corresponds to the voltage applied to the liquid crystal layer during a pulse-width modulated signal.
- FIGS. 10 and 11 illustrative waveforms used for driving the liquid crystal element; in these figures, an extended time axis is used to show several successive pulses.
- the ON pulses which form the gray scale picture element are all transmitted at the latter end of the selected period as a continuous signal.
- the signals of FIGS. 10a and 10b are respectively applied to the column electrode and the row electrode and form the differential voltage thereacross which is shown in FIG. 10c.
- the voltage V LC is applied to the liquid crystal layer during the pulse-width modulation signal.
- the voltage V NL is very high and the polarity thereof is opposite to that of the selected period because the liquid crystal layer has become electrically charged during the selected period.
- the voltage level of the succeeding data line is, in effect, modulated by the driving voltage of the preceding data line.
- the modulated wave thus, causes the above cross-talk defect between columns in the display.
- the driving signals of FIGS. 11a and 11b have been modified to include a voltage coponent which overcomes this defect.
- reverse pulses 1003 and 1004 are added at the rear end of the selected periods T. Pulses 1003 and 1004 have polarities which are opposite to the polarities of the voltage applied during the selected period. Further, as shown in FIG. 11b, a pulse of OFF voltage level can be added to the rear end of each selected period T to produce pulses 1007 and 1008.
- pulses 1007 and 1008 remove electrical charge which had been accumulated in the liquid crystal layer during the selected period.
- V NL is lower than V th , i.e.
- V NL Vth.
- V NL V NL ⁇ Vth.
- the pulse of reset signal R is widened toward the forward end of period T as shown in FIGS. 1 and 8, and a pulse of OFF level is provided at the end of the selected period T.
- the present invention provides, in an active matrix liquid crystal display device of the type including non-linear elements, for the application of an ON pulse-width modulation signal by the data line driving circuit at the rearward end of each selected period, during which the voltage corresponding to the duty-cycle of the selected signal is applied to the liquid crystal layer.
- the result is accurate reproduction of gray-scale images in the display under conditions of high duty-cycle driving.
- cross-talk between columns caused by the data signal is controlled by supplying a signal voltage which eliminates the residual charge in the liquid crystal layer at the end of each selected period.
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Nonlinear Science (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal Display Device Control (AREA)
- Liquid Crystal (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61-24338 | 1986-02-06 | ||
JP2433886 | 1986-02-06 |
Publications (1)
Publication Number | Publication Date |
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US4743096A true US4743096A (en) | 1988-05-10 |
Family
ID=12135392
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US07/008,894 Expired - Lifetime US4743096A (en) | 1986-02-06 | 1987-01-30 | Liquid crystal video display device having pulse-width modulated "ON" signal for gradation display |
Country Status (5)
Country | Link |
---|---|
US (1) | US4743096A (ko) |
KR (1) | KR910001848B1 (ko) |
GB (1) | GB2186414B (ko) |
HK (1) | HK29291A (ko) |
SG (1) | SG60190G (ko) |
Cited By (62)
Publication number | Priority date | Publication date | Assignee | Title |
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US4909602A (en) * | 1987-04-20 | 1990-03-20 | Hitachi, Ltd. | Liquid crystal display and method of driving the same |
WO1990003023A1 (en) * | 1988-09-16 | 1990-03-22 | Chips And Technologies, Inc. | Gray scales method and circuitry for flat panel graphics display |
US5017914A (en) * | 1987-06-04 | 1991-05-21 | Seiko Epson Corporation | Circuit for driving a liquid crystal display panel |
US5038139A (en) * | 1988-08-29 | 1991-08-06 | Hitachi, Ltd. | Half tone display driving circuit for crystal matrix panel and half tone display method thereof |
US5157386A (en) * | 1987-06-04 | 1992-10-20 | Seiko Epson Corporation | Circuit for driving a liquid crystal display panel |
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US6501443B1 (en) * | 1992-05-29 | 2002-12-31 | Crystalens Limited | Method of controlling liquid crystal lens in solar powered spectacles using light sensors |
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US20030011553A1 (en) * | 2000-12-22 | 2003-01-16 | Yutaka Ozaki | Liquid crystal drive apparatus and gradation display method |
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US6771240B2 (en) * | 1999-03-24 | 2004-08-03 | Seiko Epson Corporation | Method of driving matrix type display apparatus, display apparatus and electronic equipment |
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US20050275551A1 (en) * | 2004-06-14 | 2005-12-15 | John Houldsworth | Method and apparatus for brightness control of indication lights |
US20060066605A1 (en) * | 2003-03-31 | 2006-03-30 | Willis Thomas E | Methods and apparatus for driving pixels in a microdisplay |
US20100045690A1 (en) * | 2007-01-04 | 2010-02-25 | Handschy Mark A | Digital display |
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JP2852042B2 (ja) * | 1987-10-05 | 1999-01-27 | 株式会社日立製作所 | 表示装置 |
GB8804650D0 (en) * | 1988-02-27 | 1988-03-30 | Stc Plc | Display device |
GB9217336D0 (en) * | 1992-08-14 | 1992-09-30 | Philips Electronics Uk Ltd | Active matrix display devices and methods for driving such |
KR970076456A (ko) * | 1996-05-15 | 1997-12-12 | 엄길용 | 펄스 폭 변조를 이용한 다중 라인 선택 전압 인가 방식의 큰휨 네마틱 액정 표시기(stn-lcd) 구동 회로 |
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- 1987-01-05 KR KR1019870000005A patent/KR910001848B1/ko not_active IP Right Cessation
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- 1987-02-02 GB GB8702297A patent/GB2186414B/en not_active Expired
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- 1991-04-18 HK HK292/91A patent/HK29291A/xx not_active IP Right Cessation
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Also Published As
Publication number | Publication date |
---|---|
GB8702297D0 (en) | 1987-03-11 |
GB2186414A (en) | 1987-08-12 |
KR870008209A (ko) | 1987-09-25 |
HK29291A (en) | 1991-04-26 |
GB2186414B (en) | 1989-11-01 |
KR910001848B1 (ko) | 1991-03-28 |
SG60190G (en) | 1990-09-07 |
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