US4683566A - Digital radio communication system - Google Patents

Digital radio communication system Download PDF

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Publication number
US4683566A
US4683566A US06/793,242 US79324285A US4683566A US 4683566 A US4683566 A US 4683566A US 79324285 A US79324285 A US 79324285A US 4683566 A US4683566 A US 4683566A
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Prior art keywords
phase
signal
receiver
transmitter
phase shifting
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Expired - Lifetime
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US06/793,242
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English (en)
Inventor
Susumu Sasaki
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Fujitsu Ltd
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Fujitsu Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/24—Radio transmission systems, i.e. using radiation field for communication between two or more posts
    • H04B7/26—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile
    • H04B7/2643—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile using time-division multiple access [TDMA]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/74—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission for increasing reliability, e.g. using redundant or spare channels or apparatus

Definitions

  • the present invention relates to a digital radio communication system in the form of a multi-points to single point time division multiplex network.
  • the present invention is advantageously used for a high speed and high frequency band digital subscriber radio communication system, for instance, a so-called local area network (LAN).
  • LAN local area network
  • This system comprises a central station and a plurality of substations (i.e., subscribers).
  • the multi-points to single point time division multiplex network is comprised of these stations.
  • a central station is used in common by these substations and each substation is arbitrarily added to the network.
  • the central station in general, comprises one working and one standby transmitter and receiver unit.
  • the standby transmitter and receiver unit is designed to deal with a failure of the working transmitter and receiver unit, and has the same structure as that of the working transmitter and receiver.
  • An object of the present invention is to provide a digital radio communication system in the form of a multi-points to single point time division multiplex network enabling elimination of phase lags and leads of the sampling clock signal and the signal propagation delay time when changing operation from the working transmitter and receiver to the standby transmitter and receiver.
  • a digital radio communication system in the form of a multi-points to point time division multiplex network
  • a central station having one working and one standby transmitter and receiver unit where both the working and standby transmitter and receiver units have radio line terminating equipment.
  • Each transmitter and receiver unit also has a first phase shifting circuit for adjusting the phase of a transmission signal and a second phase shifting circuit for adjusting the phase of a sampling clock signal.
  • a signal propagation delay time of the working transmitter and receiver is previously adjusted by the first phase shifting circuit so as to become equal to that of the standby transmitter and receiver.
  • phase of a sampling clock signal is also previously adjusted between both second phase shifting circuits so as to be at a central position of the bit width of a reception signal.
  • a plurality of substations are included, each operatively connected to the central station by a time-divided digital radio signal, and each at least having a clock phase shifting circuit for adjusting the phase of a transmission signal transmitted from itself.
  • FIG. 1 illustrates a general system structure of a conventional multi-points to point time division multiplex network for digital radio communications
  • FIGS. 2A to 2D are frame formats of the transmission and reception signals between a central station and each substation;
  • FIGS. 3A to 3D are timing charts of a conventional transmission frame and reception frame
  • FIG. 4 is a timing chart of a reception signal at a conventional central station
  • FIG. 5 is a schematic structure of each substation according to the present invention.
  • FIG. 6 is a schematic block diagram of a central station as shown in FIG. 5;
  • FIG. 7 is a detailed block diagram of a central station as shown in FIG. 6;
  • FIG. 8 is a more detailed block diagram of a transmitter and receiver as shown in FIG. 7.
  • the network includes a central station CNTLS and two or more substations SUBS 1 to SUBS n .
  • the central station simultaneously transmits continuous time-divided signals to all substations as explained below.
  • Each substation extracts frame signals produced by the central station from the received signals, as explained below.
  • FIGS. 2A to 2D are frame formats of the transmission and reception signals between the central station and each substation.
  • FIG. 2A shows a transmission signal from the central station. This signal is formed as a time-divided series multiplex PCM signal having a frame length F on the time axis t. This signal is simultaneously transmitted to all substations.
  • FIGS. 2B to 2D show received signals at each substation. That is, each of substations SUBS 1 to SUBS n receives the signal in the time band allocated to itself, i.e., receives the signal during a subframe length F sb1 ,F sh2 , . . . ,F sbn , respectively, in the frame F.
  • FIGS. 3A to 3D show the relationship between the transmission signal and the reception signal.
  • FIG. 3A shows the time-divided transmission signal from the central station, which signal is similar to that of FIG. 2A.
  • FIG. 3B shows the reception of signals at each substation after a propagation delay time ta.
  • FIG. 3C shows a transmission signal from the substation SUBS 1 after a time delay ⁇ a caused by a phase lag and transmission bit lag.
  • FIG. 3D shows the reception of a signal by the central station after a propagation delay time ta'. As is obvious from FIG. 3D, each transmission signal from each substation is sequentially received by the central station.
  • Each substation transmits the signal within the time band allocated to itself by synchronizing the sampling clock signal which is contained in the transmission signal from the central station.
  • the signal propagation delay time ta and ta' between the central station and each substation is adjusted by a conventional delay adjuster (not shown) in each substation.
  • FIG. 4 is a timing chart for the reception of a signal at the central station.
  • the solid line represents the correct phase and the dotted line represents an incorrect phase (advanced phase) of the reception of the signal at the central station during. That is, during the period “l 0 " the phase is correct and the periods “l', l”" is incorrect. Accordingly, the period “l'” is shorter than “l 0 " and the period “l”” is longer than “l 0 ".
  • FIG. 5 is a schematic structure of each substation accorrding to the present invention.
  • Each substation comprises a clock phase shifter P for adjusting the phase lag.
  • the clock phase shifter P adjusts the incorrect phase shown in FIG. 4 to the correct phase.
  • Reference letters ⁇ a, ⁇ b, . . . , ⁇ n represent the value of the fine adjustment of the phase provided by clock phase shifter P.
  • the same frame formats of the transmission and reception signals as shown in FIGS. 2A to 2D and 3A to 3D are also used as the timedivided signal. Accordingly, as mentioned above, the central station CNTLS simultaneously transmits continuous signals to all substations in the form of the timedivided signals. Each substation SUBS 1 to SUBS n extracts frame signals produced by the central station from the received signals. Based on these signals, it selects only the signals allocated to itself.
  • FIG. 6 is a schematic block diagram of a central station shown in FIG. 5.
  • the central station CNTLS comprises a working transmitter (primary) and receiver WRK, a standby transmitter and receiver STB, and a hybrid HYB.
  • the working transmitter and receiver WRK, as well as the standby transmitter and receiver, comprise radio line terminating equipment RLT.
  • the hybrid HYB connects between the working WRK and the standby STB.
  • the hybrid HYB is connected to an antenna (not shown) for transmitting the signal to all substations.
  • FIG. 7 is a detailed block diagram of a central station shown in FIG. 6.
  • the transmitter and receiver unit T/R on the working side, as well as on the standby side comprises a transmitter T, a receiver R, a first phase shifting device P 1 , a second phase shifting device p 2 , and a sampling unit SMP all location at the top of a radio tower.
  • the phase of the regenerated input signal A from the radio line terminating equipment 4 at the base of the tower is adjusted by the first phase shifting device 21 in order to adjust the signal propagation delay time.
  • the phase adjusted signal is changed to a Non-Return-to-Zero (NRZ) signal and transmitted to all substations through the transmitter 24.
  • NRZ Non-Return-to-Zero
  • this NRZ signal is transmitted to the second phase shifting device 22 in order to adjust the phase of the sampling clock.
  • the clock signal is separated from the NRZ signal and input to the sampling unit 23.
  • the phase of the clock signal is adjusted to a central position of the bit width of the reception signal by the second phase shifting device 22.
  • the reception signal from each of the substations is received by the receiver 25 and transmitted to the sampling unit 23.
  • the clock signal is used for correctly sampling the received signal in the central position of the bit width of the received signal.
  • Adjustments of the signal propagation delay time and the phase of the sampling clock between the working transmitter and receiver and the standby transmitter and receiver are performed as follows.
  • phase and frequency of the regenerated input signal A from the RLT 4 is previously set to equal to that of the other regenerated clock input signal A' from the RLT 5.
  • the phase of the received signal at the sampling unit 23 is matched to that of the received signal at the sampling unit 28 by adjusting only the phase ⁇ in the first phase shifting device 21.
  • the phase of the sampling clock signal is adjusted to the central position of the bit width of the reception signal in the sampling unit 23 by adjusting the second phase shifting device 22. The same adjustment is performed in the other second phase shifting device 27.
  • FIG. 8 is a more detailed block diagram of the transmitter and receiver unit shown in FIG. 7.
  • the first phase shifting device P 1 comprises a phase shifter for adjusting the phase of the transmission signal input from the radio line terminating equipment RLT and a comparator for changing the transmission signal to the NRZ signal.
  • the second phase shifting device P 2 comprises a doubler for multiplying the NRZ signal by 2 and for generating the clock signal component, a filter for extracting the clock signal component used as the sampling clock signal, a comparator for changing the sine waveform of the clock signal component to a rectangular waveform, and a delay circuit for adjusting the phase of the sampling clock signal.
  • the signal propagation delay time and the phase of the sampling clock are previously adjusted as explained above, and no influence caused by the hybrid is felt when changing from the working to the standby transmitter and receiver.
  • the signal propagation delay time of the transmission signal and the phase of the sampling clock signal are previously adjusted between the working transmitter and receiver and the standby transmitter and receiver before the transmitter and receiver is located at the radio tower, when the working transmitter and receiver is changed to the standby transmitter and receiver, no phase lags and leads of the sampling clock signal and difference in the signal propagation delay time of the transmission signal occur in this equipment.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
US06/793,242 1984-11-02 1985-10-31 Digital radio communication system Expired - Lifetime US4683566A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP59232081A JPH0622356B2 (ja) 1984-11-02 1984-11-02 無線通信方式
JP59-232081 1984-11-02

Publications (1)

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US4683566A true US4683566A (en) 1987-07-28

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US06/793,242 Expired - Lifetime US4683566A (en) 1984-11-02 1985-10-31 Digital radio communication system

Country Status (6)

Country Link
US (1) US4683566A (fr)
EP (1) EP0180238B1 (fr)
JP (1) JPH0622356B2 (fr)
KR (1) KR910009646B1 (fr)
CA (1) CA1238432A (fr)
DE (1) DE3581266D1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5140697A (en) * 1989-01-24 1992-08-18 Fujitsu Limited Subscriber station of subscriber radio system which do not interfere with each other
US5708684A (en) * 1994-11-07 1998-01-13 Fujitsu Limited Radio equipment
EP0881785A1 (fr) * 1997-05-29 1998-12-02 Alcatel Système de télécommunication, système radio et procédé correspondant
US20070250741A1 (en) * 2006-04-24 2007-10-25 Freescale Semiconductor, Inc. Selective bit error detection at a bus device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3982075A (en) * 1974-09-09 1976-09-21 The Post Office Synchronization system for time division multiple access relay communications system
US4038494A (en) * 1975-06-17 1977-07-26 Fmc Corporation Digital serial transmitter/receiver module
US4301539A (en) * 1979-03-08 1981-11-17 Nippon Electric Co., Ltd. Supervising system for use in radio transmission
US4477895A (en) * 1980-05-02 1984-10-16 Harris Corporation Synchronized protection switching arrangement
US4494211A (en) * 1982-11-24 1985-01-15 The United States Of America As Represented By The Secretary Of The Navy Balanced system for ranging and synchronization between satellite pairs

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2851168B1 (de) * 1978-11-27 1980-04-17 Siemens Ag Geraeteersatzschaltung
DE3118018A1 (de) * 1981-05-07 1982-11-25 Standard Elektrik Lorenz Ag, 7000 Stuttgart Nachrichtenuebertragungssystem
JPS615639A (ja) * 1984-06-20 1986-01-11 Nec Corp 現用・予備ル−ト位相合わせ方式

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3982075A (en) * 1974-09-09 1976-09-21 The Post Office Synchronization system for time division multiple access relay communications system
US4038494A (en) * 1975-06-17 1977-07-26 Fmc Corporation Digital serial transmitter/receiver module
US4301539A (en) * 1979-03-08 1981-11-17 Nippon Electric Co., Ltd. Supervising system for use in radio transmission
US4477895A (en) * 1980-05-02 1984-10-16 Harris Corporation Synchronized protection switching arrangement
US4494211A (en) * 1982-11-24 1985-01-15 The United States Of America As Represented By The Secretary Of The Navy Balanced system for ranging and synchronization between satellite pairs

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
Sasaki et al., "Multi-Direction Time Division Multiplex Radio Equipment", pp. 365 to 369, IEEE, 1983.
Sasaki et al., Multi Direction Time Division Multiplex Radio Equipment , pp. 365 to 369, IEEE, 1983. *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5140697A (en) * 1989-01-24 1992-08-18 Fujitsu Limited Subscriber station of subscriber radio system which do not interfere with each other
US5708684A (en) * 1994-11-07 1998-01-13 Fujitsu Limited Radio equipment
EP0881785A1 (fr) * 1997-05-29 1998-12-02 Alcatel Système de télécommunication, système radio et procédé correspondant
US6269090B1 (en) * 1997-05-29 2001-07-31 Alcatel Telecommunication system, radio system, and method
AU748257B2 (en) * 1997-05-29 2002-05-30 Alcatel A radio system
US20070250741A1 (en) * 2006-04-24 2007-10-25 Freescale Semiconductor, Inc. Selective bit error detection at a bus device
US7631229B2 (en) * 2006-04-24 2009-12-08 Freescale Semiconductor, Inc. Selective bit error detection at a bus device

Also Published As

Publication number Publication date
KR910009646B1 (en) 1991-11-23
EP0180238A3 (en) 1986-07-02
EP0180238A2 (fr) 1986-05-07
CA1238432A (fr) 1988-06-21
JPH0622356B2 (ja) 1994-03-23
JPS61111034A (ja) 1986-05-29
DE3581266D1 (de) 1991-02-14
EP0180238B1 (fr) 1991-01-09

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