US3846624A - Automatic clearing device - Google Patents

Automatic clearing device Download PDF

Info

Publication number
US3846624A
US3846624A US00359214A US35921473A US3846624A US 3846624 A US3846624 A US 3846624A US 00359214 A US00359214 A US 00359214A US 35921473 A US35921473 A US 35921473A US 3846624 A US3846624 A US 3846624A
Authority
US
United States
Prior art keywords
synchronizing signal
state
power source
signal generating
clearing device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US00359214A
Inventor
T Kawanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to US00359214A priority Critical patent/US3846624A/en
Application granted granted Critical
Publication of US3846624A publication Critical patent/US3846624A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356008Bistable circuits ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/02Digital computers in general; Data processing equipment in general manually operated with input through keyboard and computation using a built-in program, e.g. pocket calculators
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419Read-write [R-W] circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory

Definitions

  • ABSTRACT 1n an electronic instrument having a storage unit, an automatic clearing device utilizes a portion of the storage unit as a constituent.
  • a synchronizing signal generator generates a synchronizing signal in response to revolutions of an electric motor.
  • a clear signal generating circuit generates output adapted to change from one state to another state when a power source is connected and to change from said another to said one state upon arrival of the synchronizing signal.
  • a signal representative of the state change is applied to the storage unit portion as a clear signal, whereby the storage in the storage unit portion may be cleared.
  • This invention relates to an automatic clearing device for electronic desk top calculators and other electronic instruments having a storage unit therein.
  • An electronic instrument such as electronic desk top calculator or the like has a storage unit such as a flipflop, a shift register or the like. Since, however, such a storage unit is not reset to zero at the time when the power source for operating the electronic instrument is switched on, it has been necessary to depress a clear key to clear the content stored in the storage unit to zero after the power source has been connected.
  • an automatic clearing system has been put into use which can clear the storage unit upon connection of the power source.
  • Such an automatic clearing system has mainly employed an arrangement wherein a time constant circuit capable of maintaining a signal at a predetermined level for a predetermined time after the connection of the power source is provided so that the output of such time constant circuit may be used to clear and control the storage unit.
  • SUMMARY OF THE INVENTION lt is an object of the present invention to present an automatic clearing device for electronic instruments having a storage unit which is of compact construction.
  • FIG. 1 is a circuit diagram showing the automatic clearing device according to the present invention.
  • FIG. 2 shows signal waveforms in various parts of the clearing device of FIG. l for illustrating the operation of the device.
  • a power supply unit l1 includes three different power sources 12, 13 and 14 which respectively supply voltages VG, VD, VM and VS through lines a, b,
  • An electric motor 19 has its drive terminals connected to the switches I7 and 18 and may be used to drive a printer (not shown) as well as to generate a synchronizing signal and for other purposes.
  • a disc 22 having magnets 21 mounted thereon is fixed on the rotary shaft 20 of the motor 19, and a pickup coil 23 is disposed in opposed relationship with respect to the magnet on the disc 22.
  • energization of the motor 19 rotates the disc 22 and accordingly the magnet 21 adjacent to the pickup coil 23, so that a magnetic flux produced by the magnet 2l crosses the pickup coil 23, which will thus generate a pulse signal corresponding to the variation of the magnetic flux.
  • Such pulse signal is then amplified by an amplifier 24 to which 'power is supplied from power source 13 through lines b and d, thereby providing a pulse signal which forms a synchronizing signal supplied through line e to other circuit portions.
  • some time delay exists from the time at which the power switches 15-18 are closed to supply the voltage V," to the electric motor till the time at which the motor starts to revolve, and moreover, in the illustrated embodiment, there is also some time delay until the magnetic flux crossing the pickup coil reaches a predetermined velocity, i.e. from the time at which the power switches 17 and 18 are closed till a synchronizing signal is provided on the line e, because the amplifier 24 puts out only pulse signals of a predetermined level as the synchronizing signal.
  • a clear signal generator circuit comprises a flip-flop circuit including MOS transistors 26-30, and a governor circuit for governing the initial state of the flip-flop circuit and including MOS transistors 31, 32 and a capacitor 33.
  • the clear signal generator circuit 25 generates a clear signal through a line f. More specifically, the gate of MOS transistor 26 is connected to the line e to which the synchronizing signal from the amplifier 24 is applied, the source and drain of which are connected to the line d and on the one hand the gate of MOS transistor 27, respectively, and on the other hand to the drain of MOS transistor 30 and the source of MOS transistor 29, respectively.
  • the source of MOS transistor 27 is connected to the line d while the drain of this transistor is connected on the one hand to the gate of MOS transistor 30 and on the other hand to the source of load MOS transistor 28.
  • MOS transistors 28, 29 and 32 have their respective drains connected to the line b which is at the potential VD and have their respective gates connected to the line a which is at the potential VG, thus acting as a load.
  • MOS transistor 31 has its drain and source connected to the source of MOS transistor 30 and the line d. respectively, and the gate of MOS transistor 31 has connected theretothe source of load MOS transistor 32 and one end of a capacitor 33, whose other end is connected to the line d which is at the potential VS.
  • Numeral 34 generally designates a portion of the storage unit to be cleared, which includes flip-flop circuits 35 and 36 having set input terminals 37, 38, set output terminal 39, 40, reset input terminals 41, 42 and reset output terminals 43, 44, respectively. These flip-flop circuits receive a clock pulsethrough a line g.
  • the flip-flop circuits also have forced reset terminals 45 and 46 connected to the line f of the clear signal generator circuit 25, which line f has a terminal 47 for applying therethrough ak clear signal to other storage unit portions (not shown). f
  • V G the voltages such as V G, VD, VM and Vs will be vapplied to the lines a, b, c and d, respectively.
  • MOS transistor 32 acts as an impedance element of a predetermined impedance, through which the capacitor 33 is charged as shown at C in FIG. 2, with its terminal potential gradually approaching the potential VD.
  • Vh represents the thresholdpotential of MOS transistor 31, which turns off when the gate potential of MOS transistor 3l is higher than the potential Vh and turns onV when the gate potential' of transistor 31 is lower than Vh.
  • MOS transistor 3l does not turn on until the point of time t., i.e.' until a period of time Tl has elapsed from' the initiation ofthe charging of the capacitor 33.
  • F IG. 2D shows the potential waveform appearing in the line e from the point of time t at which the power switches have been closed as described until a synchronizing signal yis provided. It is seen that the synchronizing signal 4cannot be vprovided simultaneously with the closing of the power switches'at the point of time to, but onlyl after thelapse of a'predetermined time T2, i.e. only at the 4point of time t2.
  • the capacitor 33 o r the amplifier 24 is preset so that the periods of time Tl and T2 may be in the relation T, T2.
  • MOS transistor 3l remains in OFF position during the period of time T, because the terminal potential of the capacitor has not yet reached its threshold as shown in FIG. 2C, and the transistor 26 also remains in OFF position because no synchronizing signal is yet applied to the gate thereof as shown in FIG. 2D, and thus the initial state of the flip-flop is governed by the transistor 3l and capacitor 33 and the potential acrossthe line f presents thelevel Vn as shown in FIG. 2E.
  • the terminal voltage of the capacitor 33 reaches its threshold and the period of time T3 is entered, whereupon MOS transistor 3l turns on.
  • the transistor 26 remains in OFF position'with no synchronizing signal yet applied thereto.
  • the gate of the transistor 27 is turned on with the potential VD applied thereto while the gate of the transistor 30 is turned off with the potential VS applied thereto.
  • the potential across the line f still remains at the aforesaid level VD
  • a synchronizing signal is applied to the gate of the transistor 26 and the period of time T3 is entered, whereupon'the transistor 26 turns on with the arrival of the synchronizing signal while the transistor 27 is turned oft ⁇ but the transistor 30 is turned on.
  • the potential across the line f is now at VS as shown in FIG. 2E. It is due to the arrival of such pulse synchronizing that the gate potential of the transistor 27 reaches the level VS as described, and therefore such state is continuously maintained whether the potential across the linef is thereafter varied to 0 or Ve.
  • clear signal generating means coupled to said synchronizing signal generating means for generating output, adapted to changefrom one state to another state upon connection of the power source and change from said another state to said one state upon arrival of said synchronizing signal;
  • said synchronizing signal generating means includes means for preventing said electric motor from generating a synchronizing signal until its revolutions attain a predetermined velocity'after the power source has been connected.
  • An automatic clearing device comprising: storage means whose storage is to be cleared upon connection of a power source;
  • synchronizing signal generating means for generating a synchronizing signal in accordance with revolutions of an electric motor
  • clear signal ⁇ generating means including a flip-flop circuit to which the output from ⁇ said synchronizing signal generating means is applied as control signal, and means for determining the initial state of said flip-flop circuit, the output of said flip-flop changing from one state to another state determined by said means for determining upon connection of the power source and changing from said y another state to said one state upon application of the synchronizing signal from said synchronizing signal generator means;
  • An automatic clearing device according to claim 5.0 3, wherein said means for determining comprises a capacitor and a switching element controlled by said ca-v pacitor.
  • An automatic clearing device wherein said capacitor includes means for controlling said switching elements so that said switching element controlled by said capacitor is actuated after the connection of the power source in a shorter time than the time required from the connection of the power source until the synchronizing signal is generated.
  • said synchronizing signal generating means comprises a permanent magnet securely mounted on a rotary disc secured to the rotary shaft of said electric motor, a magnetic flux detecting element provided separately from said rotary. disc and adjacent to said permanent magnet ⁇ and an amplifier for amplifying the signal detected bysaid* detecting element.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Control Of Direct Current Motors (AREA)

Abstract

In an electronic instrument having a storage unit, an automatic clearing device utilizes a portion of the storage unit as a constituent. A synchronizing signal generator generates a synchronizing signal in response to revolutions of an electric motor. A clear signal generating circuit generates output adapted to change from one state to another state when a power source is connected and to change from said another to said one state upon arrival of the synchronizing signal. A signal representative of the state change is applied to the storage unit portion as a clear signal, whereby the storage in the storage unit portion may be cleared.

Description

United States Patent i191 Kawanabe AUTOMATIC CLEARING DEVICE Inventor: Tsuyoshi Kawanabe, Yokohama,
Japan Assignee: Canon Kabushiki Kaisha, Tokyo,
Japan Filed: May 11, 1973 Appl. No.: 359,214
340/173 R, 174 PM; 179/1002 D; 328/48, 42
References Cited UNITED STATES PATENTS Begun et al 179/1002 D Dickinson 23S/92 MS Rywak 307/293 3,846,624 Nov. 5, 1974 3,460,115 8/1969 Leone 340/174 PM [57] ABSTRACT 1n an electronic instrument having a storage unit, an automatic clearing device utilizes a portion of the storage unit as a constituent. A synchronizing signal generator generates a synchronizing signal in response to revolutions of an electric motor. A clear signal generating circuit generates output adapted to change from one state to another state when a power source is connected and to change from said another to said one state upon arrival of the synchronizing signal. A signal representative of the state change is applied to the storage unit portion as a clear signal, whereby the storage in the storage unit portion may be cleared.
6 Claims, 2 Drawing Figures PAH-1mm nov 5 |974 3,846,624
slm auf 2 FIG. 2
AUTOMATIC CLEARING DEVICE A BACKGROUNDOF THE INVENTION l. Field of the Invention This invention relates to an automatic clearing device for electronic desk top calculators and other electronic instruments having a storage unit therein.
2. Description of the Prior Art An electronic instrument such as electronic desk top calculator or the like has a storage unit such as a flipflop, a shift register or the like. Since, however, such a storage unit is not reset to zero at the time when the power source for operating the electronic instrument is switched on, it has been necessary to depress a clear key to clear the content stored in the storage unit to zero after the power source has been connected.
To eliminate such a cumbersome procedure, a system known as the automatic clearing system has been put into use which can clear the storage unit upon connection of the power source. Such an automatic clearing system has mainly employed an arrangement wherein a time constant circuit capable of maintaining a signal at a predetermined level for a predetermined time after the connection of the power source is provided so that the output of such time constant circuit may be used to clear and control the storage unit.
Such an automatic clearing system, however, has required the time constant circuit to be of great capacity,
it has formed a bottleneck in making the circuit morel compact and also has led to a higher cost of manufacture.
SUMMARY OF THE INVENTION lt is an object of the present invention to present an automatic clearing device for electronic instruments having a storage unit which is of compact construction.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram showing the automatic clearing device according to the present invention; and
FIG. 2 shows signal waveforms in various parts of the clearing device of FIG. l for illustrating the operation of the device.
DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIG. l, there is diagrammatically shown a portion of an electronic desk top calculator which employs an electric motor for the purposes of generating a synchronizing signal, driving a printer and other purposes. A power supply unit l1 includes three different power sources 12, 13 and 14 which respectively supply voltages VG, VD, VM and VS through lines a, b,
c and d to other circuit portions. In the respective lines there are provided power switches 15, 16, 17 and 18 which are associated with one another so that the powersources 12-14 may be simultaneously connected or disconnected to the lines a-d by controlling the power switches.
An electric motor 19 has its drive terminals connected to the switches I7 and 18 and may be used to drive a printer (not shown) as well as to generate a synchronizing signal and for other purposes.
A disc 22 having magnets 21 mounted thereon is fixed on the rotary shaft 20 of the motor 19, and a pickup coil 23 is disposed in opposed relationship with respect to the magnet on the disc 22. Thus, energization of the motor 19 rotates the disc 22 and accordingly the magnet 21 adjacent to the pickup coil 23, so that a magnetic flux produced by the magnet 2l crosses the pickup coil 23, which will thus generate a pulse signal corresponding to the variation of the magnetic flux.
Such pulse signal is then amplified by an amplifier 24 to which 'power is supplied from power source 13 through lines b and d, thereby providing a pulse signal which forms a synchronizing signal supplied through line e to other circuit portions. In this case, some time delay exists from the time at which the power switches 15-18 are closed to supply the voltage V," to the electric motor till the time at which the motor starts to revolve, and moreover, in the illustrated embodiment, there is also some time delay until the magnetic flux crossing the pickup coil reaches a predetermined velocity, i.e. from the time at which the power switches 17 and 18 are closed till a synchronizing signal is provided on the line e, because the amplifier 24 puts out only pulse signals of a predetermined level as the synchronizing signal.
A clear signal generator circuit, generally designated by 25, comprises a flip-flop circuit including MOS transistors 26-30, and a governor circuit for governing the initial state of the flip-flop circuit and including MOS transistors 31, 32 and a capacitor 33. The clear signal generator circuit 25 generates a clear signal through a line f. More specifically, the gate of MOS transistor 26 is connected to the line e to which the synchronizing signal from the amplifier 24 is applied, the source and drain of which are connected to the line d and on the one hand the gate of MOS transistor 27, respectively, and on the other hand to the drain of MOS transistor 30 and the source of MOS transistor 29, respectively. The source of MOS transistor 27 is connected to the line d while the drain of this transistor is connected on the one hand to the gate of MOS transistor 30 and on the other hand to the source of load MOS transistor 28.
MOS transistors 28, 29 and 32 have their respective drains connected to the line b which is at the potential VD and have their respective gates connected to the line a which is at the potential VG, thus acting as a load. MOS transistor 31 has its drain and source connected to the source of MOS transistor 30 and the line d. respectively, and the gate of MOS transistor 31 has connected theretothe source of load MOS transistor 32 and one end of a capacitor 33, whose other end is connected to the line d which is at the potential VS.
Numeral 34 generally designates a portion of the storage unit to be cleared, which includes flip-flop circuits 35 and 36 having set input terminals 37, 38, set output terminal 39, 40, reset input terminals 41, 42 and reset output terminals 43, 44, respectively. These flip-flop circuits receive a clock pulsethrough a line g.
The flip-flop circuits also have forced reset terminals 45 and 46 connected to the line f of the clear signal generator circuit 25, which line f has a terminal 47 for applying therethrough ak clear signal to other storage unit portions (not shown). f
In the -automatic clearing device of the abovedescribed construction, if the power switches lS-l8 are closed at apoint of time lo, the voltages such as V G, VD, VM and Vs will be vapplied to the lines a, b, c and d, respectively. When voltages VG and VD are applied to thelines a and b as shown at A and B in FIG. 2, MOS transistor 32 acts as an impedance element of a predetermined impedance, through which the capacitor 33 is charged as shown at C in FIG. 2, with its terminal potential gradually approaching the potential VD. In FIG. 2C, Vh represents the thresholdpotential of MOS transistor 31, which turns off when the gate potential of MOS transistor 3l is higher than the potential Vh and turns onV when the gate potential' of transistor 31 is lower than Vh.
Thus, MOS transistor 3l does not turn on until the point of time t., i.e.' until a period of time Tl has elapsed from' the initiation ofthe charging of the capacitor 33.
F IG. 2D shows the potential waveform appearing in the line e from the point of time t at which the power switches have been closed as described until a synchronizing signal yis provided. It is seen that the synchronizing signal 4cannot be vprovided simultaneously with the closing of the power switches'at the point of time to, but onlyl after thelapse of a'predetermined time T2, i.e. only at the 4point of time t2.
The capacitor 33 o r the amplifier 24 is preset so that the periods of time Tl and T2 may be in the relation T, T2. As a result, MOS transistor 3l remains in OFF position during the period of time T, because the terminal potential of the capacitor has not yet reached its threshold as shown in FIG. 2C, and the transistor 26 also remains in OFF position because no synchronizing signal is yet applied to the gate thereof as shown in FIG. 2D, and thus the initial state of the flip-flop is governed by the transistor 3l and capacitor 33 and the potential acrossthe line f presents thelevel Vn as shown in FIG. 2E. After such period of time has passed, the terminal voltage of the capacitor 33 reaches its threshold and the period of time T3 is entered, whereupon MOS transistor 3l turns on. Still at this point of time, the transistor 26 remains in OFF position'with no synchronizing signal yet applied thereto. As a result, the gate of the transistor 27 is turned on with the potential VD applied thereto while the gate of the transistor 30 is turned off with the potential VS applied thereto. Thus, the potential across the line f still remains at the aforesaid level VD,
After such period of time has passed, a synchronizing signal is applied to the gate of the transistor 26 and the period of time T3 is entered, whereupon'the transistor 26 turns on with the arrival of the synchronizing signal while the transistor 27 is turned oft` but the transistor 30 is turned on. As a result, the potential across the line f is now at VS as shown in FIG. 2E. It is due to the arrival of such pulse synchronizing that the gate potential of the transistor 27 reaches the level VS as described, and therefore such state is continuously maintained whether the potential across the linef is thereafter varied to 0 or Ve.
- sata-624y y 4 r Thus, such a clear signal as shown in FIG. 2E is pro- -duced from the line f and applied to the storage unit portion 34 to thereby clear the stored content therein.
clear signal generating means coupled to said synchronizing signal generating means for generating output, adapted to changefrom one state to another state upon connection of the power source and change from said another state to said one state upon arrival of said synchronizing signal; and
means coupled between said storage means and said signal generating means for applying as a clear signal to said storage means a signal resulting from the change of the state of saidclear signal generating means. 2. An automatic clearing device according to claim 1, wherein said synchronizing signal generating means includes means for preventing said electric motor from generating a synchronizing signal until its revolutions attain a predetermined velocity'after the power source has been connected.
3. An automatic clearing device comprising: storage means whose storage is to be cleared upon connection of a power source;
synchronizing signal generating means for generating a synchronizing signal in accordance with revolutions of an electric motor;
clear signal` generating means including a flip-flop circuit to which the output from` said synchronizing signal generating means is applied as control signal, and means for determining the initial state of said flip-flop circuit, the output of said flip-flop changing from one state to another state determined by said means for determining upon connection of the power source and changing from said y another state to said one state upon application of the synchronizing signal from said synchronizing signal generator means; and
means for applying as a clear signal to said storage y means a signal resulting from the variation of the output of said clear signal generating circuit.
4. An automatic clearing device according to claim 5.0 3, wherein said means for determining comprises a capacitor and a switching element controlled by said ca-v pacitor.
5. An automatic clearing device according to claim 4, wherein said capacitor includes means for controlling said switching elements so that said switching element controlled by said capacitor is actuated after the connection of the power source in a shorter time than the time required from the connection of the power source until the synchronizing signal is generated.
6. An automatic clearing device according to claim l, wherein said synchronizing signal generating means comprises a permanent magnet securely mounted on a rotary disc secured to the rotary shaft of said electric motor, a magnetic flux detecting element provided separately from said rotary. disc and adjacent to said permanent magnet` and an amplifier for amplifying the signal detected bysaid* detecting element.
"-Attesm McoY M; GIBSON JR. c. MARSHALL DANNl Attesting Gffficer Commissioner of Patents UNITED ySTATES PATENT OFFICE CERTIFICATE OF CORRECTION Pagentuo. 3,846,524 Dated November 5, 1974 Inventor (s) ISUYOSHI KAWANABE It is certified that error appears vin` the above-identified patet and that'Asaid Letters Patent are hereby corrected as shown below:
In the title page, Column 1, insert A:Ozlailfu-"co priorityI Japanese Patent.l Application No. 48344/1972, .filed lMay 16, 197.2.
I Signed andse'aAled this 7th day of January T975.
(SEAL) 1 AuscoMM-Dc soa7o-ps9 U. S, GDVIINNIIT PRINTING UFFICI l." O lIl-SM.
Patent No. 3,846,624 Dated November 5, 1974 Inventor(s) TSUYOSHI I'QWANABE 4It is certified that error appearsin the above-identified patet and thatlsaid Letters Patent are hereby corrected as shownY below:
In the 'title page,l Column l, insert lclaim-'to priority, Japanese Patent Application No. 48344/1972.; filed vMay 16, 1972.
Sgoed a'ndfse'a-led this 7th day of January T975.
(SEAL) IIIQSI! Mecoy E. GIBSON JR. v q c. MARSHALL mm:`
Attestng Officer l Commissioner of k'Patents F ORM: po-loso (1o-69)

Claims (6)

1. An automatic clearing device comprising: storage means whose storage is to be cleared upon connection of a power source to said device; synchRonizing signal generating means for generating a synchronizing signal in accordance with revolutions of an electric motor driven by said power source; clear signal generating means coupled to said synchronizing signal generating means for generating output, adapted to change from one state to another state upon connection of the power source and change from said another state to said one state upon arrival of said synchronizing signal; and means coupled between said storage means and said signal generating means for applying as a clear signal to said storage means a signal resulting from the change of the state of said clear signal generating means.
2. An automatic clearing device according to claim 1, wherein said synchronizing signal generating means includes means for preventing said electric motor from generating a synchronizing signal until its revolutions attain a predetermined velocity after the power source has been connected.
3. An automatic clearing device comprising: storage means whose storage is to be cleared upon connection of a power source; synchronizing signal generating means for generating a synchronizing signal in accordance with revolutions of an electric motor; clear signal generating means including a flip-flop circuit to which the output from said synchronizing signal generating means is applied as control signal, and means for determining the initial state of said flip-flop circuit, the output of said flip-flop changing from one state to another state determined by said means for determining upon connection of the power source and changing from said another state to said one state upon application of the synchronizing signal from said synchronizing signal generator means; and means for applying as a clear signal to said storage means a signal resulting from the variation of the output of said clear signal generating circuit.
4. An automatic clearing device according to claim 3, wherein said means for determining comprises a capacitor and a switching element controlled by said capacitor.
5. An automatic clearing device according to claim 4, wherein said capacitor includes means for controlling said switching elements so that said switching element controlled by said capacitor is actuated after the connection of the power source in a shorter time than the time required from the connection of the power source until the synchronizing signal is generated.
6. An automatic clearing device according to claim 1, wherein said synchronizing signal generating means comprises a permanent magnet securely mounted on a rotary disc secured to the rotary shaft of said electric motor, a magnetic flux detecting element provided separately from said rotary disc and adjacent to said permanent magnet, and an amplifier for amplifying the signal detected by said detecting element.
US00359214A 1973-05-11 1973-05-11 Automatic clearing device Expired - Lifetime US3846624A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US00359214A US3846624A (en) 1973-05-11 1973-05-11 Automatic clearing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00359214A US3846624A (en) 1973-05-11 1973-05-11 Automatic clearing device

Publications (1)

Publication Number Publication Date
US3846624A true US3846624A (en) 1974-11-05

Family

ID=23412826

Family Applications (1)

Application Number Title Priority Date Filing Date
US00359214A Expired - Lifetime US3846624A (en) 1973-05-11 1973-05-11 Automatic clearing device

Country Status (1)

Country Link
US (1) US3846624A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4100400A (en) * 1976-09-17 1978-07-11 Rf Products Corp. Gasoline pump price encoder
US4105914A (en) * 1975-04-01 1978-08-08 Minolta Camera Kabushiki Kaisha Presetting counter device
US4242575A (en) * 1978-02-07 1980-12-30 Rf Products Corp. Gasoline pump digital price encoder
US4304988A (en) * 1979-07-31 1981-12-08 Veeder Industries Inc. Battery powered electronic counter
US4314147A (en) * 1978-12-22 1982-02-02 Laurel Bank Machine Co., Ltd. Multi-function type sheet counting machine
EP0318952A2 (en) * 1987-11-30 1989-06-07 Kabushiki Kaisha Toshiba Semiconductor memory device having a function of simultaneously clearing part of memory date

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2589035A (en) * 1950-07-17 1952-03-11 Brush Dev Co Automatic erase for magnetic recorders
US2850235A (en) * 1954-09-23 1958-09-02 Ibm Automatically reset register
US3158757A (en) * 1962-04-23 1964-11-24 Northern Electric Co Long interval timer circuit
US3460115A (en) * 1965-08-16 1969-08-05 Ex Cell O Corp Magnetic pin information storage system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2589035A (en) * 1950-07-17 1952-03-11 Brush Dev Co Automatic erase for magnetic recorders
US2850235A (en) * 1954-09-23 1958-09-02 Ibm Automatically reset register
US3158757A (en) * 1962-04-23 1964-11-24 Northern Electric Co Long interval timer circuit
US3460115A (en) * 1965-08-16 1969-08-05 Ex Cell O Corp Magnetic pin information storage system

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4105914A (en) * 1975-04-01 1978-08-08 Minolta Camera Kabushiki Kaisha Presetting counter device
US4100400A (en) * 1976-09-17 1978-07-11 Rf Products Corp. Gasoline pump price encoder
US4242575A (en) * 1978-02-07 1980-12-30 Rf Products Corp. Gasoline pump digital price encoder
US4314147A (en) * 1978-12-22 1982-02-02 Laurel Bank Machine Co., Ltd. Multi-function type sheet counting machine
US4304988A (en) * 1979-07-31 1981-12-08 Veeder Industries Inc. Battery powered electronic counter
EP0318952A2 (en) * 1987-11-30 1989-06-07 Kabushiki Kaisha Toshiba Semiconductor memory device having a function of simultaneously clearing part of memory date
EP0318952A3 (en) * 1987-11-30 1991-09-04 Kabushiki Kaisha Toshiba Semiconductor memory device having a function of simultaneously clearing part of memory date

Similar Documents

Publication Publication Date Title
FR1454917A (en) Stepper motor and step sensor
GB1425840A (en) Electronic timepiece
US3846624A (en) Automatic clearing device
US4583092A (en) Sweep circuit of key matrix
US4074256A (en) Driver circuit for driving electrochromic display device
US3754391A (en) Driving arrangement for quartz vibrator timepieces
KR920001461A (en) Disk drive unit
KR910006953A (en) Pulse Detection Circuit and Video Recorder Including the Circuit
KR850006112A (en) Disk unit
JP2788684B2 (en) Sample hold circuit
SU1646036A2 (en) Device for step motor control
SU1363305A1 (en) Bubble memory
SU1451754A1 (en) Arrangement for registering the time of presence of vehicles in monitored zone
SU732914A1 (en) Device for modelling rotary speed pulse sensor
SU1254301A1 (en) Multicell registering device
US3657463A (en) Keyer control circuit for electronic musical instruments
SU1269232A1 (en) D.c.electric drive
SU1718346A1 (en) Gate switch controlled
SU754469A1 (en) Device for recording onto magnetic tape
SU1013856A2 (en) Device for measuring dc motor rotation speed
SU467325A1 (en) Integrated Drive
SU830529A2 (en) Device for processing signals from magnetic carrier
SU1337666A1 (en) Device for recording on electrosensitive medium
SU1018243A1 (en) Voltage/frequency converter
SU1411910A1 (en) D.c. electric drive