US3787810A - Test method for a programmable data communication terminal - Google Patents
Test method for a programmable data communication terminal Download PDFInfo
- Publication number
- US3787810A US3787810A US00303129A US3787810DA US3787810A US 3787810 A US3787810 A US 3787810A US 00303129 A US00303129 A US 00303129A US 3787810D A US3787810D A US 3787810DA US 3787810 A US3787810 A US 3787810A
- Authority
- US
- United States
- Prior art keywords
- line
- data
- request
- bit pattern
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
- G06F11/277—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault-free response
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/24—Testing correct operation
Definitions
- ABSTRACT [22] Filed: Nov. 2, 1972 v 21 APPL 303 29 A method of testing the transmit and receive functions of a programmable data communications terminal.
- the transmit function is tested by having a program [52] 340/146'1 179/175, 179/175-2 within the terminal computer continually transmit a j 179M752. 235/153 324/73 R known bit pattern and measuring the voltage output of [51] Int. Cl.
- a fully duplexed terminal which is capable of both transmitting and receiving at the same time, all that is required to test the data communication facility is to connect the transmit data line line to the receive data line and to simply compare the transmitted character with the received characters.
- the terminal is capable of only sending or receiving data at any one time.
- the previous method of testing these half duplexed data communication terminals involved the use of specialized test equipment. Typically, this'test equipment was comprised of sufficient circuitry to receive one or two data characters from the terminal and, upon command, to transmit the same data characters back to theterminal.
- the first step in testing the data communication terminal is to determine whether the transmit circuitry is functioning correctly. This is accomplished by transmitting a continuous series of characters of a known bit pattern and measuring the output of the data line with a voltmeter. In this manner a missing or added bit may be detected by measuring the output voltage of the transmit line.
- the second step in the method is to determine whether the receive circuitry is functioning correctly. This is accomplished by first connecting the request to send line to the receive data line of the terminal computer. Then a direct current voltage source is applied to the carrier. detect line in order to simulate a reception of a carrier signal. At this point the terminal computer is placed in the receive mode and a data character is generated on the request to send line by programmatically setting and resetting the flip flop that controls the voltage on the request to send line. This setting and resetting of the request to send line will of course conform with the bit rate that the terminal is set to receive. Therefore, by controlling the time that the request to send line is set and reset, any data pattern can be generated for any desired bit rate.
- a terminal computer with data communication capability may have that data communication capability tested with the only hardware requirement being a voltmeter and a direct current voltage source.
- FIG. 1 illustrates in block form a data communications network
- FIG. 2 illustrates the input-output connections of a terminal computer
- FIG. 3 is a voltage graph of a data character bit pattern
- FIG. 4 is a voltage graph of a biased data character bit pattern
- FIG. 5 is a voltage graph of an internally generated data character
- FIG. 6 is a diagram of the placement of micro code on a disk memory.
- the inventive method herein described relates to a large class of terminal computers having data communication capability.
- Representative of this class is the Burroughs TCSOO as described in the Burroughs Publication, L/TC Reference Manual, Form No. 1053386.
- the discussion of the inventive method will center around the Burroughs TCSOO, as an example of the type of machines to which the inventive method can be applied. It should be understood, however, that the disclosed method may be applied with equal facility to each member of the general class of terminal computers with data communication capabilities.
- FIG. 1 An example of a typical data communication system is shown in FIG. 1, wherein a terminal computer 2 is connected to a data set 4 through a standard interface 6, such as the RS232 the specifications for which have been set forth by the Electronic Industries Association.
- the data set 4 is then connected over transmission lines to anoter data set 10 which in turn serves as input to a computer 12 through a standard RS232 interface 14.
- a central computer 12 may be tied into a large number of terminals in a data communications network.
- FIG. 2 illustrated in more detail, is the terminal computer 2 shown in FIG. 1 along with selected inputoutput lines that'serve to connect the terminal computer to the RS232 interface 6. These lines include the Request To Send Line 16 the primary function of v which is to signal the data set 4 that the terminal computer is prepared to transmit data.
- the Receive Data Line 18 is the medium by which the terminal computer v2 receives data from the data communications network; Also shown is the Transmit Data Line 20 over which the terminal computer transmits data to the network, and the Carrier Detect Line 22 which indicates to the terminal computer that the data set 4 of FIG. 1 is about to transmit information to the terminal computer. It is these four input-output lines 16, 18, 20 and 22 that are used in the disclosed test method.
- the test of the transmit function of the terminal computer will be discussed first.
- the first step in the process of testing the transmit function of the terminal computer is to program the terminal computer to transmit repetitively a character with a known bit pattern. It should be mentioned at this point that during the test procedures the terminal computer will of course-be disconnected from the data communications network, and more specifically, from the RS232 interface as shown at 6 of FIG. 1.
- a voltage measuring device such as a voltmeter 24 will be attached to the Transmit Data Line 20.
- FIG. 3 An example of a typical bit pattern that would be transmitted over the Transmit Data Line 20 of FIG. 2 is illustrated in FIG. 3. In the example shown in FIG.
- the transmitted character has the bit pattern 1 1 I 0110 where the Os are represented by a positive 12 volts and the ls are represented by a negative 12 volts. Under EIA standards, plus or minus 12 volts is the line voltage used with the RS232 interface.
- the terminal computer will be transmitting a start character bit 26 and an end character bit 28.
- the start bit 26 is represented by +l 2 volts and the stop bit 28 is represented by a l2 volts on the Transmit Data Line 20 of FIG. 2.
- a voltage summing device 30 is inserted into the Transmit'Data Line 20 between the terminal computer 2 and the voltage reading device 24.
- the bit pattern in FIG. 3 will appear as illustrated in FIG. 4.
- the average voltage on the transmit data line 20 for the character being transmitted including the start 26 and the stop 28 bits, will be 9.6 bolts.
- the average voltage is calculated by multiplying the number of 0 bits inthe character by 24 volts and dividing by the number of bits in the character, which in this case happens to be bits. This value would then be the approximate reading on the voltmeter 24 for that particular bit pattern when that particular character is continuously transmitted.
- the voltmeter 24 will give a reading varying sufficiently from 9.6 to indicate an error in transmission.
- the transmit data signal may be checked for the correct number of on and off bits.
- the second phase of testing the data communication facilities of a terminal computer involves testing the terminals ability to receive data. Since this test is being carried on in an off line, stand alone environment, the first step is to provide the terminal with the carrier detect signal on line 22 of FIG. 2. This is done in order to simulate the condition where the data set 4 as shown in FIG. 1 is ready to transmit data to the terminal computer 2 and is accomplished by simply attaching a 12 volt voltage source 32 of FIG. 2 to the Carrier Detect Line 22. After thus providing-for simulation of the carrier detect signal, the next step is to connect the request to send line 16 with the receive data line 18. This is indicated by the jumper cable 34 in FIG. 2.
- the request to send signal that is transmitted over line 16 and the receive data signal transferred over line 18 are a part of a standard interface, RS232, as shown at 6 of FIG. 1, the voltages appearing on each line will be compatible. Therefore, the two signals may be jumped for testing without harm to the circuits.
- the RS232 interface 6 is an industry standard, the receive logic of a large class of programmable data communication terminals may be tested off line by using the request to send signal to simulate the data center.
- a signal is generated on the Request To Send Line that serves to simulate a typical character that would come from a data center via a data set.
- This signal is generated by setting and resetting the request to send line in order to simulate a bit pattern that represents the desired character.
- An example of how voltage on the Request To Send Line 16 would be set and reset is shown in FIG. 5.
- FIG. 5 An example of how voltage on the Request To Send Line 16 would be set and reset is shown in FIG. 5.
- a start bit is simulated by placing the Request To Send Line in a set status (+12 volts) and the stop bit is simulated by the reset condition of the request to send line (l2 volts).
- the character 1100 0100 illustrated in FIG. 5 would be generated by first setting the Request To Send Line 16 to a positive 12 volts to indicate a start bit 36.
- the request to send line would programmably be set for a period of approximately 0.16 6 milliseconds to simulate the start bit.
- the Request To Send Line then would be reset to a value of l2 volts for a period of approximately 0.332 milliseconds to simulate the transmission of the two 1 bits. In this way the remaining bits of the character would be generated by alternately setting and resetting voltage on the Request To Send Line for measured periods of time. Then, if the character read in by the receive logic of the terminal computer by way of the jumper cable 34 is the same that had been generated, it may be assumed that the receive logic is functioning correctly.
- the voltage on the Request To Send Line, the REQSF line is controlled by programmatically setting the EF6F flip flop.
- the voltage on the REQSF line may be controlled for specificed amounts of time.
- One of the ways in which the EF6F flip flop can be set is by placing the value of 4,0 in the B register and using the micro-instructions R1BF and X1BF. The X1BF micro-instruction will set the EF6F flip flop and the X1BF micro-instruction will reset the EF6F flip flop when the value of the B register is 4,0.
- the general technique of generating a signal on the Request To Send Line revolves around executing these two micro-instructions under specified timing conditions. Since the TC500 micro code resides on the magnetic disk 38 shown in FIG. 6, the timing of these instructions can be accomplished by placing the instructions in predetermined locations on the disk 38. The magnetic disk 38 of the TC500 revolves at a speed of 6,000 rpm or 10 ms per revolution and'each track on the disk has its own fixed read-write head 40. An example of the relative placement of the microinstructions. to generate the character illustrated in FIG. 3 is shown in FIG. 6. First the R1BF, microinstruction 42 is placed on the disk so as to pass under the read-write head 40 first.
- a method of testing aprogrammable data communication terminal comprising the steps of:
- a method of testing a digital computer with data communications facilities that interface with the data communications network by means of request to send lines, receive data lines, transmit data lines and carrier detect lines comprising the steps of:
- a programmatic method of testing the receive logic of a programmable data communication terminal comprising the steps of:
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US30312972A | 1972-11-02 | 1972-11-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
US3787810A true US3787810A (en) | 1974-01-22 |
Family
ID=23170666
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US00303129A Expired - Lifetime US3787810A (en) | 1972-11-02 | 1972-11-02 | Test method for a programmable data communication terminal |
Country Status (9)
Country | Link |
---|---|
US (1) | US3787810A (ja) |
JP (1) | JPS5535906B2 (ja) |
BE (1) | BE806126A (ja) |
CA (1) | CA1002197A (ja) |
DE (1) | DE2351484C3 (ja) |
FR (1) | FR2205791B1 (ja) |
GB (1) | GB1401575A (ja) |
IN (1) | IN139523B (ja) |
NL (1) | NL172378C (ja) |
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3904861A (en) * | 1974-03-13 | 1975-09-09 | Digital Equipment Corp | Printed circuit board testing unit |
US3920975A (en) * | 1974-11-14 | 1975-11-18 | Rockwell International Corp | Data communications network remote test and control system |
US4001559A (en) * | 1974-12-16 | 1977-01-04 | Northern Telecom, Inc. | Programmable measuring |
US4112414A (en) * | 1977-01-03 | 1978-09-05 | Chevron Research Company | Host-controlled fault diagnosis in a data communication system |
FR2414219A1 (fr) * | 1978-01-04 | 1979-08-03 | Bendix Corp | Systeme de commande numerique a testeur incorpore |
US4178582A (en) * | 1978-06-26 | 1979-12-11 | The Bendix Corporation | Digital signal transmitter/receiver system including programmable self-test capability |
US4266294A (en) * | 1977-08-30 | 1981-05-05 | Xerox Corporation | Copy reproduction machine with controller self check system |
US4398297A (en) * | 1980-10-10 | 1983-08-09 | Bell Telephone Laboratories, Incorporated | Data set diagnostic system |
US4404635A (en) * | 1981-03-27 | 1983-09-13 | International Business Machines Corporation | Programmable integrated circuit and method of testing the circuit before it is programmed |
US4489220A (en) * | 1983-06-08 | 1984-12-18 | International Teldata Ii Corp. | Test set |
US4498186A (en) * | 1980-10-10 | 1985-02-05 | At&T Bell Laboratories | Data set diagnostic system |
US4854282A (en) * | 1986-10-29 | 1989-08-08 | Robert Bosch Gmbh | Device for securing control magnets on injection pumps for diesel fuel |
EP0540764A1 (de) * | 1990-04-04 | 1993-05-12 | BODENSEEWERK GERÄTETECHNIK GmbH | Demodulatorbaustein zur Systemüberwachung während des Betriebes |
US5712856A (en) * | 1995-04-10 | 1998-01-27 | International Business Machines Corporation | Method and apparatus for testing links between network switches |
US5895432A (en) * | 1995-08-02 | 1999-04-20 | Snap-On Incorporated | Method and apparatus for simultaneously coupling plural terminal devices through serial port and remote control apparatus incorporating same |
CN102288896A (zh) * | 2011-05-17 | 2011-12-21 | 上海华岭集成电路技术股份有限公司 | 高速通信总线芯片端口特性测试方法 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5496903A (en) * | 1978-01-17 | 1979-07-31 | Matsushita Electric Ind Co Ltd | Diagnosis system for acoustic coupler function |
US4247941A (en) * | 1979-06-28 | 1981-01-27 | Honeywell Information Systems Inc. | Simulator for bit and byte synchronized data network |
US4736402A (en) * | 1987-04-06 | 1988-04-05 | American Telephone And Telegraph Company | Signaling arrangement |
FR3136727A1 (fr) | 2022-06-15 | 2023-12-22 | Psa Automobiles Sa | Gestion par un véhicule autonome des bretelles de sortie pour la réalisation de manœuvres de changement de voie de circulation |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3622877A (en) * | 1969-11-07 | 1971-11-23 | Sanders Associates Inc | Apparatus for testing modulator demodulator units for transmission errors and indicating the errors per power of 10 |
-
1972
- 1972-11-02 US US00303129A patent/US3787810A/en not_active Expired - Lifetime
-
1973
- 1973-08-09 IN IN1842/CAL/73A patent/IN139523B/en unknown
- 1973-08-13 GB GB3821773A patent/GB1401575A/en not_active Expired
- 1973-10-08 NL NLAANVRAGE7313760,A patent/NL172378C/xx not_active IP Right Cessation
- 1973-10-09 FR FR7336045A patent/FR2205791B1/fr not_active Expired
- 1973-10-10 CA CA183,051A patent/CA1002197A/en not_active Expired
- 1973-10-13 DE DE2351484A patent/DE2351484C3/de not_active Expired
- 1973-10-16 BE BE136731A patent/BE806126A/xx not_active IP Right Cessation
- 1973-10-18 JP JP11770873A patent/JPS5535906B2/ja not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3622877A (en) * | 1969-11-07 | 1971-11-23 | Sanders Associates Inc | Apparatus for testing modulator demodulator units for transmission errors and indicating the errors per power of 10 |
Cited By (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3904861A (en) * | 1974-03-13 | 1975-09-09 | Digital Equipment Corp | Printed circuit board testing unit |
US3920975A (en) * | 1974-11-14 | 1975-11-18 | Rockwell International Corp | Data communications network remote test and control system |
USRE30037E (en) * | 1974-11-14 | 1979-06-19 | Rockwell International Corporation | Data communications network remote test and control system |
US4001559A (en) * | 1974-12-16 | 1977-01-04 | Northern Telecom, Inc. | Programmable measuring |
US4112414A (en) * | 1977-01-03 | 1978-09-05 | Chevron Research Company | Host-controlled fault diagnosis in a data communication system |
US4266294A (en) * | 1977-08-30 | 1981-05-05 | Xerox Corporation | Copy reproduction machine with controller self check system |
FR2414219A1 (fr) * | 1978-01-04 | 1979-08-03 | Bendix Corp | Systeme de commande numerique a testeur incorpore |
US4178582A (en) * | 1978-06-26 | 1979-12-11 | The Bendix Corporation | Digital signal transmitter/receiver system including programmable self-test capability |
FR2430156A1 (fr) * | 1978-06-26 | 1980-01-25 | Bendix Corp | Systeme de transmission et de reception de signaux numeriques a faculte d'auto-verification |
US4398297A (en) * | 1980-10-10 | 1983-08-09 | Bell Telephone Laboratories, Incorporated | Data set diagnostic system |
US4498186A (en) * | 1980-10-10 | 1985-02-05 | At&T Bell Laboratories | Data set diagnostic system |
US4404635A (en) * | 1981-03-27 | 1983-09-13 | International Business Machines Corporation | Programmable integrated circuit and method of testing the circuit before it is programmed |
WO1984005004A1 (en) * | 1983-06-08 | 1984-12-20 | Int Teldata Ii Corp | Test set |
US4489220A (en) * | 1983-06-08 | 1984-12-18 | International Teldata Ii Corp. | Test set |
US4854282A (en) * | 1986-10-29 | 1989-08-08 | Robert Bosch Gmbh | Device for securing control magnets on injection pumps for diesel fuel |
EP0540764A1 (de) * | 1990-04-04 | 1993-05-12 | BODENSEEWERK GERÄTETECHNIK GmbH | Demodulatorbaustein zur Systemüberwachung während des Betriebes |
US5712856A (en) * | 1995-04-10 | 1998-01-27 | International Business Machines Corporation | Method and apparatus for testing links between network switches |
US5895432A (en) * | 1995-08-02 | 1999-04-20 | Snap-On Incorporated | Method and apparatus for simultaneously coupling plural terminal devices through serial port and remote control apparatus incorporating same |
CN102288896A (zh) * | 2011-05-17 | 2011-12-21 | 上海华岭集成电路技术股份有限公司 | 高速通信总线芯片端口特性测试方法 |
Also Published As
Publication number | Publication date |
---|---|
FR2205791A1 (ja) | 1974-05-31 |
DE2351484B2 (de) | 1981-07-16 |
FR2205791B1 (ja) | 1982-07-02 |
CA1002197A (en) | 1976-12-21 |
GB1401575A (en) | 1975-07-16 |
BE806126A (fr) | 1974-02-15 |
JPS4979111A (ja) | 1974-07-31 |
NL7313760A (ja) | 1974-05-06 |
JPS5535906B2 (ja) | 1980-09-17 |
DE2351484A1 (de) | 1974-05-16 |
DE2351484C3 (de) | 1982-03-11 |
IN139523B (ja) | 1976-06-26 |
NL172378C (nl) | 1983-08-16 |
NL172378B (nl) | 1983-03-16 |
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AS | Assignment |
Owner name: BURROUGHS CORPORATION Free format text: MERGER;ASSIGNORS:BURROUGHS CORPORATION A CORP OF MI (MERGED INTO);BURROUGHS DELAWARE INCORPORATEDA DE CORP. (CHANGED TO);REEL/FRAME:004312/0324 Effective date: 19840530 |
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Owner name: UNISYS CORPORATION, PENNSYLVANIA Free format text: MERGER;ASSIGNOR:BURROUGHS CORPORATION;REEL/FRAME:005012/0501 Effective date: 19880509 |