US3696389A - Display system utilizing light emitting devices - Google Patents

Display system utilizing light emitting devices Download PDF

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US3696389A
US3696389A US56297A US3696389DA US3696389A US 3696389 A US3696389 A US 3696389A US 56297 A US56297 A US 56297A US 3696389D A US3696389D A US 3696389DA US 3696389 A US3696389 A US 3696389A
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light
conductors
elements
terminal
column
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Gunther E Fenner
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General Electric Co
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General Electric Co
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/001—Pulse counters comprising counting chains; Frequency dividers comprising counting chains using elements not covered by groups H03K23/002 and H03K23/74 - H03K23/84
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/088—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements using a non-linear two-terminal element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/088—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements using a non-linear two-terminal element
    • G09G2300/0885—Pixel comprising a non-linear two-terminal element alone in series with each display pixel element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/14—Detecting light within display terminals, e.g. using a single or a plurality of photosensors
    • G09G2360/145—Detecting light within display terminals, e.g. using a single or a plurality of photosensors the light originating from the display screen
    • G09G2360/147—Detecting light within display terminals, e.g. using a single or a plurality of photosensors the light originating from the display screen the originated light output being determined for each pixel
    • G09G2360/148—Detecting light within display terminals, e.g. using a single or a plurality of photosensors the light originating from the display screen the originated light output being determined for each pixel the light being detected by light detection means within each pixel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • ABSTRACT Methods and apparatus for receiving, transferring, retaining and displaying information within a display system having inherent internal memory capabilities.
  • Transfer and display elements including light-emitting and light-activated devices are employed in numerous configurations to provide display systems of high density with a minimum number of connections to external control circuitry with self-sustaining memory capabilities. Row-by-row, column-by-column and time sequential addressing of both rows and columns of display elements are disclosed.
  • This invention relates to display systems and more particularly to novel addressing methods and apparatus for achieving translation of information within a display system as well as displaying andstoring the information.
  • Analog display systems include light valve's, lasers and cathode ray tubes.
  • Digital display systems include electroluminescent and injection luminescent devices such as light-emitting diodes.
  • numerous specific devices have been proposed and some are in use in conjunction with data processing systems. These display systems, however, lack the ability to provide an internal memory capability; i.e., the ability to store information within the display system itself and without the aid of external memory devices.
  • Present-day display systems generally employ external memories which are used periodically to refresh or re-energize the display elements to produce a substantially flicker-free display.
  • each circuit includes a lightactivated device (LAD) and a light-emitting device (LED).
  • LAD lightactivated device
  • LED light-emitting device
  • a single transfer circuit is connected in common with each display circuit of a particular row or column so as to reduce substantially the number of transfer circuits in large memory display panels.
  • the transfer and display-memory elements are formed on a monolithic integrated circuit wafer for providing high density display panels.
  • rows and columns of display-memory circuits are time sequentially scanned to provide a minimum number of control lines for a display system.
  • FIG. 1 is a schematic diagram of a transfer and display-memory element in accord with one embodiment of the invention
  • FIG. 2 is a partial schematic and partial block diagram of a three by four matrix of transfer and displaymemory elements arranged in accord with another embodiment of the instant invention
  • FIG. 3 is a perspective view of a physical embodiment of the transfer and display-memory device of FIG.
  • FIG. 4 is a schematic diagram of a display panel having inherent transfer and display-memory capabilities employing a common transfer circuit for each column of an array;
  • FIG. 5 is an amplitude versus time diagram illustrating the time relationship of signals in the embodiment of FIG. 4;
  • FIG. 6 is a schematic diagram of a display system employing p-n-p-n semiconductor devices
  • FIG. 7 illustrates an alternative embodiment of the invention employing p-n-p-n devices without control electrodes as display-memory circuits
  • FIG. 8 is a perspective view of a monolithic integrated semiconductor wafer including transfer and display-memory elements arranged in rows and columns to provide a solid state display panel;
  • FIG. 9 is an embodiment of the invention illustrating a time sequentially addressed display system.
  • FIG., 1 illustrates one embodiment of a transfer and display-memory element 10 comprising a transfer circuit 11 and a display-memory circuit 12 separated by an optical barrier 13.
  • the transfer circuit 11 comprises a light-activated device (LAD) 14 such as a photoconductive or photovoltaic device which exhibits a bistable impedance characteristic.
  • LAD light-activated device
  • One lead of the LAD 14 is connected to a terminal 15 and the other lead of the LAD is connected to a light-emitting device (LED) 16 which may, for example, be a semiconductor light-emitting diode.
  • LED light-emitting device
  • the other lead of the LED 16 is connected to a terminal 17.
  • the display-memory circuit 12 comprises a light-activated device (LAD) 18 having one lead connected to a terminal 19 and the other lead serially connected with a light-emitting device (LED) 20 with the other lead of the LED connected to a terminal 21.
  • the displaymemory circuit 12 is connected to the transfer circuit 11 at the junctures of the LAD 14 and LED 16 and the junctures of LAD l8 and LED 20.
  • the transfer circuit 11 and the display-memory circuit 12 are not, however, optically interconnected in any way. In fact, the optical barrier 13 prevents any interaction between the two circuits.
  • a voltage pulse applied between terminals 15 and 17 coincidental with an'incident light signal on LAD 14 causes radiation from the lightemitting device 16.
  • the coincidence of the voltage- 7 pulse and the incident light is necessary since the lightactivated device would otherwise be in a high impedance condition and would not permit the passage of sufficient current flowtherethrough to cause the LED 16 to emit light.
  • the regenerative feedback of the light from LED 16 to LAD 14 causes LAD 14 to remain in its low impedance state thereby permitting LED 16 to remain conductive so long as the voltage pulse between terminalslS and 17 persists.
  • the output of LED 16 is also available for transfer to the next or adjacent transfer and displaymemory element in the event that they are coupled together, as will be described hereinafter.
  • incident radiation on LAD 14 produces an output from LED 16 each time a voltage pulse is ap-- plied between terminals 15 and 17.
  • a display 1 and storage signal is provided each time a pulse is applied between terminals 15 and 21 during the time interval that LED 16 is conducting.
  • LED 20 remains conducting so long as terminal 19 is connected to a source of voltage to maintain current flow through LED 20.
  • a transfer and display-memory system comprising a display panel 26 including a 3 X 4 array of transfer and display-memory elements 10 interconnected to perform a transfer and display-memory function.
  • the display panel 26 is addressed on a column-by-column basis; i.e., information to be displayed and stored on the display panel is shifted into the display panel one column at a time.
  • column-by-column addressing those skilled in the art can readily appreciate that row by-row addressing could similarly be employed if desired.
  • a twophase generator 27 which may, for example, include a continuously operating clock such as an oscillator, with means I for providing two-phase related outputs, preferably of the same frequency and 180 electrical degrees out of phase with each other.
  • phase related signals are illustrated in the drawing as (1),, and 4: The exact nature of these signals will become more apparent from the detailed description of the operation of the embodiment illustrated.
  • the 11),, output of the column address generator 27 is connected to columns 1 and 3 and the (1) output is connected to columns 2 and 4 of the transfer and display-memory element 10.
  • terminal 19 of each element is connected together and to a switch 28 which provides both a reset and a memory erase function which will be more fully described hereinafter.
  • the switch 28 is illustrated as being normally closed and is connected to the positive terminal of a voltage source 29 illustrated as a battery.
  • the terminals 21 of the elements in row 1 are connected together and through a diode 30 to the negative terminal of the voltage source 29.
  • terminals 21 of the elements in row 2 are connected together and through a diode 31 to the negative terminal of the voltage source 29 and terminals 21 of row 3 are connected together and through a diode 32 to the negative terminal of the voltage source 29.
  • Terminal 17 of all elements in the array are connected together and to a common return bus 33 which is also connected to one side of a character generator 34 illustrated as comprising three electrical switchs 35, 36 and 37.
  • Switches 35, 36 and 37 are respectively connected to the anodes of diodes 32, 31 and 30.
  • the character generator 34 is-illustrated as comprising simple mechanical switches, those skilled in the art can readily appreciate that other switching devices such as relays or semiconductor switches could similarly be employed and, in fact, as will be illustrated hereinafter, are actuated by information to be displayed on the panel 26.
  • the drawing also illustrates three start generators 38, 39 and 40 which may typically comprise a light-emitting diode which upon receipt of a start input signal emits light.
  • the start generators 38, 39 and 40 have their optical outputs 41 arranged in such a manner as to be optically coupled to the column 1 transfer and display-memory elements 10.
  • the operation of the transfer and display-memory system 25 can be understood by considering the sequence of events which occur, if, 'for example, it is desired to display the letter O on the panel 26.
  • a start input signal is applied to each of the start generators 38, 39 and 40. Light emitted from these generators is coupled to the light activated devices in each of the elements in column 1. If during a first time interval, the column and address generator 27 provides a qb output, which is coincidental with the radiation from the start generators, each element in column 1 will provide a radiation output 42 which is available for transfer to column 2, In order that a transfer to column 2 may be accomplished, the signal from the column address generator 27 should occur before the signal appearing on the line terminates.
  • the radiation from the elements in column 1 reduce the impedance of the light-activated device in the column 2 elements and hence permit current flow through the light-emitting devices associated therewith so that the light-activated device continues to remain in a low impedance condition and hence effect the transfer of radiation from the column 1 element to the column 2 element.
  • switches 35 and 37 so that elements in column 2, row 1 and row 3, are activated. If these switches are closed during the 4),, time interval, the respective display elements will be illuminated. With the reoccurrence of the clock before the termination of the (p, clock, radiationemitted from the transfer circuits of the elements in column 2 are transferred to the transfer circuits in the elements of column 3. By closing switches 35 and 37- again during the 4),, time interval, the next portion of the letter O is formed. The final portion of the letter O is formed by the transfer of radiation from column 3 to column 4 and subsequently closing switches 35, 36 and 37 so that all elements in column 4 are activated.
  • the letter O is formed by radiation from all the elements in columns 1 and 4 and only the elements in rows 1 and 3 of columns 2 and 3.
  • the display of the letter 0 will continue until current flow to the light-emitting devices in the display is interrupted.
  • This continuous display represents the memory function of the transfer and display-memory system 25.
  • the memory may be completely erased" by opening switch 28 or may be selectively erased by interrupting the current flow to any particular row, column or specific element if desired.
  • FIG. 3 illustrates a transfer and display-memory element l0 constructed in the form of a module 45 having a base portion 46 with the transfer circuit 11 comprising an LAD and an LED supported thereon.
  • the display-memory circuit 12 Directly above the transfer circuit and optically isolated therefrom by the barrier 13 is the display-memory circuit 12 also comprising an LAD and an LED.
  • the LAD and LED components may either be discrete devices or integrated circuit elements fabricated on a semiconductor wafer by suitable processing techniques. In this embodiment of the invention, it is preferable to arrange the components so that it is possible to interconnect a plurality of such modules to make a display panel, such as that described above with reference to FIG. 2. As illustrated in FIG.
  • a typical arrangement might include an input side of the module for receiving incident radiation and an output side of the module for providing an output radiation signal in response to incident radiation and an appropriate voltage signal. As further indicated in the figure, yet another side of the module provides the display and storage output. By this arrangement, optical coupling between adjacent modules can be readily provided.
  • the wave lengths of the radiation transmitted and received by the transfer circuit may be selected to be in the invisible range, for example, while the display and memory circuit may be selected to have a wavelength of radiation in the visible or infrared range if desired.
  • the LADs described herein may be photoconductive cells employing cadmium sulfide or cadmium selenide having on-to-off resistivity ratios of 10 or less and spectral responses in the visible and infrared regions.
  • the LEDs may, for example, be GaP light-emitting diodes having emissions in the red and green spectral regions or Ga(As,P) light-emitting diodes having emissions in the red and infrared regions. Accordingly, it is to be understood that the instant invention may be practised by employing various light-emitting and light-activated devices.
  • FIG. 2 illustrates a typical embodiment of such a display system with three rows and three columns.
  • a display system 48 having inherent transfer and display-memory capabilities is described as including a display panel 49 comprising a 3 X 3 array of display-memory circuits 50 each including a light-activated device and a light-emitting device which may be similar to those described above with reference to FIGS. 1 and 2.
  • each display circuit 50 in a particular column is connected in parallel with a single transfer circuit 51, which may also be similar to those described above with reference to FIGS. 1 and 2.
  • each transfer circuit 51 is connected to an output of a three-phrase generator 53 which in accord with this embodiment provides outputs labeled 42,, and (b respectively connected to the transfer circuits of column 1, column 2 and column 3.
  • the three outputs from the three-phrase generator 53 are, for example, pulsed signals of the same frequency and spaced from the other signal by about electrical degrees. The exact nature of these signals will be described hereinafter with respect to FIG. 5 of the drawing.
  • One terminalof the LADs of each display circuit 50 and one side of a switch 54 are connected together to provide a function similar to that described above, i.e., to erase the information stored in the display circuits.
  • the other side of the switch 54 is connected to the positive terminal of three voltage sources illustrated generally as batteries 55, 56 and 57 which, respectively, have their negative terminals connected to the LEDs of row 1, row 2 and row 3.
  • the negative terminals of the voltage sources 55, 56 and 57 are connected to switches 58,59 and 60, respectively, of a character generator 61.
  • the character generator 61 is illustrated in one of its simplestforms, and it is to be understood that numerous other character generators are contemplated and accordingly, my invention is not intended to be limited solely to mechanical switches.
  • Each LED in the transfer circuits 51 has a terminal connected together and to a common terminal of the character generator 61 and the three-phase generator 53..
  • FIG. 5 illustrates the timing relationship between the clock pulses 4 4a,, and (b As illustrated, there is a short time period t during which the lb, and 4a,, signals overlap or occur coincidentally in time, and a similar period between 41 and rb and between do and 1b,,.
  • a light input signal 62 is illustrated as the start signal for the transfer and display of information on the display system 48. The time relationship of the light input signal 62 with respect to the 4a,, signal is illustrated in FIG. 5.
  • the light input signal 62 causes the LAD of transfer circuit 51 of column 1 to become a low impedance during this time.
  • the occurrence of the clock signal during this time interval enables current flow through the LAD and LED and hence causes the emission of light from the LED.
  • FIG. 4 illustrates the light emission as being divided in two parts.
  • the first part, 63 provides regenerative feedback to the LAD to maintain its low impedance condition and hence permit the continued emission of light from .
  • the LED The second part of the light emitted from the transfer circuit 51 of column 1, 64, provides an output signal to the adjacent LAD of transfer circuit 51 in column 2.
  • the display at column l-row 1 is provided by closing switch 58 in the character generator 61 during the time interval that (b,( is being applied to the transfer circuit 51.
  • switch closure occurs, additional current begins to flow through the LAD in the transfer circuit 51 of column 1 to the LED of the display circuit 50 of column l-row 1 and back to the common return line.
  • regenerative feed-back reduces the impedance of its associated LAD and current flow from the voltage source 55 through switch 54 is provided independent of the condition of the switch '58 in the character generator 61. In this way, continuous storage or memory of the information, as represented by a switch closure of the character generator is provided in the position column l-row 1.
  • the 42, clock pulse is applied to the transfer circuit 51 of column 2.
  • time t in which the and 4: pulses coincide.
  • the light 64 emitted from the transfer circuit 51 in column 1 is coupled to theadjacent transfer circuit 51 in column 2. Since d; is also present during this interval, the LED of the transfer circuit 51 of column 2 provides an outputsignal 65 which maintains this output condition even after the 1b,, output goes to 0.
  • character generator 61 provides a closure of switch 59,. then as described above, the display circuit associated with column 2-row 2 emits light. Once light emission is initiated, it continues by virtue of the current provided from voltage source 56.
  • Display system 48 therefore provides a visual display at column l-row 1, column 2-row 2 and column 3-row 3. This display continues without interruption and without the need for refreshing or recycling the display circuits. In fact, the display will continue until the current paths between voltage sources 55, 56, and 57 are interrupted by the opening of switch 54. After momentarily opening switch 54, all display circuits are placed in a reset condition and are ready for the next sequence of events to occur.
  • the display system illustrated in FIG. 4 not only has the attendantadvantages described with reference to the embodiment illustrated in FIG. 2, but further is characterized by employing only a single transfer element for each column, in the case of column-by-column addressing.
  • This feature is particularly significant since in large arrays of display circuits, the number of transfer circuits is equal to the number of columns or rows, depending upon the direction of transfer as opposed to the embodiment illustrated in FIG. 2 which requires the product of the number of rows and columns in transfer elements.
  • the embodiment of the invention illustrated in FIG. 4 also describes an alternative means for providing voltage sources for sustaining the emission of light from selected display circuits. Whereas the embodiment illustrated in FIG.
  • FIG. 4 employs a number of voltage sources equal to the number of rows of display circuits. This increase in the number of voltage sources is due to the common connection between display circuits of a particular column. More specifically, a separate voltage source for each row eliminates the possibility of activating a display circuit in a row not selected by the character generator 61.
  • FIGS. 2 and 4 These embodiments are by way of illustration of my invention and are not to be construed as limiting the scope thereof.
  • FIG. 2 employs a two-phase clocking system
  • FIG. 4 employs a three-phrase clocking system.
  • the transfer circuit parameters in a two-phase system are more critical than in a three-phase system.
  • FIGS. 1 through 4 I have illustrated the use of a lightemitting and light-activated device to perform the transfer and display-memory functions; however, as will be described hereinafter, my invention also includes other devices such as, for example, p-n-p-n semiconductor devices which preferably exhibit a negative resistance characteristic.
  • p-n-p-n semiconductor devices which preferably exhibit a negative resistance characteristic.
  • FIG. 6 It is possible to employ the process technology of the semiconductor art and fabricate display systems of monolithic integrated circuit elements on semiconductor substrates. The manner in which other semiconductor devices, such as p-n-p-n devices, can be employed in display systems made in accord with the teachings of the instant invention, reference is made to FIG. 6.
  • a row-by-row sequentially addressed display system 70 is illustrated as comprising a 2 X 4 display panel 71 in which the display-memory circuits comprise single p-n-p-n devices 72 connected in the manner illustrated.
  • the display-memory circuits comprise single p-n-p-n devices 72 connected in the manner illustrated.
  • the p-n-p-n devices preferably exhibit a negative resistance characteristic which inherently provides regenerative feedback so that one conduction is initiated by the passage of current between the anode and cathode electrodes, current continues to flow and hence light continues to be emitted therefrom until the current flow in interrupted.
  • the operation is initiated by the coincidence of a clock pulse 111 and a light input signal 73 to the LAD of transfer circuit 74 so that a voltage pulse appears on the gate electrodes of the display devices 72.
  • Upon closing one of the switches in the character generator 75 current flows through the display device associated with the particular switch and once current flow is initiated, it is sustained by the voltage source 76.
  • transfer is effected between transfer circuit 74 and transfer circuit 77.
  • one or more of the light emitting devices 72 in row 2 is activated. Once activated, the emission of light is sustained by current flow from the source 76.
  • FIG. 7 illustrates yet another embodiment of my invention wherein negative resistance light-emitting devices without a gate electrode (in the case of a p-n-p- 11 structure) are employed.
  • negative resistance light-emitting devices without a gate electrode in the case of a p-n-p- 11 structure
  • embodiment of the invention illustrated in F IG. 7 also employs p-n-p-n semiconductor structures for the transfer circuits. Whereas the previous embodiments employed LEDs and LADs, with optical coupling between them to effect transfer, the embodiment illustrated in FIG. 7 employs direct electrical'connections between adjacent transfer circuits and employs the negative resistance characteristic of each device to provide the regenerative feedback achieved by the optical feedback of the previous embodiments.
  • FIG. 7 illustrates a display system comprising a display panel 81 including an array of p-n-p-n semiconductor light-emitting devices 82 arranged in a 3 X 4 matrix of rows and columns with the cathode terminals of each device in a column connected together and to a transfer circuit in a column address generator. More specifically, the cathodes of devices 82 in column 1 are connected to a transfer circuit 83 and those in columns 2, 3 and 4 are connected to transfer circuits 84, 85 and 86, respectively.
  • the transfer circuits 83 through 86 each include two series connected resistors to produce the necessary voltage signals to effect the desired transfer.
  • the transfer circuit 83 employs a first resistor 83a connected between the anode of solid state switch device 83b such as a silicon controlled rectifier or other p-n-p-n structure, and the (1),, output of a column address generator 87, similar to those described above.
  • a second resistor 83c is connected between the cathode of the solid state switching device 83b and the common return line of a three-phase generator 87.
  • the transfer circuits 84 through 86 are similarly connected with the first resistor in each case being connected to the three-phase generator and the second resistor being connected to the common return line.
  • each display device 82 in a particular column are connected together and to a switch in a character generator 88.
  • rows 1, 2 and 3 are respectively connected to switches 89, 90 and 91.
  • the other terminals of these switches are connected together and to the positive terminal of a voltage source 92 which has its negative terminal returned to the common return line of the column address generator 87.
  • Diodes 94 and 95 function to isolate the voltage source 93 from other display elements 82 which are not activated during a selected time interval.
  • the transfer from column 1 to column 2 is effected by the passage of current through the resistor 830 which produces a voltage drop thereacross sufficient to enable the control gate electrode of the solid state switching device 84b. With the occurrenceof the (11 clock pulse coincidentally with the clock pulse the switching device 84b is permitted to conduct current and hence the transfer from column 1 to column 2 is effected. In a similar manner, transfer is effected through all other elements in the array and a desiredpattern is displayed on the panel 81 in accord with the selected switch closures in the character generator 88.
  • the transfer circuits 83 through 86 could be formed in a semiconductor substrate by employing a plurality of closely spaced p-n-p-n devices with appropriate control voltages applied thereto to effect transfer from one column or row to another.
  • FIG. 8 is illustrative of one embodiment :of the invention employing monolithic integrated circuit elements fabricated on a semiconductor substrate. More particularly, FIG. 8 illustrates a partial perspective isometric view of a row or column of transfer and display-memory elements useful in practicing the instant invention. So that the integrated circuit configuration of FIG. 8 may be compared with the discrete circuit arrangement of FIG. 1, like reference numberals are employed where possible.
  • FIG. 8 I have illustrated a transfer and displaymemory element 10 comprising a transfer circuit 1 1 including a light-sensitive device 14 and a light-emitting device 16 including a p-n light-emitting junction.
  • FIG. 8 also illustrates a display circuit 12 comprising a lightsensitive device 18 and a light-emitting device 20 including a p-n light-emitting junction.
  • a common p-type region is provided for light-emitting devices 16 and 20; 'a portion of this common p-type region provides a conduction path for current flow between the transfer circuit 11 and the display and memory circuit 12.
  • FIG. 8 also illustrates the terminals 15, 17, 19 and 21 connected to the integrated circuit elements corresponding to those illustrated in FIG. 1. As illustrated in FIG.
  • the light-emitting devices 16 and 20 are separated by a channel 101 formed in the ntype semiconductor material and the light-activated devices 14 and 18 are separated 'by a channel 102 which is substantially parallel to the channel 101 but on the opposite surface of the p-type region.
  • Adjacent transfer and display-memory element 102 is separated from element 10 by an electric barrier 22, which may, for example, be just a gap or an insulating material such as an oxide or nitride of silicon.
  • the function of the electric barrier 22 is to separate the various light-activated regions 14.
  • FIG. 8 illustrates p-n lightemitting devices, as illustrated above, other lightemitting devices can also be employed if desired.
  • my invention may assume various configurations and therefore is not limited solely to that disclosed in FIG. 8.
  • FIG. 9 I have illustrated a time sequentially ad dressed display system comprising a display panel 111 having an array of display circuits 112 arranged in a 3 X 3 matrix of rows and columns.
  • Each display circuit comprises an LED and an LAD, such as those described above and a capacitor connected between the junction of the LED and LAD and a common row line. The function of the capacitor will be described below.
  • the display panel 111 is addressed by a column address generator 113 and a row address generator 114.
  • Each generator comprises a plurality of transfer circuits equal to the number of rows or columns to be addressed.
  • the column address generator 113 includes three transfer circuits each having an LED and an LAD for transferring information from one column to the next upon receipt of a start command signal from a signal source illustrated schematically as a light-emitting diode 115.
  • the row address generator 114 similarly includes a light-emitting and light-activated devices and also includes a start signal generator 116, also illustrated as a light-emitting device.
  • the operation of the time sequentially addressed display system may best be understood by considering the sequence of events which occur during a cycle of operation. For example, assume that the rate of transfer from column to column is much greater than that from row to row.
  • a particular row, for example, row 1 is selected by applying a voltage pulse to the row 1 transfer circuit 114A from the three-phase signal generator 116. Then, by stepping or scanning through all columns before the next row is selected, any or all display circuits in row 1 may be lighted simply by closing a character selection switch 120 at a time when the column scanning has reached the desired or selected display circuit.
  • character selection switch 120 is closed during the interval of time during which column 3 is being scanned.
  • the scanning of columns 1,-2 and 3 is effected by the outputs from the three-phase signal generator 1 17 which controls the column scanning generator 113.
  • the output is maintained by current flow from the voltage source associated with column 3, illustrated in the drawing as +V.
  • the current path in this case is from +V through the LAD, the LED and an isolation diode 118C back to the negative terminal of the voltage source, illustrated in the drawing as V.
  • the capacitor provides direct current blocking while permitting alternating current to flow during the column scanning time period.
  • column 2 After addressing all display circuits in row 1, column 2 is addressed by applying a signal to transfer circuit 114B of the row address generator 114 from the threephase signal generator 116. During this period of time,
  • each row and column is time sequentially addressed so that information as determined by the closures of the character switch 120, are displayed and stored, if desired, on the display panel 1 11.
  • the size of the array may be increased to most any desired value without increasing the number of interconnecting lines between the display system and the environment.
  • a maximum of three lines from each of the two three-phase signal generators, two signal generator return lines and the sustaining voltage lines are employed regardless of the size of the array. Fewer lines can be employed if the generators are integral with the display. This feature is particularly attractive since it represents a solution to one of the most .14 difficult problems encountered in providing large dis play systems which generally require at least one line for each row or column or both depending upon the particular method or means of addressing.
  • FIG. 9 illustrates the time sequentially addressed display system as comprising discrete semiconductor elements
  • those skilled in the art can readily appreciate that integrated circuit techniques similar to those described above can likewise be employed in making arrays.
  • the fabrication of integrated circuit display panels may, in fact, be preferable in many instances.
  • the transfer and displaymemory circuits illustrated in several of the other embodiments of my invention may also be employed in the time sequentially addressed system of FIG. 9.
  • the transfer circuits may employ p-n-p-n devices and the display circuits may similarly employ lightemitting p-n-p-n devices either with or without a control electrode. Accordingly, it is to be understood that the embodiment of my invention illustrated in FIG. 9 is merely by way of illustration of one embodiment thereof and is not to be construed in a limiting sense.
  • An electrical device comprising a first electrical circuit including a first light-activated device and a first light-emitting device connected in series in the order named between a first terminal and a second terminal,
  • a second electrical circuit including a second lightactivated device and a second light-emitting device connected in series in the order named between a third terminal and a fourth terminal,
  • a display system comprising a plurality of light emitting elements, each including a first terminal, a second terminal and a third terminal, said elements arranged in a plurality of rows and columns,
  • each of the first conductors connecting the first terminals of the elements of a respective row, each of the, second conductors connecting the second terminals of the elements of a respective row,
  • each of the column conductors connecting the third terminals of the elements of a respective column
  • switching means for selectively and momentarily energizing said second conductors during each energization of a column conductor
  • each of said elements having the characteristic that when an energizing potential is applied to said second terminal and another energizing potential is applied to said third terminal along with operating potential being applied between said first and second terminals, said element becomes energized and maintains energization until operating potential to said first and second terminals is interrupted,
  • each of said light-emitting elements comprises a first electrical circuit including a first light-activated device and a first light-emitting device connected in series in the order named between said first terminal and said second terminal,
  • a second electrical circuit including a second lightactivated device and a second light-emitting device connected in series in the order named between said third terminal and a fourth terminal,
  • said second light-activated device and said first lightemitting device connected in series in the order.
  • a display system comprising a plurality of light-emitting elements, each including a first terminal, a second terminal, and a third terminal, said elements arranged in a plurality of rows and columns,
  • each of the first conductors connecting the first terminals of the elements of a respective row, each of the second conductors connecting the third terminals of the elements of a respective row,
  • each of the column conductors connecting the second terminals of a respective column
  • switching means for selectively and momentarily energizing said column conductors during each energization of a second conductor of a row
  • each of said elements having the characteristic that when an energizing potential is applied to said second terminal and another energizing potential is applied to said third terminal along with operating potential being applied between said first and second terminals, said element becomes energized and maintains energization until operating potential to said first and second terminals is interrupted,
  • said lightemitting elements are p-n-p-n negative resistance devices having main current-carrying terminals corresponding to said first and second terminals and a gate electrode corresponding to said third terminal.
  • a display system comprising a plurality of light-emitting elements each including a first terminal and a second terminal,
  • each of said row conductors connecting the first terminals of said ele ments of a respective row
  • each of said column conductors connecting the second terminals of said elements of a respective column, means for applying operating potential between said column conductors and said row conductors,
  • each of said elements having the characteristic that when a sufficiently large potential is applied across said first and second terminals, said device becomes energized and only a small potential is required to sustain energization thereof, said operating potential means providing potential high enough to sustain energizing but not high enough to initiate energization therein,
  • circuit transfer means for sequentially energizing the conductors of said columns to energize the second terminals of the elements connected thereto,
  • a display system comprising a plurality of light-emitting elements, each including a first terminal, a second terminal and a third terminal, said elements arranged in a plurality of rows and columns,
  • a plurality of row conductors arranged in sets including a first and a second conductor for each row, each of the first conductors connecting the first terminals of said elements in a respective row, each of the said second conductors connecting the third terminals of said elements in a respective row,
  • each conductor connecting the second terminal of a respective column
  • each of said elements having the characteristic that when an energizing potential is applied to said second terminal and another energizing potential is applied to said third terminal along with operating potential being applied between said first and second terminals, said element becomes energized and maintains energization until operating potential to said first and second terminals is interrupted.
  • first circuit transfer means for sequentially energizing the second conductors of said rows to energize the third terminals of the elements connected thereto,
  • each of Said Second conductors means is a multiple of the rate of sequential energizing taken in q for energization with said of said first circuit transfer means, said multiple numercolumn conductors 5 ically equal to the number of said elements in a row. whereby after a Sequence energization of F 14.
  • said lightof the rows and m emitting element is a light-activated-device and a lighttherew'th a plurahty of sequences of enefrgganon emitting device connected in series between said first of the column conductors for each .energlzanon 9 and second terminals, in which the common conneca second conductor of a row, selective ones of said 10 tion of said devices 18 said third terminal, and In which elements are energized and maintained in enerh f t d n gization until the application of operating potential t e sm e op y coupled to said light-activating device.

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US3975643A (en) * 1974-01-23 1976-08-17 Westinghouse Air Brake Company Fail-safe opto-electronic phase inverting circuits
US4506151A (en) * 1981-07-30 1985-03-19 Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of National Defence Optoelectronic logic
US4686425A (en) * 1986-04-28 1987-08-11 Karel Havel Multicolor display device
EP0410695A2 (de) * 1989-07-25 1991-01-30 Nippon Sheet Glass Co., Ltd. Lichtemittierende Vorrichtung
EP0335553A3 (de) * 1988-03-18 1994-01-05 Nippon Sheet Glass Co., Ltd. Selbstabtastende Anordnung von lichtemittierenden Bauelementen
US20060214173A1 (en) * 2005-03-28 2006-09-28 Goldeneye, Inc. Light emitting diodes and methods of fabrication

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US4322720A (en) * 1978-01-28 1982-03-30 International Computers Limited Display devices
DE3025732C2 (de) * 1980-07-08 1983-04-21 Johann-Marius Dipl.-Ing. 8520 Erlangen Milosiu Matrix-Anzeigevorrichtung mit Leuchtdioden und Foto- Speicherung
DE3041645C2 (de) * 1980-11-05 1983-09-01 Johann-Marius Dipl.-Ing. 8520 Erlangen Milosiu Matrix-Anzeigevorrichtung mit variablen Aufnahmeeigenschaften und Be- triebsverfahren
DE4208306A1 (de) * 1992-03-16 1993-09-23 Bernd Vogelsang Anordnung zur anzeige mit leuchtdioden

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US3975643A (en) * 1974-01-23 1976-08-17 Westinghouse Air Brake Company Fail-safe opto-electronic phase inverting circuits
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DE2135448C3 (de) 1975-08-07
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