US3689912A - Gaseous display driver circuits - Google Patents

Gaseous display driver circuits Download PDF

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Publication number
US3689912A
US3689912A US98754A US3689912DA US3689912A US 3689912 A US3689912 A US 3689912A US 98754 A US98754 A US 98754A US 3689912D A US3689912D A US 3689912DA US 3689912 A US3689912 A US 3689912A
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signals
conductors
sustaining
diode
driver circuits
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US98754A
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George Wilmer Dick
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AT&T Corp
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Bell Telephone Laboratories Inc
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/12—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by switched stationary formation of lamps, photocells or light relays
    • H04N3/125—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by switched stationary formation of lamps, photocells or light relays using gas discharges, e.g. plasma
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/296—Driving circuits for producing the waveforms applied to the driving electrodes

Definitions

  • ABSTRACT Integrable drivercircuits employing transistor-diode circuitry couple high voltage, alternating polarity sustaining signals to a plasma display while isolating the row and column selection pulses'used for writing nTnt, a charge storage diode is employed as a selection device and is connected in a Y with a pairv of oppositely-poled switching diodes for coupling the fi jr i mymg e ,31039119,Quv rcir u tatransfiv sustaining signals
  • a single charge storage diode is employed for coupling both polan'ties of the sustaining signals.
  • This invention relates to matrix addressed systems and, more particularly, to driver circuitry for matrix addressed gaseous display systems.
  • Matrix addressed systems are typically employed to reduce the driver circuitry required and thereby reduce the size and cost of the overall system.
  • Such systems are commonly employed in memories and displays, for example, row and column conductors thereof being arranged usually in a coordinate array of crosspoint memory or display cells.
  • a particular crosspoint cell is selected by coincident drive signals applied to the individual row and column conductors defining the crosspoint.
  • the driver circuitry associated with each row and column conductor comprises a simple I Y-connected arrangement of a pair of oppositely- It is known inthe art to further reduce the driver cirv cuitry required, by employing tandem access matrices in which a pair of primary matrices are used to select row and column conductors" of a larger secondary matrix.
  • tandem matrix arrangements often necessitate some form of coupling circuitry which mitigates their advantages somewhat, particularly in the case of transformer or amplifier coupling between the matrices.
  • Plasma displays are characterized typically by gaseous display material disposed between first and second layers of dielectric material backed by mutually orthogonal row and column conductor arrays, thereby defining a coordinate array of crosspoint display cells.
  • the capacitance provided by the dielectric material between the row and column conductor arrays provides each crosspoint display cell with inherent poled diodes and a selection device.
  • charge storage diode is employed as, the selection device for each row and column conductor.
  • a particular row'or column conductor is selected by first charging the charge storage diode connected thereto and by thereafter applying a write or erase drivesignal in common-to all selection devices, such that only the single charged diode "passes the signal.
  • a particular advantage of this two-phase operation using charge storage diode selection devices is that low level circuitry may be used for addressing and charging the selection devices, with one or two transistors employed in common for generating all the high voltage write and erase drive signals for the display.
  • Still another feature of my invention relates to the use of a single charge storage diode in each driver circuit for coupling the alternating polarity sustaining signals to the row and column conductors of a plasma display.
  • One polarity of the sustaining signals is coupled through the diode in the forward direction, storing charge in the diode to provide for coupling the opposite polarity sustaining signals therethrough.
  • FIG. 1 is a diagram of an illustrative embodiment of a plasma display employing driver circuitry in accordance with the principles of my invention
  • FIG. 2 is a time chart useful in describing the operation of the illustrative embodiment of FIG. 1;
  • FIG. 3 is another illustrative embodiment of driver circuitry according to the principles of my invention DETAILED DESCRIPTION
  • FIG. 1 of the drawing an illustrative embodiment of driver circuitry is shown for driving plasma display 50.
  • Plasma display 50 is depicted as having a coordinate array of crosspoint display cells defined by row conductors R1 through R4 and column conductors C1 through C4 disposed on respective dielectric material substrates. The dielectric material substrates are spaced apart and gaseous display material is-disposed therebetween.
  • plasma displays utilize the mechanism of electrical discharge breakdown of the gaseous display material at selected crosspoint display cells for generating images.
  • an electric field is applied across a display cell of a breakdown magnitude V determined by the pressure-distance characteristic of the particular gaseous display material employed, the gas in the crosspoint region breaks down and provides a light-emitting discharge of low current density.
  • V breakdown magnitude
  • the breakdown discharge and the resultant current flow are established initially at a crosspoint display cell, charge is stored on the dielectric material surfaces of the display cell in the immediate vicinity of the crosspoint.
  • the stored charge opposes the voltage drop across the display cell and quickly reaches a level where the voltage across the cell becomes too low to maintain the discharge, thereby quenching the discharge at'the crosspoint.
  • the stored charge provides the display cell with memory.
  • an alternating polarity sustaining signal provided by source 20 is extended by control circuit 80 across each display cell via the row and column drivers. Substantially one-half of the sustaining signal is provided on lead 21 to row drivers 30 and the other half is provided, of opposite polarity, on lead 22 to column drivers 40.
  • the sustaining signal thus extended from source 20 across each display cell is of a magnitude less than the breakdown voltage level V ⁇ , and, for example, may be on the order of one-half the breakdown voltage level as depicted in FIG. 2.
  • Addressing of the individual crosspoint display cells is effected using conventional addressing or scanning techniques, such as those 'known in the display and television art.
  • the addressed cells are selectively energized or deenergized to write or erase information, respectively, in accordance with input signals received by writeserase circuitry 81 and 82from control circuit 80.
  • An addressed display cell is turned ON or energized, for example, by a write pulse in the form of coincident signals applied to the particular row and column conductors defining the cell.
  • the write pulse is of a magnitude sufficient to effect momentary breakdown of the gaseous display material at the addressed cell, permitting current flow thereacross to store charge on the adjacent dielectric material surfaces.
  • the level of charge stored is determined principally by the net voltage across the cell during breakdown and, for the illustrative embodiment herein, is on the order of one-half the breakdown voltage level.
  • the charge stored on the dielectric material surfaces of the display cells, in combination with the sustaining signal voltage thereacross is determined principally by the net voltage across the cell during breakdown and, for the illustrative embodiment herein, is on the order of one-half the breakdown voltage level.
  • an addressed display cell is turned OFF by applying an erase pulse to the row and column conductor defining the cell, such that the erase pulse removes or erases the charge stored at the cell.
  • the erase pulse is of sufficient magnitude, in combination with the stored charge, to cause momentary breakdown of the gas at the addressed display cell as depicted in FIG. 2.
  • the resulting current flow removes the charge stored on the dielectric material surfaces of the cell, and no further discharge occurs at the cell until another write pulse is applied.
  • each row driver 30 comprises charge storage diode 301, transistor selection switch 302 and load resistor 303.
  • each column driver 40 comprises charge storage diode 401, transistor selection switch 402 and load resistor 403.
  • row drivers 30 and column driver 40 are substantially identical in structure and operation, except that the polarities thereof are reversed, and the details of only one driver need be described.
  • row driver 30 connected to row conductor R1, by way of example.
  • the positive polarity portion of the sustaining signal herein referred to as the positive sustaining signal
  • charge storage diode 301 couples it therethrough, the potential developed thereby across load resistor 303 being applied to row conductor R1.
  • a quantity. of charge is stored in diode 301 determined principally by the positive sustaining signal magnitude, load resistor 303 and the minority carrier lifetime of diode 301.
  • diode 301 temporarily presents a low impedance until the stored charge is depleted. Upon depletion of the stored charge, diode 301 returns to its high impedance, reverse-biased state. Charge storage diode 301 remains in its high impedance state, permitting isolated application of write or erase pulses to selected conductors, until the next cycle of positive and negative sustaining signals. Thus, charge storage diode 301 provides a low impedance path for the positive and negative sustaining signals and presents a high impedance to the write and erase pulses.
  • the actual duration'of the negative sustaining signal applied to row conductor R1 by driver 30 is determined by the charge stored in diode 301 during conduction of the positive sustaining signal. Therefore, advantageously, the minority carrier lifetime of diode 301 is such that the duration of the negative sustaining signal determined thereby is substantially equal to the duration of the positive sustaining signal.
  • two different load resistances may be employed for the positive and negative sustaining signals, respectively, rather than common load resistor 303, with the relative values of the two load resistors being chosen so as to produce substantially symmetrical sustaining signals.
  • the respective sustaining signals may be steered to the appropriate load resistances by a diode connected in series with one sustaining signal load resistor and poled in the same direction as charge storage diode 301.
  • a particular display conductor such as row conductor R1 is selected or addressed via an appropriate signal applied over lead X1 from write-erase circuitry 82 to the base of transistor selection switch 302.
  • Switch 302 is thereby switched momentarily from its normally nonconducting state to a saturated, conducting state, connecting source 305 through to row conductor R1.
  • Source 305 is connected to conductor R1 for different durations, depending upon whether write or erase operation is desired, the duration being controlled by the signal on lead X1.
  • the alternating polarity sustaining signals may be provided advantageously by respective positive and negative sources coupled to the display through driver circuitry comprising a pair of oppositely-poled, fast switching diodes in place of charge storage diode 301 and load resistor 303.
  • driver circuitry comprising a pair of oppositely-poled, fast switching diodes in place of charge storage diode 301 and load resistor 303.
  • charge storage diode 301 and load resistor 303 may be replaced by a pair of diodes connected to row conductor R1 and poled opposite to one another.
  • One diode of the pair connects the positive sustaining signals to row conductor R1 and the other diode connects the negative sustaining signals thereto.
  • driver circuit 30 would comprise a simple Y-connect arrangement of the pair of diodes and selection switch 302 connected to row conductor R1.
  • the driver transistors such as transistors 302 and 402 are employed on a per row and per column basis to provide the logic-level to display-level voltage gains, in addition to the selection switch function.
  • the number of drive transistors required can be reduced, substantially in many applications by arranging the row drivers and the column drivers in respective selection matrices, permitting the use of passive selection devices.
  • the row drivers for an illustrative 128 row display may be arranged in an 8 X16 selection matrix using 24 drive transistors instead of the 128 transistors according to the arrangement of FIG. 1.
  • An alternative embodiment of driver circuitry arranged in a selection matrix is shown in FIG. 3 utilizing the above-mentioned Y-connect diode driver arrangement.
  • Row selection matrix 700 in FIG. 3 comprises a coordinate array of driver circuits 300 which correspond generally to row drivers 30 in FIG. 1.
  • Sustaining signal source 200 in FIG. 3 corresponds generally to source 20 in FIG. 1 and includes positive and negative sources, as shown, for providing the corresponding positive and negative sustaining signals on respective leads.
  • the positive. sustaining signals are provided over lead 210 to driver circuits 300 and the negative sustaining signals are provided over lead 211.
  • positive and negative sustaining signals are provided over respective leads 220 and 221 to column driver circuits (not shown) which are assumed to be arranged in a column selection matrix similar to row selection matrix 700.
  • Each driver circuit 300 comprises a selection device 312 and a pair of oppositely poled diodes 310 and 311 connected to a corresponding one of row conductors R1 through R4.
  • the positive sustaining signals provided over lead 210 through diodes 361 are extended to the individual row conductors R1 through R4 via diodes 310 in the respective driver circuits 300.
  • the negative sustaining signals provided over lead 211 through diodes 351 are extended to the individual row conductors via diodes 311 in driver circuits 300. 300.
  • Selection device 312 in driver circuits 300 is depicted, according to a further aspect of the invention, as a charge storage diode in the illustrative embodiment of FIG. 3.
  • Charge storage diode selection device 312 is normally reverse-biased in the absence of addressing signals from write-erase circuitry 820.
  • the reverse biasing path for charge storage diode 312 connected to row conductor R1, for example, may be traced from source 342 through resistor 343, charge storage diode 312 and diode 311 in driver circuit 300, through diode 351 and resistor 355 to ground.
  • Writing and erasing are two-phase operations using the charge storage diode selection devices in the arrangement of FIG. 3.
  • the particular driver circuit 300 is addressed for a selected row conductor and charge is stored in the charge storage diode in that driver circuit.
  • write-erase circuitry 820 under control of control circuit 80, provides selection matrix addressing signals on matrix addressing leads RXl and RYl.
  • the addressing signals are such that current flows in the forward conduction direction through diode 312, the path thus being traced over lead RYl through diode 371, diode 310, charge storage diode 312 and diode 365 to lead RXl.
  • write-erase pulse generator 500 provides a write or erase pulse on lead 555 to each of driver circuits 300.
  • the pulse is in a direction, illustratively positive-going in FIG. 3, such as to reverse bias the charge storage diodes in each of the driver circuits.
  • the charge storage diode 312 in the single'driver circuit 300 addressed during the first phase of operation is forward biased by the charge stored therein, thereby extending the write or erase'pulse through to selected row conductor R1. Any charge remaining in charge storage diode 312 after passage of the write-erase pulse therethrough essentially decays by normal recombination before the next write-erase cycle. Removal of any remaining charge is also assisted by the succeeding negative sustaining signal.
  • a switched recovery circuit such as a switched clamp which shunts resistor 355, may be employed advantageously.
  • a particular advantage of this two-phase operation using charge storage diode selection devices is that low level circuitry may be used for addressing and charging the selection devices, with write-erase pulse generator 500 employed in common for generating all the high voltage write and erase drive pulses for the row conductors of the display. It will be appreciated, of course, that the low-level write-erase circuitry should be isolatedfrom the high-voltage write-erase pulses and sustaining signals, such as by open-circuiting the matrix addressing leads during the intervals in which the high voltage signals are provided.
  • a matrix addressed system including an array of crosspoint cells defined by respective row and column conductors, a source of alternating polarity sustaining signals, and individual driver circuits respectively connected to each of said conductors for coupling said sustaining signals to said crosspoint cells in common and for selectively addressing individual ones of said cells; each of said driver circuits comprising a selection device adapted for selectively addressing a respective one of said conductors, and diode meansconnected between said source of sustaining signals and said respective one ofsaid conductors for continuously coupling said sustaining signals thereto.
  • each of said driver circuits comprising a selection device adapted for selectively addressing a respective one of said conductors, and diode means connected between said source of sustaining signals and said respective one of said conductors for couplingsaid sustaining signals thereto, said diode means comprising a charge storage diode poled so as to store charge during conduction of one polarity of said sustaining signals, said stored charge providing for conduction-of the other polarity of said sustaining signals through said diode.
  • each of said driver circuits comprising a selection device adapted for selectively addressing a respective one of said conductors, and diode means connected between said source of sustaining signals and said respective one of said conductors for coupling said sustaining signals thereto;
  • said source of sustaining signals comprising a source of positive polarity sustaining signals and a source of negative polarity sustaining signals, and said diode means comprising a pair of oppositely poled diodes, one of said diodes coupling the positive polarity sustaining signals and the other of said diodes coupling the negative polarity sustaining signals to said respective one of said conductors.
  • said selection device comprises a charge storage diode adapted to provide a normally high impedance path to signals for addressing said respective one of said conductors.
  • a system according to claim 4 further comprising path for said addressing signals through said selected one driver circuit.
  • a pulsed discharge gaseous display system including an array of display cells defined by respective pairs of conductors; a s urce of posi ive and negative olarity sustaining sign 5; a source 0 write-erase sign s; and
  • driver circuits respectively connected to each of said conductors; said driver circuits each comprising a pair of oppositely poled diodes for respectively coupling said positive and negative polarity sustaining signals to a respective one of said conductors, and an asymmetrically conducting selection device connected between said source of write-erase signals and said respective one conductor, said selection device storing an electrical charge when a corresponding one of said display cells is addressed, thereby coupling said write-erase signals to said respective one conductor.
  • Adriver circuit for use ha plasma display said driver circuit comprising three input terminals, an output terminal, and a pair of oppositely poled diodes and a charge storage diode respectively connecting said three input terminals in common to said output terminals, said pair of diodes adapted for respectively coupling positive and negative sustaining signals to the display, and said charge storage diode adapted when charge is stored therein to provide a low impedance path for coupling write-erase signals to the display.
  • a matrix array of driver circuits for coupling alternating polarity-signals in common to respective ones of a plurality of drive conductors and for coupling addressing signals selectively to said respective ones of said drive conductors; said array comprising a first set of matrix leads for connecting one polarity of said alternating polarity signals to said driver circuits; a second set of matrix leads for connecting the other polarity of said alternating polarity signals to said driver circuits; a third set of matrix leads for connecting said addressing signals to said driver circuits; and a fourth set of leads individually connecting said drive conductors to respective ones of said driver circuits; each of said driver circuits including a first diode connected between one of said first set and one of said fourth set of leads, a second diode connected between one of said second set and one of said fourth set of leads, and a third diode having a long minority carrier lifetime connected between one of said third set and one of said fourth set of leads, said first diode poled for conduction of said one polarity signals, said

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
US98754A 1970-12-16 1970-12-16 Gaseous display driver circuits Expired - Lifetime US3689912A (en)

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BE (1) BE776781A (en。)
CA (1) CA957043A (en。)
DE (1) DE2161978A1 (en。)
FR (1) FR2118646A5 (en。)
GB (1) GB1374614A (en。)
IT (1) IT943270B (en。)
NL (1) NL7117195A (en。)
SE (1) SE378149B (en。)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3754230A (en) * 1970-12-21 1973-08-21 Raytheon Co Plasma display system
US3778674A (en) * 1972-04-14 1973-12-11 Sperry Rand Corp D. c. gas discharge display apparatus with pulse train memory sustaining potential
US3823394A (en) * 1972-06-28 1974-07-09 Owens Illinois Inc Selective control of discharge position in gas discharge display/memory device
US3824581A (en) * 1971-06-26 1974-07-16 Yokogawa Electric Works Ltd Signal magnitude display device for converting an input electric signal into a visual display
US3839657A (en) * 1971-09-18 1974-10-01 Fujitsu Ltd Method and apparatus for controlling a gas discharge display device
US3872245A (en) * 1972-01-31 1975-03-18 Hitachi Ltd Photosensor actuating device
US3939454A (en) * 1973-08-03 1976-02-17 Fujitsu Limited Gas discharge panel information read-out system
US3942161A (en) * 1972-06-28 1976-03-02 Owens-Illinois, Inc. Selective control of discharge position in gas discharge display/memory device
US3944875A (en) * 1971-08-10 1976-03-16 Fujitsu Limited Gas discharge device having a function of shifting discharge spots
US3976912A (en) * 1972-02-23 1976-08-24 Owens-Illinois, Inc. Electrical supply system and method for improving the operating characteristics of gaseous discharge display panels
US4077033A (en) * 1976-09-13 1978-02-28 Control Data Corporation Plasma display drive circuit and method
US4115763A (en) * 1976-03-29 1978-09-19 Gould Inc. Electrical switching system
US4128901A (en) * 1977-08-17 1978-12-05 Owens-Illinois, Inc. Ground-reference power supply for gas discharge display/memory panel driving and addressing circuitry
US5097160A (en) * 1989-03-17 1992-03-17 Hitachi, Ltd. Method of transmitting pulse signal and apparatus therefor

Citations (6)

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Publication number Priority date Publication date Assignee Title
US2995682A (en) * 1960-01-28 1961-08-08 Sylvania Electric Prod Switching circuit for use with electroluminescent display devices
US3500075A (en) * 1966-11-02 1970-03-10 Gen Electric Bipolar pulse generating circuits
US3538380A (en) * 1967-11-15 1970-11-03 Itt Electroluminescent display unit including discharge path
US3559190A (en) * 1966-01-18 1971-01-26 Univ Illinois Gaseous display and memory apparatus
US3573542A (en) * 1968-03-28 1971-04-06 Control Data Corp Gaseous display control
US3590315A (en) * 1969-04-28 1971-06-29 Westinghouse Electric Corp Panel display switch having a source of priming voltage

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3614739A (en) * 1969-05-02 1971-10-19 Owens Illinois Inc Integrated driving circuitry for gas discharge panel
US3671938A (en) * 1969-05-02 1972-06-20 Bell Telephone Labor Inc Gaseous display device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2995682A (en) * 1960-01-28 1961-08-08 Sylvania Electric Prod Switching circuit for use with electroluminescent display devices
US3559190A (en) * 1966-01-18 1971-01-26 Univ Illinois Gaseous display and memory apparatus
US3500075A (en) * 1966-11-02 1970-03-10 Gen Electric Bipolar pulse generating circuits
US3538380A (en) * 1967-11-15 1970-11-03 Itt Electroluminescent display unit including discharge path
US3573542A (en) * 1968-03-28 1971-04-06 Control Data Corp Gaseous display control
US3590315A (en) * 1969-04-28 1971-06-29 Westinghouse Electric Corp Panel display switch having a source of priming voltage

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3754230A (en) * 1970-12-21 1973-08-21 Raytheon Co Plasma display system
US3824581A (en) * 1971-06-26 1974-07-16 Yokogawa Electric Works Ltd Signal magnitude display device for converting an input electric signal into a visual display
US3944875A (en) * 1971-08-10 1976-03-16 Fujitsu Limited Gas discharge device having a function of shifting discharge spots
US3839657A (en) * 1971-09-18 1974-10-01 Fujitsu Ltd Method and apparatus for controlling a gas discharge display device
US3872245A (en) * 1972-01-31 1975-03-18 Hitachi Ltd Photosensor actuating device
US3976912A (en) * 1972-02-23 1976-08-24 Owens-Illinois, Inc. Electrical supply system and method for improving the operating characteristics of gaseous discharge display panels
US3778674A (en) * 1972-04-14 1973-12-11 Sperry Rand Corp D. c. gas discharge display apparatus with pulse train memory sustaining potential
US3942161A (en) * 1972-06-28 1976-03-02 Owens-Illinois, Inc. Selective control of discharge position in gas discharge display/memory device
US3823394A (en) * 1972-06-28 1974-07-09 Owens Illinois Inc Selective control of discharge position in gas discharge display/memory device
US3939454A (en) * 1973-08-03 1976-02-17 Fujitsu Limited Gas discharge panel information read-out system
US4115763A (en) * 1976-03-29 1978-09-19 Gould Inc. Electrical switching system
US4077033A (en) * 1976-09-13 1978-02-28 Control Data Corporation Plasma display drive circuit and method
US4128901A (en) * 1977-08-17 1978-12-05 Owens-Illinois, Inc. Ground-reference power supply for gas discharge display/memory panel driving and addressing circuitry
US5097160A (en) * 1989-03-17 1992-03-17 Hitachi, Ltd. Method of transmitting pulse signal and apparatus therefor

Also Published As

Publication number Publication date
NL7117195A (en。) 1972-06-20
DE2161978A1 (de) 1972-07-06
BE776781A (fr) 1972-04-17
DE2161978C2 (en。) 1987-06-04
IT943270B (it) 1973-04-02
GB1374614A (en) 1974-11-20
FR2118646A5 (en。) 1972-07-28
SE378149B (en。) 1975-08-18
CA957043A (en) 1974-10-29

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