US3648102A - Numerical display tubes controlled by pulses produced by voltage inverter and directed by switch device to each tube in succession - Google Patents

Numerical display tubes controlled by pulses produced by voltage inverter and directed by switch device to each tube in succession Download PDF

Info

Publication number
US3648102A
US3648102A US64944A US3648102DA US3648102A US 3648102 A US3648102 A US 3648102A US 64944 A US64944 A US 64944A US 3648102D A US3648102D A US 3648102DA US 3648102 A US3648102 A US 3648102A
Authority
US
United States
Prior art keywords
inverter
tubes
voltage
tube
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US64944A
Other languages
English (en)
Inventor
Hubertus Bettin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Olympia Werke AG
Original Assignee
Olympia Werke AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19691942060 external-priority patent/DE1942060C/de
Application filed by Olympia Werke AG filed Critical Olympia Werke AG
Application granted granted Critical
Publication of US3648102A publication Critical patent/US3648102A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/84—Pulse counters comprising counting chains; Frequency dividers comprising counting chains using thyristors or unijunction transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K21/00—Details of pulse counters or frequency dividers
    • H03K21/08—Output circuits

Definitions

  • ABSTRACT A circuit arrangement for controlling the operation of numeri- 30 F A P D a cal display glow tubes and including means for producing a 1 pp Ion "on y a train of pulses of sufficient voltage to operate such tubes and 19, 1969 Germany 19 42 0601 switching means connected between the voltage pulse producing means and the tubes for applying the pulses directly to [1.8. CI. R, R, each tube in uccession and also causing the pulses to directly 315/260, 315/315 340/324 340/344 control the switching operations of the switching means. [51] Int. Cl. ..H05b41/30 [58] Field of Search ..315/84.6,169 TV, 169 R, 133,
  • the present invention relates to a circuit arrangement for controlling multiple-cathode numerical display glow tubes, in particular for producing a high voltage to operate the numerical display tubes and for controlling the individual electrodes of the numerical display tubes.
  • the present invention consists essentially in that an electronic direct voltage inverter whose output voltage is rectified in a known manner serves as a voltage supply for the numerical display tube and that the drive signals for the counter or the shift register are derived from the alternating-voltage pulses of the direct voltage inverter.
  • the counter or the shift register is built with thyristors since these components can support a sufficient voltage to be able to switch the high voltages required for the operation of numerical display tubes once they have been triggered by triggering pulses.
  • the cathodes associated with the same number are connected in parallel, as is generally known, and the anodes of the numerical display tubes sequentially are controlled by a shift register to excite the digit to be indicated.
  • the anodes of the numerical display tubes are preferably controlled directly by the output pulses of the shift register and the shift pulses for the shift register are derived from the alternating voltage pulses with a direct voltage from the direct voltage inverter superposed thereon.
  • FIG. 1 is a schematic representation of a preferred embodiment of a circuit arrangement according to the present invention.
  • FIG. 2 is a schematic representation of several stages of one embodiment of a shift register for the control of the numerical display tubes in the circuit of FIG. 1.
  • FIG. 3 is a schematic representation of an embodiment of a memory and a switching arrangement for the control of the numerical display tubes in the circuit of FIG. 1.
  • FIG. 1 shows a circuit arrangement for controlling, and supplying power to, a plurality of numerical display tubes 101, I02, 103, etc.
  • Numerical display tubes have an operating voltage of ap proximately 180-200 v.
  • the voltage for controlling and operating the numerical display tubes is furnished by a known push-pull direct voltage inverter 7.
  • the input side of the direct voltage inverter consists of the two terminals 71, 72, the two transistors T1 and T2 and the transformer primary winding 73.
  • the output side consists of the two secondary windings 74 and 75, of the transformer and the two rectifiers 76 and 77.
  • the output terminals 78 and 79 of the output side there are present direct voltages Ual and Ua2 over which alternating voltage pulses are superposed, the peak-to-peak amplitude of the alternating voltage being approximately 200 volts as compared to the direct voltage of approximately volts.
  • the alternating voltage pulses serve as the shift signals for a shift register 50 consisting of a plurality of bit stages 51, 52, 53, 54, 55, 56,...,n and a memory 90, n being equal to the number of display tubes in the device.
  • the memory 90 is connected to the terminal 79 of the push-pull inverter via a line 82 and is switched through the decades of the number to be displayed by the voltage pulses.
  • the information which is to be displayed by the tubes is stored in memory 90, this information having been delivered thereto from an external data source.
  • the information is digitally interrogated by sequentially closing the contacts 00, 01, 02...09 of a memory interrogation switch 10 in synchronism with the readout from memory 90.
  • Lines 61 lead from the contacts 00 to 09 of the memory interrogation switch to the respective cathodes 0 to 9 of the numerical display tube 101.
  • the cathodes of the tubes which are associated with the same display number are connected in parallel by means of a line system 60.
  • Cathode connection lines 61, 62, 63 lead from this line system 60 to the respective cathodes of the numerical display tubes. Since the cathodes for the same number are connected in parallel, one memory interrogation switch 10 is sufficient for all numerical display tubes.
  • the display of the memory contents in decades from tube to tube is controlled by the shift register 50 by shifting a pulse sequentially through its stages 51 to n.
  • One stage of the shift register is provided for each numerical display tube.
  • Each of the combination voltages Ual and Ua2 applied to the output terminals 78 and 79 of the push-pull inverter is applied to the input of every other stage of the shift register, the stages connected to one terminal alternating with those connected to the other terminal.
  • a starting pulse is delivered to the first stage 51 of the shift register from memory 90 over a line 80.
  • This first stage 51 is thus placed in a state to conduct voltage Ual to the anode 11 of the numerical display tube 101 and trigger it since, as already described, one of the cathodes 0-9 is suitably energized by the memory output through memory-interrogating switch 10.
  • the tube 102 similarly indicates the contents of the second decade of the memory.
  • the subsequent tubes are switched on in decades by shifting pulses Ual and Ua2 which shift the shift register one stage at a time.
  • the interrogation process for memory 90 and the shifting of the shift register are automatically effected from decade to decade. After completion of the first display cycle, the display process is restarted by a new trigger pulse 81 so that the counter or shift register again begins to go through its operating cycle. With a sufficiently high display frequency, which is easily achieved, the observer will see a steady image.
  • FIG. 2 shows the circuit arrangement for several stages of a two-phase shift register 50.
  • the combination voltages Ual and Ua2 of the direct voltage inverter which are shifted in phase by with respect to one another, are applied from the output terminals 78 and 79 to stages 51-53 of the shift register. Because only one shift register stage is conductive at a time, only one numerical display tube is in a conductive state at any one time and the other tubes are extinguished.
  • the starting pulse 81 turns the shift register on and renders the first stage 51 conductive.
  • the shift register includes a thyristor Th for each stage and pulse 81 is applied to the triggering electrode of thyristor Th1 of stage 51 to render it conductive so that the anode 11 of tube 101 receives the then present positive pulse of the triggering voltage Ual. Tube 101 then triggers, after one of cathodes -9 has received a readout signal from the memory. To initiate operation of the device, pulse 81 must at least partially coincide with a positive pulse of voltage Ual.
  • FIG. 3 shows the memory interrogating switch of FIG. 2 in a more detailed manner.
  • the memory consists preferably of four bistable circuits 85-88, connected with their inputs 91-98 to an external data source.
  • the above mentioned line 82 is delivering impulses to the bistable circuits 85-88, whereupon information is taken over by the memory 90.
  • new information is called for over a line 83.
  • Line 83 and a line 84 for the supply of an impulse for the first information are connected over an AND-gate 89 to line 80.
  • the outputs of the bistable circuits 85-88 are leading to the memory interrogating switch 10, consisting of a decoding matrix.
  • the 10 outputs of the decoding matrix are each connected over a transistor 40-49 to the appropriate cathodes 61 62, 63 of the display tubes 101, 102, 103 by lines 60.
  • the starting pulse 81, delivered by line 80 to the shift register 50, is synchronized with the impulses of line 82.
  • pulse 81 preferably occurs slightly before, or coincident with, the positive pulse of voltage Ual occurring, for example, during time period T designated in the waveform diagram associated with FIG. 2.
  • the current flowing through thyristor Th1 after it has been rendered conductive and during the period T also charges capacitor C10 through diode D10, the final charge being determined in part by the value of resistor R10 connected in series with capacitor C10.
  • Capacitor C10 is connected to the triggering electrode of thyristor Th2 of stage 52 via a resistor R21 associated with a resistor R22 to form a voltage divider which determines the voltage applied to the triggering electrode upon discharge of capacitor C10.
  • Capacitor C10 is connected to terminal 79 by a diode D21 poled to prevent the capacitor from discharging when voltage Ua2 has a zero, or at least a very low, value, as is the case during period T Then, at the beginning of the next pulse period T voltage Ual drops, permitting thyristor Th1 to return to its nonconducting state, and voltage Ua2 presents a positive pulse which permits capacitor C10 to discharge through resistor R21, thereby producing a triggering current which turns thyristor Th2 on. As a result, the positive pulse of voltage Ua2 is conducted to anode 21 of tube 102 to trigger that tube. At the same time the current flowing through thyristor Th2 charges capacitor C through diode D20 and resist
  • T memory 90 delivers information identifying the digit to be displayed by tube 102 while the contacts of switch 10 are sequentially closed to illuminate the selected tube cathode.
  • thyristor Th2 At the beginning of period T thyristor Th2 returns to its nonconductive state and the combined action of the positive pulse of voltage Ual and the charge on capacitor C20 renders thyristor Th3 of stage 53 conductive and place an operating potential on anode 31 of tube 103. Tube 101 can not then conduct because no triggering voltage is being applied to the triggering electrode of its thyristor Th1.
  • memory 90 could be of a type which connects switch 10 to ground only when the contact associated with the desired number is closed. This could be achieved in any known way and simply requires the maintenance of the proper synchronism between the operation of switch 10 and the output signals from memory 90.
  • a circuit device for controlling numerical display glow tubes including means for producing a voltage sufficient to operate the tubes and switching means connected for applymg such voltage to each tube in succession
  • said means for producing a voltage comprises an electronic inverter whose output is in the form of at least one train of spaced pulses and said switching means comprise control means connected for causing the pulses produced by said inverter to directly control the switching operations of said switching means.
  • each said tube has a plurality of cathode connections each associated with a respective number and a single anode connection, and said switching means are arranged for applying the output pulses from said inverter directly to the anode of each said tube in succession and for switching the pulses from one said tube to the next under the direct control of the pulses produced by said inverter.
  • said inverter is constituted by a push-pull direct voltage-altemating voltage inverter having two outputs each producing a signal composed of an alternating square wave voltage and a superimposed direct voltage, with the square wave component of one said output being shifted by with respect to that of the other output, and said switching means are connected to said outputs of said inverter for connecting one said output of said inverter only to every other one of said tubes and the other output of said inverter only to the intervening ones of said tubes.
  • said switching means further comprises a plurality of trigger voltage generating elements each having an input connected to the anode of a respective one of said tubes and an output connected to the trigger electrode of the thyristor associated with the next succeeding one of said tubes for rendering the thyristor connected to the next succeeding one of said tubes conductive when an operating voltage pulse on said one of said tubes is terminated.

Landscapes

  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
US64944A 1969-08-19 1970-08-19 Numerical display tubes controlled by pulses produced by voltage inverter and directed by switch device to each tube in succession Expired - Lifetime US3648102A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691942060 DE1942060C (de) 1969-08-19 Schaltungsanordnung zum Ansteuern von Ziffernanzeigeröhren

Publications (1)

Publication Number Publication Date
US3648102A true US3648102A (en) 1972-03-07

Family

ID=5743166

Family Applications (1)

Application Number Title Priority Date Filing Date
US64944A Expired - Lifetime US3648102A (en) 1969-08-19 1970-08-19 Numerical display tubes controlled by pulses produced by voltage inverter and directed by switch device to each tube in succession

Country Status (2)

Country Link
US (1) US3648102A (ko)
JP (1) JPS5028210B1 (ko)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3750139A (en) * 1971-07-02 1973-07-31 Scm Corp Time matrixing method of energizing selective segments of multi-cell liquid crystal displays
US4546288A (en) * 1983-05-26 1985-10-08 Triumph-Adler Aktiengesellschaft Bur Buro- Und Informationstechnik Arrangements for Fast Readout of n stage arrays of gas discharge chambers
US4694197A (en) * 1986-01-06 1987-09-15 Rca Corporation Control signal generator
US4816830A (en) * 1987-09-14 1989-03-28 Cooper James C Waveform shaping apparatus and method
US20040230025A1 (en) * 2000-12-07 2004-11-18 Debruin Bruce Roger Polyester process using a pipe reactor
US20060096969A1 (en) * 2004-11-11 2006-05-11 Samsung Electronics Co., Ltd. Electric oven
DE102004053631B4 (de) * 2004-11-01 2008-04-30 Samsung Sdi Germany Gmbh Anzeigeelement auf Basis organischer lichtemittierender Materialien

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51121117A (en) * 1975-04-16 1976-10-22 Toa Tokushu Denki Kk Means for controlling operation of a-c motor
JPS6184696U (ko) * 1985-07-30 1986-06-04

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3493957A (en) * 1966-06-13 1970-02-03 William Brooks Variable message displays
US3509420A (en) * 1968-05-02 1970-04-28 Burroughs Corp Driver circuits for display devices with spurious glow eliminating circuit
US3522471A (en) * 1968-03-19 1970-08-04 Burroughs Corp Transistor driver circuits for cathode glow display tubes

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3493957A (en) * 1966-06-13 1970-02-03 William Brooks Variable message displays
US3522471A (en) * 1968-03-19 1970-08-04 Burroughs Corp Transistor driver circuits for cathode glow display tubes
US3509420A (en) * 1968-05-02 1970-04-28 Burroughs Corp Driver circuits for display devices with spurious glow eliminating circuit

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3750139A (en) * 1971-07-02 1973-07-31 Scm Corp Time matrixing method of energizing selective segments of multi-cell liquid crystal displays
US4546288A (en) * 1983-05-26 1985-10-08 Triumph-Adler Aktiengesellschaft Bur Buro- Und Informationstechnik Arrangements for Fast Readout of n stage arrays of gas discharge chambers
US4694197A (en) * 1986-01-06 1987-09-15 Rca Corporation Control signal generator
US4816830A (en) * 1987-09-14 1989-03-28 Cooper James C Waveform shaping apparatus and method
US20040230025A1 (en) * 2000-12-07 2004-11-18 Debruin Bruce Roger Polyester process using a pipe reactor
DE102004053631B4 (de) * 2004-11-01 2008-04-30 Samsung Sdi Germany Gmbh Anzeigeelement auf Basis organischer lichtemittierender Materialien
US20060096969A1 (en) * 2004-11-11 2006-05-11 Samsung Electronics Co., Ltd. Electric oven

Also Published As

Publication number Publication date
DE1942060B2 (de) 1972-08-17
JPS5028210B1 (ko) 1975-09-12
DE1942060A1 (de) 1971-03-04

Similar Documents

Publication Publication Date Title
US3590156A (en) Flat panel display system with time-modulated gray scale
US3699531A (en) Digital data selection and display system
US3648102A (en) Numerical display tubes controlled by pulses produced by voltage inverter and directed by switch device to each tube in succession
US3686661A (en) Glow discharge matrix display with improved addressing means
US3679933A (en) Display system
US3780339A (en) High speed switching circuit for driving a capacitive load
US3735383A (en) Display apparatus utilizing cathode ray tubes
GB1203647A (en) Improvements in or relating to electrical display devices
US3048824A (en) Signal distribution system for distributing intelligence signals from a single source to a plurality of utilization channels
US2888557A (en) Frequency divider circuits
GB712172A (en) Improvements in or relating to electronic circuits for multiplying binary numbers
US3752910A (en) Solid state video reproducing system
US3307171A (en) Apparatus for energizing an electrical load device
GB752566A (en) Improved system for storage of differentially timed electrical signals
US2835804A (en) Wave generating systems
US2616627A (en) Counter circuit
US2677053A (en) Pulse generator
US2567410A (en) Multiphase generator
US2467476A (en) Frequency divider circuit
US4016554A (en) Raster display apparatus
US3209229A (en) System for utilizing intelligence signals to perform control functions
US3953762A (en) Circuit for supplying a specified one of plural external electrodes of a gas discharge display panel with unidirectional firing voltage pulses and for supplying others with pulses of a reduced voltage
US2654878A (en) Cathode-ray translating system for permutation codes
US2896092A (en) Waveform generators
US2592228A (en) Decoder for pulse code modulation receivers