US3624610A - Arrangement for generating a series of digital signals - Google Patents

Arrangement for generating a series of digital signals Download PDF

Info

Publication number
US3624610A
US3624610A US39419A US3624610DA US3624610A US 3624610 A US3624610 A US 3624610A US 39419 A US39419 A US 39419A US 3624610D A US3624610D A US 3624610DA US 3624610 A US3624610 A US 3624610A
Authority
US
United States
Prior art keywords
series
matrix
arrangement
condition
outlet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US39419A
Other languages
English (en)
Inventor
Stig Erik Warring
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Application granted granted Critical
Publication of US3624610A publication Critical patent/US3624610A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • H04L9/0656Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
    • H04L9/0662Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator

Definitions

  • An arrangement for generating a series of digital signals for use as a superimposition series in ciphering and deciphering digital signals comprises a contact matrix in which each contact can have two different conditions, one" condition and zero" condition.
  • Said contacts are selected by a pseudorandom generator including a number of pulse generators corresponding to half the number of matrix points.
  • Said generators generate individually a pseudorandom series of binary ones" and zeros" and each has two outlets of which the output signal of one outlet is inverted relatively to the output signal of the other outlet. All outlets are connected individually to a contact in the matrix, so that the number of contacts with zero condition always will be equal to the number of contacts with one condition.
  • the present invention relates to an arrangement for generating a series of digital signals for use upon generation of superimposition series when digital signals are ciphered or deciphered, comprising a contract matrix in which the contacts can have two different conditions, one condition and zero condition, and which are selected successively in a pseudorandom sequence controlled by stepping pulse generators, in order to define by their condition said series of digital signals.
  • the arrangement according to the invention is characterized by comprising a pseudorandom generator arrangement having a number of pulse generators corresponding to half the number of matrix points, each of said generators generating a pseudorandom series of binary zeros and ones and each having two outlets of which the output signal of the one outlet is inverted relatively to the output signal of the other outlet and that all outlets are connected individually to a contact in the matrix so that the number of contacts with zero condition always will be equal to the number of contacts with one condition.
  • each pulse in the superimposition series is generated by random samples in a plurality of numbers which always contain exactly as many zeros as ones, even though the distribution of zeros and ones at times is changed during the time of information transferring.
  • the desired random distribution of zeros and ones in the resulting superimposition series is secured, at the same time as it is very difficult to break the ciphered message.
  • FIGURE of the drawing shows the preferred pseudorandom pulse generator comprising a matrix and alternative embodiments of driving means.
  • M indicates a matrix which according to the example comprises 16 positions a a, ...a and in each of the positions and AND-circuit O O,,...O
  • the outlets of all AND circuits are connected to an OR-circuit E the outlet of which forms the outlet U of the superposing arrangement.
  • the matrix is provided with a stepping pulse generator arrangement comprising four stepping pulse generators X,, X,, Y,, Y each of which generates individually a pseudorandom series and can have an arbitrary design, for example a feedback shift register of the so-called maximum length type.
  • the four stepping pulse generators generate pseudorandom series of different lengths.
  • a selecting means is provided, consisting of eight AND-circuits U,-U,,.
  • the four stepping pulse generators are stepped by means of a clock pulse generator KG with a stepping frequency f and they produce on their outlets a fourdigit binary number.
  • the arrangement comprises furthennore a pseudorandom generator arrangement consisting of eight pulse generators PG,PG producing different pseudorandom series.
  • the pulse generators can for example consist of feedback shift registers which can be fed back directly from outlet to inlet, the number of stages in the different pulse generators having to correspond to difi'erent prime numbers.
  • the pulse generators can consist of maximum length shift registers and the difi'erent pulse generators have likewise to comprise different number of stages.
  • Each pulse generator has two outlets, a true outlet and a false outlet which 16 outlets are connected individually to the third inlet of the AND circuit in a matrix point of the matrix M via a pennuting network P.
  • each outlet of the pulse generators PG PG can be connected to an arbitrary matrix point.
  • the cross connection can possibly be set in accordance with some selectable key combination.
  • Another embodiment is obtained if the switch SA is supposed to be set to its lower position and the switch SB is in closed condition whereby the pulses of the clock pulse generator KG do not pass directly to the pulse generator arrangement PG PG but are first passing through a further pseudorandom generator arrangement A.
  • a number of pulse generators PG -PG are stepped forward with the frequency f, and each producing difierent pseudorandom series with different lengths.
  • Each of the outlets of these pulse generators is connected separately to an outlet of an AND-circuit 0,, to the fourth inlet of which stepping pulses having the frequency f are fed from the clock pulse generator KG.
  • pulse generators PG -PG shown on the drawing will be stepped with a pulse frequency f which on an average is one-eighth of f but the interval between the pulses to PG,-PG,, is varying, apparently at random.
  • the contents of the positions of the matrix M will then be replaced by apparently random intervals.
  • each of the pulse generators PG,PG can be replaced separately by a flip-flop vl va cnmlllullna successive sinned Ola IIIUI miller S.
  • the switch SA and SC are In a lawind POllHml. me much 88 in the Position drawn.
  • the mu! reairler can be led by a :epamtelu generated max (min with the alumina frequency )3, for example the ciphered pulse train.
  • the embodiment implies a certain modification concerning the feeding in of the information to the positions of the matrix M, consisting therein that each matrix position is provided with a bistable memory flip-flop v -v These flip-flops are switched via AND-circuits 0-100-0-161 with apparently random intervals by means of a pulse train obtained from a pseudorandom generating arrangement corresponding to the block A.
  • the pulse train obtained from the outlet of the OR-circuit E can be used to form the superimposition series directly or after a further transforming.
  • Arrangement for generating a series of digital signals for use upon generation of a superimposition series when digital signals are ciphered or deciphered, comprising a contact matrix in which each contact can have two different condioutlets are connected individually to a contact (a -a in the matrix (M), so that the number of contacts with zero condition always will be equal to the number of contacts with one condition.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)
US39419A 1969-06-11 1970-05-21 Arrangement for generating a series of digital signals Expired - Lifetime US3624610A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE8289/69A SE322257B (enrdf_load_stackoverflow) 1969-06-11 1969-06-11

Publications (1)

Publication Number Publication Date
US3624610A true US3624610A (en) 1971-11-30

Family

ID=20273655

Family Applications (1)

Application Number Title Priority Date Filing Date
US39419A Expired - Lifetime US3624610A (en) 1969-06-11 1970-05-21 Arrangement for generating a series of digital signals

Country Status (9)

Country Link
US (1) US3624610A (enrdf_load_stackoverflow)
CH (1) CH531283A (enrdf_load_stackoverflow)
DE (1) DE2027521B2 (enrdf_load_stackoverflow)
DK (1) DK120805B (enrdf_load_stackoverflow)
FR (1) FR2053920A5 (enrdf_load_stackoverflow)
GB (1) GB1278346A (enrdf_load_stackoverflow)
NL (1) NL7008531A (enrdf_load_stackoverflow)
NO (1) NO127080B (enrdf_load_stackoverflow)
SE (1) SE322257B (enrdf_load_stackoverflow)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3893082A (en) * 1972-12-28 1975-07-01 Thomas Ryder & Son Limited Automatic matrix control system
US3920894A (en) * 1974-03-11 1975-11-18 Bell Telephone Labor Inc Pseudo-random parallel word generator
US4083036A (en) * 1975-07-23 1978-04-04 U.S. Philips Corporation Arrangement for producing pulse-shaped signals
US4195196A (en) * 1973-10-15 1980-03-25 International Business Machines Corporation Variant key matrix cipher system
USRE30957E (en) * 1973-10-15 1982-06-01 International Business Machines Corporation Variant key matrix cipher system
EP3131230A4 (en) * 2014-04-28 2017-12-13 Ichiro Kazawa Encryption method, program, and system

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2918669A (en) * 1956-08-24 1959-12-22 North American Aviation Inc Arbitrary function generator
US3268821A (en) * 1963-12-04 1966-08-23 Rca Corp Timing or clock pulse generator employing plural counters capable of being selectively gated
US3371320A (en) * 1965-03-12 1968-02-27 Sperry Rand Corp Multipurpose matrix
US3439281A (en) * 1966-12-08 1969-04-15 James F Mcguire Apparatus for randomly controlling the flow of pulses from a pulse source to a plurality of output lines
US3521185A (en) * 1967-09-18 1970-07-21 Solartron Electronic Group Generation of binomially disturbed pseudo-random electrical signals
US3548174A (en) * 1966-08-10 1970-12-15 Burroughs Corp Random number generator

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2918669A (en) * 1956-08-24 1959-12-22 North American Aviation Inc Arbitrary function generator
US3268821A (en) * 1963-12-04 1966-08-23 Rca Corp Timing or clock pulse generator employing plural counters capable of being selectively gated
US3371320A (en) * 1965-03-12 1968-02-27 Sperry Rand Corp Multipurpose matrix
US3548174A (en) * 1966-08-10 1970-12-15 Burroughs Corp Random number generator
US3439281A (en) * 1966-12-08 1969-04-15 James F Mcguire Apparatus for randomly controlling the flow of pulses from a pulse source to a plurality of output lines
US3521185A (en) * 1967-09-18 1970-07-21 Solartron Electronic Group Generation of binomially disturbed pseudo-random electrical signals

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3893082A (en) * 1972-12-28 1975-07-01 Thomas Ryder & Son Limited Automatic matrix control system
US4195196A (en) * 1973-10-15 1980-03-25 International Business Machines Corporation Variant key matrix cipher system
USRE30957E (en) * 1973-10-15 1982-06-01 International Business Machines Corporation Variant key matrix cipher system
US3920894A (en) * 1974-03-11 1975-11-18 Bell Telephone Labor Inc Pseudo-random parallel word generator
US4083036A (en) * 1975-07-23 1978-04-04 U.S. Philips Corporation Arrangement for producing pulse-shaped signals
EP3131230A4 (en) * 2014-04-28 2017-12-13 Ichiro Kazawa Encryption method, program, and system

Also Published As

Publication number Publication date
NO127080B (enrdf_load_stackoverflow) 1973-04-30
GB1278346A (en) 1972-06-21
SE322257B (enrdf_load_stackoverflow) 1970-04-06
DK120805B (da) 1971-07-19
NL7008531A (enrdf_load_stackoverflow) 1970-12-15
CH531283A (de) 1972-11-30
FR2053920A5 (enrdf_load_stackoverflow) 1971-04-16
DE2027521A1 (de) 1970-12-17
DE2027521B2 (de) 1971-07-22

Similar Documents

Publication Publication Date Title
US6263082B1 (en) Pseudorandom number generation circuit and data communication system employing the same
JP3024702B2 (ja) ダイナミックフィードバックスクランブル技術キーストリーム発生装置
US5153532A (en) Noise generator using combined outputs of two pseudo-random sequence generators
US3920894A (en) Pseudo-random parallel word generator
US4965881A (en) Linear feedback shift registers for data scrambling
US6192385B1 (en) Pseudorandom number generating method and pseudorandom number generator
EP1537474B1 (en) Feedback random number generation method and system
US20030152221A1 (en) Sequence generator and method of generating a pseudo random sequence
EP0782069A1 (en) Pseudorandom number generator
US4058673A (en) Arrangement for ciphering and deciphering of information
DK170266B1 (da) Chifreringssystem og fremgangsmåde til chifrering og dechifrering
US4032763A (en) Production of pseudo-random binary signal sequences
US3624610A (en) Arrangement for generating a series of digital signals
US4797922A (en) Method of, and apparatus for, transforming a digital data sequence into an encoded form
US4744104A (en) Self-synchronizing scrambler
CA1242011A (en) Self-synchronising descrambler
CN1762098B (zh) 正交时钟除法器以及输出时钟产生方法
GB2229610A (en) Pcm communication system
EP0119972A1 (en) Apparatus for ciphering and deciphering digital messages
US4179663A (en) Devices for generating pseudo-random sequences
US4998263A (en) Generation of trigger signals
GB1591805A (en) Electric signal generators
EP0035048B1 (en) Cipher system using a variant key matrix
KR200165284Y1 (ko) 병렬처리 스크램블러
JPS61278207A (ja) スクランブル回路